Text preview for : COMPAL_LA-1711-REV_X02-DSec.pdf part of Compal COMPAL LA-1711-REV X02-DSec Compal COMPAL_LA-1711-REV_X02-DSec.pdf
Back to : COMPAL_LA-1711-REV_X02-DS | Home
5 4 3 2 1
D D
Prescott & Springdale Schematic with Capture CIS
and Function field
C C
uFCPGA Prescott
2003-07-23
Cature library ball out check document
Prescott : Prescott processor Electrial,Mechanical and
REV: X02-D
Thermal Specification Rev0.5 [Check by HW:Henry,Steve]
B B
Springdale(GMCH): Springdale GMCH External Design
Specification (EDS) REV1.0 [Check by HW: Henry,Rita]
ICH5: N/A
@ : Depop Component
1@ : Depop on Nimitz(Inspiron)
2@ : Depop on Beijing(Precision)
m
co
A A
l.
ai
tm
Compal Electronics, Inc.
ho
Title
f@
Cover Sheet
in
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
xa
X02-D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1711
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. D ate: W ednesday, July 23, 2003 Sheet 1 of 60
he
5 4 3 2 1
5 4 3 2 1
Compal confidential Block Diagram
D
Prescott D
ADT7460 Thermal sensor
page 19
478 uFCPGA CPU
page 7,8,9
Memory Fan Control
page 14
HA#( 3..31) System Bus HD#(0..63) BUS(DDR)
533/800MHz 2.5V
266/333/400MHz
Channel A SO-DIMM
BANK 0, 1, 2,3 page 15
VGA Springdale
Board AGP CONN. AGP4X/8X(1.5V) GMCH
page Channel B SO-DIMM Clock Generator
932 FC-BGA 10,11,12,13 BANK 0, 1, 2,3 page 16
[CRT CONN. & TV-OUT] page 18
2.5V CK409
266/333/400MHz
C page 6 C
HUB Link
MINI PCI 1.5V DC IN
66Mhz
page 41
266MB/S
page 32
BATT
PCI BUS 3.3V 24.576MHz AC-LINK
IN page 42
ICH5 MDC
3.3V ATA100 page 27
460 BGA 3.3V/5V
3.3V 33MHz
IDSEL:AD20
AC97 page 43
(PIRQA/B#,GNT#2,REQ#2)
ATA100
Page SATA Codec
CardBus Controller
20,21,22
B LAN HDD STAC9750 1.5V/+VTT_GMCH B
ATA100 page 24
B CM5705M PCI7510/PCI4510
page 44
BCM4401 page 30 page 21
page 28
CDROM 1.25V/2.5V
AMP& Phone Subwoofer
LPC BUS Jack Interface
page 45
1394, Smart Slot 0 3.3V 33MHz USB
Transformer USBPORT 4 page 50
page 29 card page31 FDDpage 23 page 25
VCORE
page31
page 47
RJ45 X BUS Macallen USBPORT 1
BT
page 29 LPC to X-BUS USBPORT 2 VCORE_CTRL
m
& Super I/O USB2.0 BACK
co
Page USBPORT 3 page 46
DOG
l.
SST39VF080
33,34
ai
USBPORT 4
tm
MOD
page 26 CHARGER
ho
page 35
A page 27 USBPORT 5 BACK page 48 A
f@
USBPORT 6
in
Touch Pad Int.KBD BACK
xa
page 35
page 35 Compal Electronics, Inc.
he
Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
X02-D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1711
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: W ednesday, July 23, 2003 Sheet 2 of 60
5 4 3 2 1
5 4 3 2 1
PM TABLE MCH Rev. ICH5 Rev.
RG828SDGES FW82801EB
power +3VRUN Bring up A1(QE18) A1(QE16ES)
plane +3VALW +3VSUS
+5VRUN RG828SDGP FW82801EB
+5VALW +5VSUS SST-Build
+1.5VRUN A2(QE45) A3(QE51ES)
+2.5V_MEM
+VCC_CORE
+3.3VRTC PT-Build
State +12V
D
+RTC_PWR D
+VCCVID
ST-Build
V_1P25V_DDR_VTT
QT-Build
S0 ON ON ON
Pilot-Build
S1 ON ON ON
S3 ON ON OFF
Configuration List
S5 S4/AC ON OFF OFF
S5 S4/AC don't exist
OFF OFF OFF
BOM Structure
PCI TABLE
C Function C
PCI DEVICE IDSEL REQ#/GNT# PIRQ
CARD BUS AD17 1 D,C
LAN AD16 4 C
MINI PCI AD19 3 D,B(NP)
VGA A,B(NP)
B B
Note : "@" means all model depop
USB TABLE "1@" means Nimitz depoped only
"2@" means Beijing depoped only
USB PORT# DESTINATION
Model Nimitz Beijing
0 Reserved Function
1 BT Smart Card No YES
2 BACK
LAN
10/100 1000
3 DOG (4401) (5705M)
m
co
4 MOD Dog House YES YES
l.
ai
5 BACK
tm
6 BACK
ho
A A
f@
7 Reserved
in
xa
Compal Electronics, Inc.
he
Title
Index and Config.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
X02-D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1711
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: W ednesday, July 23, 2003 Sheet 3 of 60
5 4 3 2 1
5 4 3 2 1
RBAT
D D
ADAPTER +RTCSRC +RTC_PWR +5VALW +5VSUS
PWR_SRC
+3.3VRTC +3VALW +3VSUS
SUSPWROK
BATTERY
DOCK _PWR_SRC
C C
+5VSUS +3VSRC +2.5VMEMP +VCCP +VCC_CORE +12V
B B
+5VHDD +5VMOD +5VRUN +1.5VRUN VDDA +3VRUN V3P3LAN +3VSUS +2.5V_MEM V_1P25V_DDR_VTT
m
co
l.
ai
tm
ho
A A
f@
in
xa
Compal Electronics, Inc.
he
Title
Power Rail
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
X02-D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1711
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: W ednesday, July 23, 2003 Sheet 4 of 60
5 4 3 2 1
5 4 3 2 1
ICH_SMBCLK +3VRUN CK_SCLK
D ICH5 7002
CLK GEN. D
ICH_SMBDATA +3VSUS CK_SDATA
7002
V_3P3_LAN
LAN_SMBCLK
DIMM0 DIMM1 7002 7002
NIC
LAN_SMBDATA
7002 7002
CLK_SMB +3VALW
7002
DAT_SMB MPCI
7002
C C
24C05 ADT7460 AD7414 PCA9561 DH PORT
EC SMBus Address
SIO CPU Temp.(ADT7460ARQ) : 5Ch/5Dh (P.19)
DDR Temp.(AD7414ART-0) : 90h/91h (P.15)
Macallen CPU Power Temp.(AD7414ART-0) : 92h/93h (P.?)
EC EEPROM(FM24C05U) : A0h/A1h/A2h/A3h (P.37)
SBAT_SMBCLK +5VALW VID Select(PCA9561PW) : 9Ch/9Dh (P.38)
SBAT_SMBDAT VGA
B B
PBAT_SMBCLK
1'nd
PBAT_SMBDAT +5VALW BATTERY
m
co
CHARGER
l.
ai
tm
ho
A A
f@
in
xa
Compal Electronics, Inc.
he
Title
SMBUS TOPOLOGY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
X02-D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1711
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: W ednesday, July 23, 2003 Sheet 5 of 60
5 4 3 2 1
5 4 3 2 1
+ 3VRUN
Place near each pin
+ 3VRUN CK_VDD_MAIN
W>40 mil
1
1
L17
R529 R518 BLM21PG600SN1D_0805~D
R215 @ 0_0402_5%~D Trace wide=20 mils
1K_0603_1%~D 1K_0603_1%~D 2 1 1 2
2
2
R206 0_0402_5%~D 2 1 1 1 1 1 1 1
D D
CLKSEL0 2 1 C204 C586 C587 C585 C554 C552 C551 C588
CPU_CLKSEL0 <8>
R508 0_0402_5%~D
CLKSEL1 2 1 10U_1206_6.3V7K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D 0.1U_0402_10V6K~D
CPU_CLKSEL1 <8> 1 2 2 2 2 2 2 2
R509 @ 0_0402_5%~D
2 1 Bring Up: Populate R509 (Because CPU
is Northwood-MT, Frequency 533MHz)
1
1
R530 R519
2K_0603_1%~D 2K_0603_1%~D
CK_XTAL_IN and CK_XTAL_OUT equal length traces, 1 1
2
2
Please place R_J between Pins 4,5 of CK409 Pins C553 C 193
MCH_CLKSEL0 <10> before X'tal 4.7U_0805_6.3V6K~D
0.1U_0402_10V6K~D
2 2
MCH_CLKSEL1 <10>
1
1
<21> CK_14M_ICH 2 R538 1
R214 R208 33_0402_5%~D
<34> CK_14M_SIO 2 R539 1
2.49K_0603_1%~D 2.49K_0603_1%~D 33_0402_5%~D
10
16
24
34
36
42
48
2
2
3
<24> CK_14M_CODEC 2 R611 1 U 39
@ 33_0402_5%~D
VDD_3V66
VDD_48
VDD_CPU
VDD_CPU