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1 1

Compal Confidential
2 2

QCL40 MB Schematic Document
LA-8224P
3 3

Rev: 0.2
2011.09.28

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8224P
Date: Thursday, October 27, 2011 Sheet 1 of 59
A B C D E
1 2 3 4 5

Compal Confidential ../../../../shop61976717.taobao.com/default.htm
../../../../shop61976717.taobao.com/default.htm
ZZZ1
QCL40
PCB-MB
PCB P/N for Load BOM
DDR3 1333/1600MHz 1.5V DDR3-SO-DIMM X 2
BANK 0, 1, 2, 3
A
DA80000QT00
Mobile +1.5V, +0.75VS A

NV Dual Channel Page 10, 11
N13M-GE1 PEG 16X Ivy Bridge
Gb1B-64 Processor
23x23mm rPGA 988B Socket
Page 4 ~ 9
Page 20 ~ 28 +VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ, port 4
+1.8VS, _VCCSA
USB conn x1
USB Board Page 33
FDI x8
DMI x4
(UMA) 100MHz port 8
100MHz Camera
5GB/s
2.7GT/s Page 30

LCD conn LVDS, EDID, DISPOFF#, PWM USB2.0
Page 30
port 10 Card Reader Memory Card Slot
SD/MMC
RTS5137 Page 34
RGB, HV Sync, DDC Page 34
CRT Conn
B
Page 30 Intel port 9
B

MiniCard-2
HDMI, DDC
PANTHER-POINT Page 40

HDMI PCH
Page 35
port 0,1
USB3.0 conn x2
USB3.0 port 1,2
Page 36
HM77
Audio Jack (HP)
Page 33

Azalia Realtek
FCBGA 989 Balls ALC269 Page 33 Audio Jack (MIC)
Page 33

Page 12 ~ 19 SATA
Speaker Connector
Page 33
C C

PCI-e
port 0
+1.05VS, +1.8VS, +3VS, 2.5" SATA HDD Connector
port 4 port 1 port 2 +3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM Page 31

ASM1042 USB3.0 LAN/CRT Board Mini Card-1
10/100/1000 LAN WLAN
Controller Realtek GbE Bluetooth
port 2
SATA ODD Connector
page 36 RTL8111F Page 32 Page 40 Page 31

SPI SPI ROM
4MB+2MB
Page 12

USB3.0 conn x2 LPC BUS
Page 37

Touch Pad CONN. ENE KB9012QF
D
External board Reserve KB930F D
Page 38
+3VLP/+3VALW page 39 Int. KBD
Page 38
DC/DC Interface CKT. LS-4221P
Page 29,41 USB/B Page 33

SPI ROM
Security Classification Compal Secret Data Compal Electronics, Inc.
Fan Control Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

Page 37 Page 39 Block Diagram
256KB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
Custom
Rev
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8224P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 27, 2011 Sheet 2 of 59
1 2 3 4 5
A

X76@: VRAMX16X8 VRAMX16X4 VRAMX8X8
N13P-GS
ZZZ11 X76L11@
N13P-GL
ZZZ X76L01@
N13M-GE1
ZZZ3 X76L03@
N13M-GE1 x8
ZZZ7 X76L07@
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CLKOUT DESTINATION USB3 PORT DESTINATION USB2 PORT DESTINATION

PCI0 PCH_LOOPBACK 1 USB2.0+3.0 0 USB2.0+3.0

ER39
2G HYN 2G SAM 1G SAM 2G HYN PCI1 EC PCH 2 USB2.0+3.0 1 USB2.0+3.0
ZZZ12 X76L12@ ZZZ2 X76L02@ ZZZ4 X76L04@ ZZZ8 X76L08@
PCI2 None 3 None 2 None

PCI3 LPC Debug Port 4 None 3 None
2G SAM 2G HYN 1G HYN 2G ELP

PCI4 None 4 JMINI1 (WLAN) Bluetooth
ZZZ5 X76L05@ ZZZ9 X76L09@

5 None
Voltage Rails
1G SAM 4G ELP
6 None
Power Plane Description S1 S3 Deep S5
ZZZ10 X76L10@
ZZZ6 X76L06@ S3
VIN Adapter power supply (19V) N/A N/A N/A N/A PCH 7 None
BATT+ Battery power supply (12.6V) N/A N/A N/A N/A
4G HYN B+ AC or battery power rail for power circuit N/A N/A N/A N/A 8 CAMERA
1G HYN
+3VLP 3.3V power rail for 51ON power management ON ON ON ON
+3VALW 3.3V always on power rail ON ON ON AC/ON; DC/OFF 9 USB2
N13P-GS N13P-GL N13M-GE1 N13M-GE1 x8 +LAN_IO 3.3V power rail for ethernet ON ON OFF OFF
GS@ GL@ GE@ GE8@ +3VS_WLAN 3.3V power rail for WLAN/BT Combo ON OFF OFF OFF 10 Card Reader
U10 GE@ U10 GE8@ +3V_PCH 3.3V power rail for PCH suspend well plane ON ON OFF OFF
U10 GS@ U10 GL@
+3VS 3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON OFF OFF OFF 11 None
+3VSG 3.3V power rail for VGA ON OFF OFF OFF
N13M-GE1 N13M-GE1 x8 +LCDVDD 3.3V power rail for LCD ON OFF OFF OFF 12 None
N13P-GS N13P-GL
+5VALW 5V always on power rail ON ON ON AC/ON; DC/OFF
+5V_PCH 5V power rail for PCH suspend well plane ON ON OFF OFF 13 None
+5VS 5V power rail for HDD,AUDIO,FAN,Touch PAD ON OFF OFF OFF
+5VS_ODD 5V power rail for SATA ODD ON OFF OFF OFF
DIS@: VGA componet IU3@: USB3.0 by PCH
+1.8VS 1.8V power rail for CPU,PCH ON OFF OFF OFF
GE8@: N13M-GE1_GB1b USB30@:USB3.0 controller IC
+1.05VS 1.05V power rail for PCH ON OFF OFF OFF
AI@: AI Charger +VCCP 1.05V power rail for CPU VCCIO,PCH ON OFF OFF OFF
9012@: EC(ENE 9012 chip) NAI@: Non AI Charger +1.05VSG 1.05V power rail for N13P ON OFF OFF OFF
1 930@: EC(ENE 930 chip) 1

+1.5V 1.5V power rail for DDR3 system memory ON ON ON OFF
XDP@: Intel debug port
+1.5V_CPU_VDDQ 1.5V power rail CPU VDDQ ON OFF OFF OFF
+1.5VSG 1.5V power rail for N13P,VRAM ON OFF OFF OFF
SMBUS Control Table
+1.5VS 1.5V power rail for PCH,WLAN/BT combo ON OFF OFF OFF
+0.75VS 0.75V power rail for DDR VREF ON OFF OFF OFF
SOURCE MINI1 BATT PCH EC SODIMM DGPU
+VCCSA VCCSA for CPU system agent ON OFF OFF OFF
+VCC_CORE CORE Voltage for CPU ON OFF OFF OFF
EC_SMB_CK1
EC_SMB_DA1
KB930 X V X X X X +VCC_GFXCORE_AXG 1.5V power rail for N13P,VRAM ON OFF OFF OFF
+VGA_CORE CORE Voltage for N13P Graphics ON OFF OFF ON OFF OFF OFF
EC_SMB_CK2
EC_SMB_DA2
KB930 X X V X X V
PCH_SMBCLK PCI EXPRESS DESTINATION
PCH_SMBDATA PCH
V X X X V X SATA DESTINATION

SATA0 Lane 1 10/100/1G LAN
PCH_SMLCLK HDD
PCH_SMLDATA PCH
X X X V X V Lane 2 MINI CARD WLAN
SATA1 None
Lane 3 None
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION SATA2 ODD

CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 CLK_SD_48M SATA3 None Lane 4 USB3.0 controller

Lane 5 None
CLKOUT_PCIE1 MINI CARD WLAN CLKOUTFLEX1 None SATA4 None
Lane 6 None
CLKOUT_PCIE2 None CLKOUTFLEX2 None SATA5 None
Lane 7 None
CLK CLKOUT_PCIE3 USB3.0 controller CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 None

CLKOUT_PCIE5 None Symbol Note :

CLKOUT_PCIE6 None : means Digital Ground

CLKOUT_PCIE7 None Security Classification Compal Secret Data Compal Electronics, Inc.
: means Analog Ground Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

CLKOUT_PEG_B None THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8224P
Date: Thursday, October 27, 2011 Sheet 3 of 59
A
5 4 3 2 1

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+1.05VS

1
JCPU1I
R1 PEG_ICOMPI and RCOMPO signals should be shorted and routed
24.9_0402_1% with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
T35 F22

2
JCPU1A
- typical impedance = 14.5 mohms VSS161 VSS234
T34 F19
D PEG_COMP VSS162 VSS235 D
J22 T33 E30
PEG_ICOMPI VSS163 VSS236
J21 T32 E27
PEG_ICOMPO VSS164 VSS237
14 DMI_CRX_PTX_N0 B27 H22 T31 E24
DMI_RX#[0] PEG_RCOMPO VSS165 VSS238
14 DMI_CRX_PTX_N1 B25 DMI_RX#[1] T30 VSS166 VSS239 E21
14 DMI_CRX_PTX_N2 A25 PCIE_GTX_C_CRX_N[0..15] 20 T29 E18
DMI_RX#[2] PCIE_GTX_CRX_N15 DIS@ C1 0.22U_0402_10V6K PCIE_GTX_C_CRX_N15 VSS167 VSS240
14 DMI_CRX_PTX_N3 B24 K33 1 2 T28 E15
DMI_RX#[3] PEG_RX#[0] PCIE_GTX_CRX_N14 DIS@ C2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N14 VSS168 VSS241
M35 1 2 T27 E13
PEG_RX#[1] PCIE_GTX_CRX_N13 DIS@ C3 0.22U_0402_10V6K PCIE_GTX_C_CRX_N13 VSS169 VSS242
14 DMI_CRX_PTX_P0 B28 L34 1 2 T26 E10
DMI_RX[0] PEG_RX#[2] PCIE_GTX_CRX_N12 DIS@ C4 0.22U_0402_10V6K PCIE_GTX_C_CRX_N12 VSS170 VSS243
14 DMI_CRX_PTX_P1 B26 J35 1 2 P9 E9
DMI_RX[1] PEG_RX#[3] PCIE_GTX_CRX_N11 DIS@ C5 0.22U_0402_10V6K PCIE_GTX_C_CRX_N11 VSS171 VSS244
14 DMI_CRX_PTX_P2 A24 J32 1 2 P8 E8

DMI
DMI_RX[2] PEG_RX#[4] PCIE_GTX_CRX_N10 DIS@ C6 0.22U_0402_10V6K PCIE_GTX_C_CRX_N10 VSS172 VSS245
14 DMI_CRX_PTX_P3 B23 H34 1 2 P6 E7
DMI_RX[3] PEG_RX#[5] PCIE_GTX_CRX_N9 DIS@ C7 0.22U_0402_10V6K PCIE_GTX_C_CRX_N9 VSS173 VSS246
H31 1 2 P5 E6
PEG_RX#[6] PCIE_GTX_CRX_N8 DIS@ C8 0.22U_0402_10V6K PCIE_GTX_C_CRX_N8 VSS174 VSS247
14 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 1 2 P3 VSS175 VSS248 E5
E22 G30 PCIE_GTX_CRX_N7 DIS@ C9 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N7 P2 E4
14 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PCIE_GTX_CRX_N6 PCIE_GTX_C_CRX_N6 VSS176 VSS249
F21 F35 DIS@ C10 1 2 0.22U_0402_10V6K N35 E3
14 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9] VSS177 VSS250
D21 E34 PCIE_GTX_CRX_N5 DIS@ C11 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N5 N34 E2
14 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] PCIE_GTX_CRX_N4 PCIE_GTX_C_CRX_N4 VSS178 VSS251
E32 DIS@ C12 1 2 0.22U_0402_10V6K N33 E1
PEG_RX#[11] PCIE_GTX_CRX_N3 DIS@ C13 0.22U_0402_10V6K PCIE_GTX_C_CRX_N3 VSS179 VSS252
14 DMI_CTX_PRX_P0 G22 DMI_TX[0] PEG_RX#[12] D33 1 2 N32 VSS180 VSS253 D35
D22 D31 PCIE_GTX_CRX_N2 DIS@ C14 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N2 N31 D32
14 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] PCIE_GTX_CRX_N1 PCIE_GTX_C_CRX_N1 VSS181 VSS254
F20 B33 DIS@ C15 1 2 0.22U_0402_10V6K N30 D29
14 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] VSS182 VSS255

PCI EXPRESS* - GRAPHICS
C21 C32 PCIE_GTX_CRX_N0 DIS@ C16 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N0 N29 D26
14 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] VSS183 VSS256
PCIE_GTX_C_CRX_P[0..15] 20 N28 D20
PCIE_GTX_CRX_P15 DIS@ C17 0.22U_0402_10V6K PCIE_GTX_C_CRX_P15 VSS184 VSS257
PEG_RX[0] J33 1 2 N27 VSS185 VSS258 D17
L35 PCIE_GTX_CRX_P14 DIS@ C18 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P14 N26 C34
PEG_RX[1] PCIE_GTX_CRX_P13 DIS@ C19 0.22U_0402_10V6K PCIE_GTX_C_CRX_P13 VSS186 VSS259
PEG_RX[2] K34 1 2 M34 VSS187 VSS260 C31
FDI_CTX_PRX_N0 A21 H35 PCIE_GTX_CRX_P12 DIS@ C20 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P12 L33 C28
14 FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI0_TX#[0] PEG_RX[3] PCIE_GTX_CRX_P11 PCIE_GTX_C_CRX_P11 VSS188 VSS261
H19 H32 DIS@ C21 1 2 0.22U_0402_10V6K L30 C27
14 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI0_TX#[1] PEG_RX[4] PCIE_GTX_CRX_P10 PCIE_GTX_C_CRX_P10 VSS189 VSS262
E19 G34 DIS@ C22 1 2 0.22U_0402_10V6K L27 C25
14 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] PCIE_GTX_CRX_P9 PCIE_GTX_C_CRX_P9