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This Sheet of Engineering drawings and specifications contains Confidential,
Trade Secret and other Proprietary information of Dell Computer Corporation ( "Dell" ).
This document may not be transferred or copied without the express written authorization of Dell. Rev.
In addition, neither this sheet nor the information it contains may be used by or
disclosed to any third party without Dell's express written consent.
No
This drawing is property of SEC, Use or copy of this drawing without proper permission
of the appropriate technical-document managing department is prohibited
D D
NO.
1.
2.
3.
VENICE 4.
5.
6.
8.
9.
CPU :DOTHAN 10.
11.
C Chip Set :ALVISO (GMCH) 12. C
13.
Remarks :915GM 13.
14.
15.
16.
17.
18.
Model Name : VENICE Main 19.
PCB Code : BA41-00454A 20.
21.
Dev. Step : QT 22.
23.
B
Revision : A00 24. B
25.
Update : 2004.12.10 26.
27.
28.
29.
30.
DRAW CHECK APPROVAL 31.
27.
28.
29.
SE LEE MK KIM BL LEE 30.
A A
SAMSUNG
4 3 2 1
4 3 2 1
This Sheet of Engineering drawings and specifications contains Confidential,
Trade Secret and other Proprietary information of Dell Computer Corporation ( "Dell" ).
This document may not be transferred or copied without the express written authorization of Dell. Rev.
In addition, neither this sheet nor the information it contains may be used by or
disclosed to any third party without Dell's express written consent.
No
This drawing is property of SEC, Use or copy of this drawing without proper permission
of the appropriate technical-document managing department is prohibited Option
D
Thermistor Clock Generator Dothan LCD Conn. SWITCH D
EMC6N300 CY28411ZCT
(478 Micro-FCBGA)
CRT
LVDS 1ch
4*100Mhz or 4*133Mhz
DDR2-Sodimm
DDR2 1ch sDVO DVI
ALVISO SIL1362
533 & 400Mhz TV out
DDR2-Sodimm 915GM
(1257 PCBGA)
C
USB2 PCMCIA Smartcard C
Bluetooth DMI*2 Socket Socket
Switch
Powered USB
USB0 CardBus
MiniPCI
Docking
USB5
PCI6515
Connector
PCI
Q-Switch
2x USB
USB3,4 ICH6-M PCIE
LOM PI3L500
(609 BGA) BCM5751
HDD PATA
RJ45
AC97 LPC USB1
B B
Audio Buffered LPC
STAC9751T MDC
SIO(Macallan III) 2x PS2
SPDIF (256 LBGA)
X-Bus
Connector
Jacks Docking Connector RJ11 TAA Option
Firm Ware
IRDA Keybd TP LED Firm Ware
Daughter Board
A A
Pointing
Stick SAMSUNG
4 3 2 1
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This Sheet of Engineering drawings and specifications contains Confidential,
Trade Secret and other Proprietary information of Dell Computer Corporation ( "Dell" ).
This document may not be transferred or copied without the express written authorization of Dell. Rev.
In addition, neither this sheet nor the information it contains may be used by or
disclosed to any third party without Dell's express written consent.
No
This drawing is property of SEC, Use or copy of this drawing without proper permission
of the appropriate technical-document managing department is prohibited
D
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices Voltage Rails
Devices IDSEL# REQ/GNT# Interrupts
Docking AD24 0 A VDC Primary DC system power supply (9 to 21V)
Cardbus AD17 1 D,C P5V_ALW 5.0V LDO power rail for MAC III(off in S4-S5 without AC Adapter)
MiniPCI SLOT AD19 3 B,D P5V_AUX 5.0V power rail (off in S4-S5)
USB AD29(internal) P3.3V_AUX 3.3V power rail (off in S4-S5)
P3.3V_LAN 3.3V power rail (off in S4-S5 without AC ADAPTER)
P2.5V_LAN 2.5V power rail (off in S4-S5 without AC adapter)
P1.2V_LAN 1.25V power rail (off in S4-S5 without AC adapter)
Programable
P3.3V_ALW 3.3V LDO power rail for MAC III(off in S4-S5 without AC Adapter
Hub to PCI AD30(internal) P1.8V_AUX GMCH/DDR II Power Source(off in S4-S5)
LPC bridge/IDE/AC97/SMBUS AD31(internal) VCC_CORE Core voltage for DOTHAN CPU (0.74~1.30V)
AGP AD17(internal) VTT GMCH core, CPU/GMCH FSB Termination.
Internal MAC AD24(internal) P5V 5.0V switched power rail (off in S3-S5)
AC Link - P1.5V 1.5V switched power rail (off in S3-S5)
P1.8V 1.8V switched power rail (off in S3-S5) SIL1362(DVI)
P2.5V 2.5V switched power rail (off in S3-S5)
P3.3V 3.3V switched power rail (off in S3-S5)
I2 C / SMB Address MEM_0.9V DDR2 Termination (off in S3-S5)
C Devices Address Hex Bus C
ICH6 Master - SMBUS Master
CK-410M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable
SODIMM0 1010 000x A0h -
SODIMM1 1010 001X A2h -
SSCG 1101-010x D4h Spread spectrum Clock Generator
BCM 1100-100x C8h -
PWR USB - - -
MAC III Master -
On b'd Diagnostic 1010 001x A2h -
Inverter 0101 100x 58h -
Battery 0001 011h 16h -
Smart Charger 0001 001x 12h -
THERMISTER 0101 111x 5Eh -
GMCH Master - I2C Bus
EDID 1010 000x A0h LCD information
DVI 0111 000x 70h
USB PORT Assign
B B
PORT NUMBER ASSIGNED TO
0 SYSTEM PORT (Left, Powered USB)
1 Docking
2 BLUETOOTH
3 SYSTEM PORT #1 (Rear)
4 SYSTEM PORT #2 (Rear)
5 Expresscard
6 RFU
7 RFU
POWER
P3.3V_LAN
P5V_ALW P2.5V_LAN
P3.3V_ALW P1.2V_LAN P5V_AUX P3.3V_AUX P1.8V_AUX P1.5V_AUX MEM_VREF P5V P3.3V P2.5V P1.8V P1.5V MEM_0.9 VTT VCC_CORE
MAC III BCM5751M ICH6 ICH6 G MCH ICH6 Memory ICH4 ICH6 GMCH DVI MGM Memory CPU CPU
ICH6-M LED USB PCI6515 ICH ICH6 GMCH
MINI-PCI SODIMM PCI6515
Flash Memory STAC9751 MINI-PCI
Thermistor DVI
THERMISTOR MINI-PCI STAC9751
A STAC9751 SODIMM A
MDC MAC III
LED
MAC III MDC
HDD SAMSUNG
HDD FIR
TOUCHPAD CLOCK
PCI BUFFER BLUETOOTH
4 3 2 1
4 3 2 1
This Sheet of Engineering drawings and specifications contains Confidential,
Trade Secret and other Proprietary information of Dell Computer Corporation ( "Dell" ).
This document may not be transferred or copied without the express written authorization of Dell. Rev.
In addition, neither this sheet nor the information it contains may be used by or 2 Chips solution are propsed by ICS.
disclosed to any third party without Dell's express written consent.
No
This drawing is property of SEC, Use or copy of this drawing without proper permission CY28411ZXCT : Lead free version
of the appropriate technical-document managing department is prohibited
P3.3V P3.3V P3.3V
6.3V
25V
25V
16V
25V
25V
25V
25V
D D
CK-410M
2.2
1000nF
ICS954201 MMZ1608S121AT
47nF
47nF
10nF
47nF
47nF
47nF
47nF
C833 100nF
R221
CY28411ZC 10000nF B525
16V C823 C796
6.3V 4700nF 1000nF
10K
10K
C260 6.3V 6.3V
C824
C264
C798
C832
C261
C262
C834
C263
Bus Selection for CK-410M (133MHz)
FSA FSB FSC P3.3V
HOST CLK FSB/FSC : by CPU/ MCH BSEL(Page 6)
R791
R737
CPU BSEL0 BSEL1 BSEL2 FSA : P3.3V PU U523
CY28411ZXCT
0 0 0 266 MHz 21
VDD_SRC0 VDD_REF
48
100nF
0 0 1 333 MHz 28 11 MMZ1608S121AT
VDD_SRC1 VDD_48 16V B524
34 C265
0 1 0 200 MHz VDD_SRC2
1 37 4700nF
7
VDD_PCI0 VDD_A C825
0 1 1 400 MHz 42
VDD_PCI1
38
6.3V
1 0 0 133 MHz VDD_CPU VSS_A
CLK3_CB48 R790 10
1 0 1 100 MHz 22-B2 48-C4 48-C3 R797 10 12
CLK3_USB48 FSA_USB48
CLK3_BSEL1
16-A3 16-B2 5% 16
FSB_TESTMODE CPU1
41 R806 33 1% CLK0_HCLK0
1 1 0 166 MHz CLK3_BSEL2
4-A3 6-C4 9-A4 53
FSC_TESTSEL CPU1*
40 R805 33 1% 6-C3
CLK0_HCLK0*
4-A3 6-C4 9-A4 6-C3
1 1 1 RSVD 55 44 R803 33 1%
CHP3_PCISTP* PCI_STOP* CPU0 CLK0_HCLK1
CHP3_CPUSTP*
16-C2 49-A4 54
CPU_STOP* CPU0*
43 R802 33 1% 8-B2
CLK0_HCLK1*
6-C4 16-C2 41-C449-A4 8-B2
C 10 36 R804 33 1%
C
CLK3_PWRGD* VTT_PWRGD*_PD CPU2_ITP_SRC7 CLK0_ITP
4-A4 27-C3 31-A4 41-B4 48-C2
CPU2*_ITP_SRC7*
35 R807 33 1% 7-B4
CLK0_ITP*
CLK3_PCLKCB
R740 33 1% 5
PCI5
7-B4
22-B4 48-C2 33
SRC6
CLK3_PCLKSIO R739 33 1% 4
PCI4 SRC6*
32
28-C3 49-D3
CLK3_PCLKDOCK R741 33 1% 3
PCI3 SRC5
31 R822 33 1% CLK1_MCH3GPLL
36-B4 49-B3
SRC5*
30 R821 33 1% 9-D4
CLK1_MCH3GPLL*
CLK3_PCLKMIN
R744 33 1% 56
PCI2
9-D4
34-C4 26
SRC4
CLK3_PCLKICH6M
R798 33 1% 9
PCIF1 SRC4*
27
16-C3 49-C2
SMB3_CLK 16-D2 18-B3 24-B4 48-B4
CLK3_PCLKBCM
R738 33 1% 8
PCIF0_ITPEN SRC3
24 R820 33 1%
CLK1_PCIEICH
SMB3_DATA
16-D2 18-B3 24-B4 48-B3 24-B4 49-D3
SRC3*
25 R819 33 1% 16-B1
CLK1_PCIEICH*
P3.3V 46 16-B1
P5V CLK3_SMBCLK