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5 4 3 2 1
DC/BATT IN
FAN + SENSOR
8* &PSGO (MEKVEQ
MAX6657MSA
PAGE 4
CLOCK GEN
ICS954310
D
CPU PAGE 5
D
DISCHARGER
Celeron M CIRCUIT
PAGE 37
PAGE 2,3
Power On Sequence
FSB PAGE 40
533MHz
DC/BATT IN
LVDS & INV
PAGE 12
MCH-M Dual Channel DDR2
PAGE 41
DDR2-667
CRT
PAGE 13
Calistoga SO-DIMM X 2
CPU VCORE
PAGE 50
TV OUT
943GML
B0:02G010009121
PAGE 14,15,16
T/P PAGE 13 SYSTEM PWR
C PAGE 6,7,8,9,10,11 C
PAGE 51
TPM DMI interface
PAGE 30
BAT & CHARGER
PAGE 42
PCIE *1 MINI CARD
PAGE 57
KEYPAD WLAN
PAGE 26
MATRIX
PAGE 29 LPC
EC IT8511E
INSTANT KEY
33MHz ICH7-M PCIE
*1
NEW
PAGE 29,30 Azalia CARD
PAGE 38 PAGE 25
PAGE B0:02G010008811
17,18,19,20 10/100 LAN
LED Control RTL8100CL
PAGE PAGE 34,35
30,38 USB PCI
SATA2 IDE
B ISA 33MHz B
ROM
USB 2.0
CardBus
PAGE 24
CON X4 R5C832 1394
HDD PAGE 31,32
PAGE 36 PAGE 32
(PATA,SATA)
PAGE 28
Bluetooth
ODD PAGE 27 CardBus CARD READER
Azalia Codec
R5C841 PAGE 33
AD1986A PAGE 28
PAGE
PAGE 21,22,23 Camera 43,44
PAGE 12
A
MDC A
FingerPrint PCMCIA
PAGE 35
PAGE 32
PAGE 39
Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC
Engineer: Leon and George
Size Project Name Rev
Custom 2.2
Date: , 25, 2007 Sheet 1 of 61
5 4 3 2 1
5 4 3 2 1
6 H_A#[16..3]
6 H_REQ#[4..0]
6 H_A#[31..17]
T202
H_D#[0..63] 6
U201A
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# 6
D H_A#4 L4 E2 H_BNR# U201B D
A[4]# BNR# H_BNR# 6
H_A#5 M3 G5 H_BPRI# H_D#0 E22 AA23 H_D#32
A[5]# BPRI# H_BPRI# 6 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# 6 E26 D[2]# D[34]# V24
H_A#8 N2 F21 H_DRDY# H_D#3 H22 V26 H_D#35
A[8]# DRDY# H_DRDY# 6 D[3]# D[35]#
H_A#9 J1 E1 H_DBSY# H_D#4 F23 W25 H_D#36
A[9]# DBSY# H_DBSY# 6 D[4]# D[36]#
H_A#10 N3 H_D#5 G25 U23 H_D#37
H_A#11 A[10]# H_BR0# R201 H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BR0# 6 E25 D[6]# D[38]# U25
H_A#12 P2 56Ohm H_D#7 E23 U22 H_D#39
H_A#13 A[12]# H_IERR# H_D#8 D[7]# D[39]# H_D#40
L1 A[13]# IERR# D20 +VCCP_AGTL+ K24 D[8]# D[40]# AB25
H_A#14 P4 B3 H_INIT# H_D#9 G24 W22 H_D#41
A[14]# INIT# H_INIT# 17 D[9]# D[41]#
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_LOCK# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 6 J23 D[11]# D[43]# AA26
H_ADSTB#0 L2 2 1 H_D#12 H26 Y26 H_D#44
6 H_ADSTB#0 ADSTB[0]# +VCCP_AGTL+ D[12]# D[44]#
B1 H_CPURST# H_D#13 F26 Y22 H_D#45
RESET# H_CPURST# 6 D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 R202 H_D#14 K22 AC26 H_D#46
REQ[0]# RS[0]# H_RS#0 6 D[14]# D[46]#
H_REQ#1 H2 F4 H_RS#1 54.9Ohm @ H_D#15 H25 AA24 H_D#47
REQ[1]# RS[1]# H_RS#1 6 D[15]# D[47]#
H_REQ#2 K2 G3 H_RS#2 H_DSTBN#0 H23 W24 H_DSTBN#2
REQ[2]# RS[2]# H_RS#2 6 T201 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#3 J3 G2 H_TRDY# H_DSTBP#0 G22 Y25 H_DSTBP#2
REQ[3]# TRDY# H_TRDY# 6 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#4 L5 H_DINV#0 J26 V23 H_DINV#2
REQ[4]# 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
G6 H_HIT#
HIT# H_HIT# 6
H_A#17 Y2 E4 H_HITM#
A[17]# HITM# H_HITM# 6
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# H_D#17 D[16]# D[48]# H_D#49
R3 AD4 K25 AC23 Layout Note:
H_A#20 A[19]# BPM[0]# H_D#18 D[17]# D[49]# H_D#50
W6 A[20]# BPM[1]# AD3 P26 D[18]# D[50]# AB22 Comp0,2 connect with Z0=27.4 ohm,
H_A#21 U4 AD1 H_D#19 R23 AA21 H_D#51 make trace length shorter than 0.5".
H_A#22 A[21]# BPM[2]# +VCCP_AGTL+ H_D#20 D[19]# D[51]# H_D#52
Y5 A[22]# BPM[3]# AC4 L25 D[20]# D[52]# AB21 Comp1,3 connect with Z0=54.9 ohm,
H_A#23 U2 AC2 PRDY# 1 T203 H_D#21 L22 AC25 H_D#53
H_A#24 A[23]# PRDY# H_PREQ# R203 56Ohm @ H_D#22 D[21]# D[53]# H_D#54 make trace length shorter than 0.5".
R4 A[24]# PREQ# AC1 L23 D[22]# D[54]# AD20
H_A#25 T5 AC5 H_TCK 1 R204 2 56Ohm H_D#23 M23 AE22 H_D#55 Comp[3:0] at least 25 mils away from
H_A#26 A[25]# TCK H_TDI R205 D[23]# D[55]# any other toggling signal.
C
T3 A[26]# TDI AA6 1 2 56Ohm H_D#24 P25 D[24]# D[56]# AF23 H_D#56
C
H_A#27 W3 AB3 H_TDO R206 56Ohm @ H_D#25 P22 AD24 H_D#57 27.4 ohm connects with an ~18mil
H_A#28 A[27]# TDO H_TMS R207 D[25]# D[57]#
W5 A[28]# TMS AB5 1 2 56Ohm GND H_D#26 P23 D[26]# D[58]# AE21 H_D#58 wide trace to comp0.
H_A#29 Y4 AB6 H_TRST# 1 R208 2 56Ohm H_D#27 T24 AD21 H_D#59
A[29]# TRST# +VCCP_AGTL+ D[27]# D[59]# 54.9 ohm connect with 5mil-wide
H_A#30 W2 C20 CPU_DBR# 1 T204 H_D#28 R24 AE25 H_D#60
H_A#31 A[30]# DBR# TPC28T H_D#29 D[28]# D[60]# H_D#61 to comp1
Y1 A[31]# L26 D[29]# D[61]# AF25
H_ADSTB#1 V4 D21 H_PROCHOT_S# H_D#30 T25 AF22 H_D#62
6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[30]# D[62]#
A24 CPU_THRM_DA H_D#31 N24 AF26 H_D#63
THERMDA CPU_THRM_DA 4 D[31]# D[63]#
H_A20M# A6 A25 CPU_THRM_DC R209 H_DSTBN#1 M24 AD23 H_DSTBN#3
17 H_A20M# A20M# THERMDC CPU_THRM_DC 4 6 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 6
H_FERR# A5 1KOhm H_DSTBP#1 N25 AE24 H_DSTBP#3
17 H_FERR# FERR# 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
H_IGNNE# C4 C7 PM_THRMTRIP# 1% H_DINV#1 M26 AC20 H_DINV#3
17 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# 4,7,17 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_STPCLK# D5 GTL_REF AD26 R26 H_COMP0 R210 1 2 27.4Ohm 1%
17 H_STPCLK# STPCLK# GTLREF COMP[0]
H_INTR C6 <500 mil (55 Ohm) MISC U26 H_COMP1 R211 1 2 54.9Ohm 1% GND
17 H_INTR LINT0 COMP[1]
H_NMI B4 A22 CLK_CPU_BCLK U1 H_COMP2 R212 1 2 27.4Ohm 1%
17 H_NMI
H_SMI# A3
LINT1 BCLK[0]
A21 CLK_CPU_BCLK#
CLK_CPU_BCLK 5
C201 R213 T/B trace 5 @R214 1
@ R214 2 TEST1 C26
COMP[2]
V1 H_COMP3 R215 1 2 54.9Ohm 1%
17 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5 TEST1 COMP[3]
0.1UF/10V 2KOhm Space 25 1KOhm
AA1 @ 1% R216 1 2 TEST2 D25 E5 H_DPRSTP#
RSVD[1] TEST2 DPRSTP# H_DPRSTP# 17,50
AA4 T22 51Ohm B5 H_DPSLP#
RSVD[2] RSVD[12] DPSLP# H_DPSLP# 17
AB2 A2 GND D24 H_DPWR#
RSVD[3] RSVD[A2] DPWR# H_DPWR# 6
AA3 CPU_BSEL0 B22 D6 H_PWRGD
RSVD[4] 5 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD 17
M4 D2 GND GND CPU_BSEL1 B23 D7 1
RSVD[5] RSVD[13] 5 CPU_BSEL1 BSEL[1] SLP#
N5 F6 CPU_BSEL2 C21 AE6 T205
RSVD[6] RSVD[14] 5 CPU_BSEL2 BSEL[2] PSI#
T2 D3 H_CPUSLP#
RSVD[7] RSVD[15] H_CPUSLP# 6,17
V3 C1 PM_PSI#
RSVD[8] RSVD[16] PM_PSI# 50
B2 AF1 BCLK FSB BSEL2BSEL1BSEL0 12G011204792
RSVD[9] RSVD[17]
C3 RSVD[10] RSVD[18] D22 12G04600479A
RSVD[19] C23 133 533 L L H
B25 RSVD[11] RSVD[20] C24
166 667 L H H
B B
12G04600479A 68 ? 5% pull-up to Vcc1_05
If PROCHOT# is not used, then it must be terminated with a
56 pull-up resistor to VCCP.
If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 75 Ohm ? 5%
+VCCP_AGTL+ +VCCP
@ +VCCP_AGTL+ +VCCP_AGTL+
JP201
1 2 R217 R218
H_PROCHOT_S# H_PWRGD
29 H_PROCHOT_S#
SHORT_PIN
56Ohm 56Ohm @
2.5A
+VCCP +VCCP 6,9,20,52
+VCCP_AGTL+ +VCCP_AGTL+ 3,5,6,9
A A
Title : YONAH CPU (1)
ASUSTeK COMPUTER INC
Engineer: Leon and George
Size Project Name Rev
Custom
Date: , 15, 2007 Sheet 2 of 61
5 4 3 2 1
5 4 3 2 1
YUNAH FSB667 YUNAH FSB667
U201D
LFM TYP HFM Min Typ Max A4 P6
+VCCP_AGTL+ +VCCP_AGTL+ 2,5,6,9
VCC 1.14V 1.2V 1.356V VCCP 0.997V 1.05V 1.102V VSS[1] VSS[82]
A8 VSS[2] VSS[83] P21 +VCORE +VCORE 50
C4 C3 C0 Min Typ Max A11 VSS[3] VSS[84] P24 +1.5VS +1.5VS 9,10,20,25,26,37,52
A14 R2
ICC 0.9A 7.59A 27A ICCP 2.5A A16
VSS[4] VSS[85]
R5
VSS[5] VSS[86]
A19 VSS[6] VSS[87] R22
A23 R25 +VCORE
VSS[7] VSS[88]
A26 VSS[8] VSS[89] T1
B6 VSS[9] VSS[90] T4
D B8 VSS[10] VSS[91] T23 D
+VCORE +VCORE B11
B13
VSS[11]
VSS[12]
VSS[92]
VSS[93]
T26
U3 1215---PWR comp Vcc Core Decoupling Caps
U201C B16 U6 + Place the cap on North
A7 VCC[1] VCC[68] AB20 B19
VSS[13]
VSS[14]
VSS[94]
VSS[95] U21 CE301 Primary side => Bottom side
A9 AB7 B21 U24 220UF/4V of Secondary side
A10
VCC[2]
VCC[3]
VCC[69]
VCC[70] AC7 B24
VSS[15]
VSS[16]
VSS[96]
VSS[97] V2 @ Secondary side => Top side
A12 VCC[4] VCC[71] AC9 C5 VSS[17] VSS[98] V5
A13 VCC[5] VCC[72] AC12 C8 VSS[18] VSS[99] V22
A15 AC13 C11 V25 GND
VCC[6] VCC[73] VSS[19] VSS[100]
A17 VCC[7] VCC[74] AC15 C14 VSS[20] VSS[101] W1
A18 VCC[8] VCC[75] AC17 C16 VSS[21] VSS[102] W4
A20 VCC[9] VCC[76] AC18 C19 VSS[22] VSS[103] W23
B7 VCC[10] VCC[77] AD7 C2 VSS[23] VSS[104] W26 Place these upper side inside socket cavity on L1
B9 VCC[11] VCC[78] AD9 C22 VSS[24] VSS[105] Y3
B10 VCC[12] VCC[79] AD10 C25 VSS[25] VSS[106] Y6
B12 VCC[13] VCC[80] AD12 D1 VSS[26] VSS[107] Y21
B14 AD14 D4 Y24 C302 C303 C304 C305 C306 C307
VCC[14] VCC[81] VSS[27] VSS[108]
B15 VCC[15] VCC[82] AD15 D8 VSS[28] VSS[109] AA2
B17 AD17 D11 AA5 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCC[16] VCC[83] +VCCA +1.5VO VSS[29] VSS[110]
B18 VCC[17] VCC[84] AD18 D13 VSS[30] VSS[111] AA8
B20 VCC[18] VCC[85] AE9 D16 VSS[31] VSS[112] AA11
C9 AE10 JP301 D19 AA14 GND GND GND GND GND GND
VCC[19] VCC[86] VSS[32] VSS[113]
C10 VCC[20] VCC[87] AE12 1 1 2 2 D23 VSS[33] VSS[114] AA16
C12 VCC[21] VCC[88] AE13 D26 VSS[34] VSS[115] AA19
1MM_OPEN_5MIL
C13
C15
VCC[22] VCC[89] AE15
AE17 @
E3
E6
VSS[35] VSS[116] AA22
AA25
Place these lower side inside socket cavity on L1 R2.2
VCC[23] VCC[90] VSS[36] VSS[117]
C17 VCC[24] VCC[91] AE18 E8 VSS[37] VSS[118] AB1
C18 AE20 E11 AB4 C308 C309 C310 C311 C312 C313
C VCC[25] VCC[92] VSS[38] VSS[119] C
D9 AF9 E14 AB8
D10
VCC[26]
VCC[27]
VCC[93]
VCC[94] AF10 E16
VSS[39]
VSS[40]
VSS[120]
VSS[121] AB11 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Reduce ESD
D12 VCC[28] VCC[95] AF12 E19 VSS[41] VSS[122] AB13
D14 VCC[29] VCC[96] AF14 E21 VSS[42] VSS[123] AB16
D15 VCC[30] VCC[97] AF15 E24 VSS[43] VSS[124] AB19 GND GND GND GND GND GND
D17 VCC[31] VCC[98] AF17 F5 VSS[44] VSS[125] AB23
D18 AF18 +VCCP_AGTL+ F8 AB26
VCC[32] VCC[99] VSS[45] VSS[126]
E7 VCC[33] VCC[100] AF20 F11 VSS[46] VSS[127] AC3 Place these upper side inside socket cavity on L6
E9 VCC[34] F13 VSS[47] VSS[128] AC6
E10 VCC[35] VCCP[1] V6 F16 VSS[48] VSS[129] AC8
E12 VCC[36] VCCP[2] G21 7 0Ohm 8 RN303D F19 VSS[49] VSS[130] AC11
E13 J6 F2 AC14 C314 C315 C316 C317
VCC[37] VCCP[3] VSS[50] VSS[131]
E15 VCC[38] VCCP[4] K6 F22 VSS[51] VSS[132] AC16
E17 M6 F25 AC19 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCC[39] VCCP[5] VSS[52