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5 4 3 2 1
N20A: PENRYN/CANTIGA/ICH9-M BLOCK DIAGRAM
Small-Board
D D
Power Switch LED
PENRYN Board
PAGE S6
PAGE 3~5
FSB 1066MHz CLOCK GEN.
LVDS ICS/9LPR363
PAGE 29
PAGE 45
DDR-II
MCH DDR2 667/800 MHz
SO-DIMMx2 FAN + Thermal sensor
Small-Board CRT
CANTIGA PAGE 6~8 PAGE 50
PAGE 46
HDMI PAGE 9~14 Sub-Board POWER
PAGE 48 DMI *4 GigaLAN VCORE
C
RTL8111C LAN IO PAGE 80 C
Sub-Board PAGE 33
SYSTEM
ALAZIA PAGE 56
PAGE 81
PCIE *1 MiniCard
MDC WLAN 1.5VS,1.05VS
PAGE S5
PAGE 53 PAGE 82
AUDIO BOARD Azalia ICH9-M
Express Card DDR&VTT
ALC663 LPC PAGE 83
PAGE S3 PAGE 43
+1.25VS&2.5VS
PAGE 20~24 PAGE 84
MIC PREAMP AUDIO_AMP SPDIF USB * VGACore &
& INT MIC & INT SPK JACK 3ports +1.25VO
PAGE 85
PAGE S5 PAGE S4 PAGE S4 PAGE 52
DC/BAT
SATA Bus
SATA Bus
SHUTDOWN#
BT Connector PAGE 87
B PAGE 60 B
PAGE 61
CHARGER
PAGE 80
Small-Board USB2.0 Bus
TPM CMOS Discharge DETECT
PAGE 66 PAGE 90
PAGE 62 PAGE 57
TouchPad
Sub-Board LOAD SWITCH
SATA USB * System
PAGE 58 PAGE 91
1port
KBC HDD PAGE S1 Resource PROTECT
PAGE 51 PAGE 2
BIOS SPI ROM
8752 MiniCard SIM
PAGE 92
PAGE 31
SATA WWAN Card Power On POWER SIGNAL
INTERNAL PAGE 30~31
ODD
PAGE S2
Sequence PAGE 93
PAGE 32
KEYBOARD PAGE 51
TFT-LED DRIVE
PAGE 31
DeBug port Rev. PAGE 94
Card
A
PAGE 44 Reader History FLOWCHART A
PAGE 95
PAGE 42 PAGE 69
Finger Small-Board
Printer Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC Engineer: Ryan_Wang
Size Project Name Rev
Custom N20A 1.20
Date: Monday, June 02, 2008 Sheet 1 of 101
5 4 3 2 1
A B C D E
N20A Schematic Index
Page System page Ref. ICH9-M GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power
01 Block Diagram GPIO 00 GPI PMSYNC#(programmed as GPO) +3VS GPA0 GPO PWR_LED_UP# - - -
1 02 Schematic Information GPIO 01 GPI DOCKING_DET# EXT PU +3VS GPA1 GPO CHG_LED_UP# GPG6 GPO BAT2_CNT2# 1
03-05 CPU-Penryn GPIO [2:5] GPI PCI_INT[E:H]# EXT PU +5VS GPA2 GPO BATSEL_3S# - - -
07-09 DDR II SO-DIMM GPIO 06 GPI - EXT PU +3VS GPA3 - - GPH0 OD PM_CLKRUN#
10-15 Cantiga GPIO 07 GPI - EXT PU +3VS GPA4 GPO LCD_BL_PWM GPH1 ALT -
20-24 ICH9M GPIO 08 GPI EXT_SMI# EXT PU +3VSUS GPA5 GPO FAN0_PWM GPH2 ALT -
25 SPI ROM GPIO 09 Native WOL_EN +3VSUS GPA6 GPO BAT1_CNT1# GPH3 GPO BAT_LEARN
29 CLK-ICS9LPR363CGLF-T GPIO 10 GPI SUS_PWR_ACK EXT PU +3VSUS GPA7 GPO BAT2_CNT1# GPH4 GPO -
30-31 EC_IT8752 GPIO 11 Native EXT_SCI#(Programmed as GPI) +3VSUS GPB0 GPO CHG_EN# GPH5 GPO NUM_LED
32 POWER-ON SEQUENCE GPIO 12 GPO - +3VSUS GPB1 GPO PRECHG GPH6 GPO CAP_LED
33 Realtek RTL8111C GPIO 13 GPI CB_SD#(Programmed as GPO) +3VSUS GPB2 GPI DISTP# - - -
34 RJ45 + RJ11 GPIO 14 GPI AC_PRESENT EXT PD +3VSUS GPB3 ALT SMB0_CLK GPI0 GPI -
35 MDC GPIO 15 Native STP_PCI# +3VSUS GPB4 ALT SMB0_DAT GPI1 GPI SUS_PWRGD
36 ALC663 Codec GPIO 16 Native PM_DPRSLPVR INT PD* +3VS GPB5 OD A20GATE GPI2 GPI ALL_SYSTEM_PWRGD
2 37 AUDIO_G1431 & HP GPIO 17 GPI WLAN_LED(Programmed as GPO) +3VS GPB6 OD RCIN# GPI3 GPI VRM_PWRGD 2
38 MICROPHONE & Array MIC GPIO 18 GPO - +3VS GPB7 GPO PM_RSMRST# GPI4 GPI PWR_MON
39 FM2010 DSP GPIO 19 GPI - EXT PU +3VS GPC0 GPI MARATHON# GPI5 GPI PD_DET#
40 CARDBUS R5C833(PCI I/F) GPIO 20 GPO - INT PD* +3VS GPC1 ALT SMB1_CLK GPI6 GPI KB_ID0
41 CARDBUS R5C833(1394 & SD) GPIO 21 GPI - EXT PU +3VS GPC2 ALT SMB1_DAT GPI7 GPI KB_ID1
42 IEEE1394A & 4 IN1 CON GPIO 22 GPI BT_DET# EXT PU +3VS GPC3 GPO PM_PWRBTN# GPJ0 GPO EC_CLK_EN
43 NewCard PWR SW & CON GPIO 23 Native ICH_LDRQ1# INT PU +3VS GPC4 ALT AC_IN_OC# GPJ1 GPO PM_PWROK
44 Debug GPIO 24 GPO WLAN_ON +3VSUS GPC5 GPO OP_SD# GPJ2 GPI UNDOCK#_PD
45 LVDS & INVERTER CONNECTOR GPIO 25 Native STP_CPU# +3VSUS GPC6 ALT BAT1_IN_OC# GPJ3 - -
46 CRT GPIO 26 Native PM_S4_STATE# +3VSUS GPC7 GPO 3G_ON# GPJ4 GPO BL_DA
48 HDMI GPIO 27 GPO BT_ON +3VSUS GPD0 GPI PWRLIMIT# GPJ5 GPO FAN_DA
50 THER SENSOR & FAN GPIO 28 GPO BT_LED +3VSUS GPD1 ALT PM_S4_STATE# GPK0 GPI PM_SLP_M#
51 HDD & CDROM GPIO 29 Native USB_OC#5 +3VSUS GPD2 ALT BUF_PLT_RST# GPK1 GPI SUSPWR_ACK
3 3
52 USB Port x 4 GPIO 30 Native USB_OC#6 +3VSUS GPD3 OD EXT_SCI# GPK2 GPI PM_SUSC#
53 MINICARD(Ebron/Robson/3G/TV) GPIO 31 Native USB_OC#7 +3VSUS GPD4 OD EXT_SMI# GPK3 GPI +3VM_PG
54 PORT Docking GPIO 32 GPO PM_CLKRUN# +3VS GPD5 GPO LCD_BACKOFF# GPK4 GPI +1.05VM_+3VMCLK_PG
55 Super I/O & FIR GPIO 33 GPO - INT PU* +3VS GPD6 ALT FAN0_TACH GPK5 GPI LAN_WOL_EN
56 LED/TP/SW GPIO 34 GPO - +3VS GPD7 GPI COLOREN# GPL0 GPI AC_APR_UC#
GPIO33 Internal Pull High, Go Low= Flash
57 DISCHARGE GPIO 35 GPO - +3VS GPE0 GPO VSUS_ON GPL1 GPI -
58 UMB GPIO 36 GPI - EXT PU +3VS GPE1 GPO SUSC_EC# GPL2 GPO -
Descriptor Security will be overriden
60 DC power jack, Batter conn. GPIO 37 GPI PCB_ID0 +3VS GPE2 GPO SUSB_EC1# GPL3 GPO LAN_RST#
61 Blue Tooth GPIO 38 GPI PCB_ID1 +3VS GPE3 GPO CPU_VRON GPL4 GPO CL_PWROK
62 TPM GPIO 39 GPI PCB_ID2 +3VS GPE4 ALT PWR_SW# GPL5 GPO EC_WLAN_PWR
63 Finger Print GPIO 40 Native USB_OC01# +3VSUS GPE5 ALT BAT2_IN_OC# GPL6 GPO SLP_M_ON
65 MDC NUT & Hinksink NUT GPIO 41 Native USB_OC2# +3VSUS GPE6 GPI LID_SW# GPL7 GPO S4_STATE_ON
66 E-SATA GPIO 42 Native USB_OC3# +3VSUS GPE7 GPO PM_THERM# GPK6 GPO AC_PRESENT
4 4
68 XDP GPIO 43 Native USB_OC4# +3VSUS GPF0 GPI BLUETOOTH# GPK7 GPI PS_CPPE#
70-77 VGA (nVidia NB9P-GE) GPIO 44 Native CLK_DEC# +3VSUS GPF1 GPI WIRELESS#
80 POWER_VCORE GPIO 45 Native CLK_ACC +3VSUS GPF2 ALT PS2_CLK_5S_PD
81 POWER_SYSTEM GPIO 46 Native NEWCARD_OC# +3VSUS GPF3 ALT PS2_DATA_5S_PD
82 POWER_I/O_1.5V & 1.05VM GPIO 47 Native UNDOCKING# +3VSUS GPF4 ALT TP_CLK
83 POWER_I/O_DDR & VTT GPIO 48 GPI EMAIL_LED# EXT PU +3VS GPF5 ALT TP_DAT
84 NONE GPIO 49 GPO GPU_RST# INT PU* +3VS GPF6 GPO THRO_CPU
85 POWER_VGA_VCORE & 1.1VO GPIO 50 Native PCI_REQ#1 +5VS GPF7 GPO PS_SHDN#
88 POWER_CHARGER GPIO 51 Native PCI_GNT#1 INT PU* +3VS GPG0 GPI INSTANT_ON#
90 POWER_DETECT GPIO 52 Native PCI_REQ#2 +5VS GPG1 ALT PM_SUSB#
91 POWER_LOAD SWITCH GPIO 53 Native PCI_GNT#2 INT PU* +3VS GPG2 GPO BAT1_CNT2#
92 POWER_PROTECT GPIO 54 Native PCI_REQ#3 +5VS - - -
93 POWER_SIGNAL GPIO 55 Native PCI_GNT#3 INT PU* +3VS - - -
5 5
94 POWER_FLOWCHART GPIO 56 GPI - EXT PU +3VSUS
GPIO 57 GPI - EXT PU +3VSUS
GPIO 58 GPI SPI_CS#1 INT PU* +3VSUS Title : Schematic Information
GPIO 59 Native USB_OC0# +3VSUS ASUSTeK COMPUTER INC. NB1 Engineer: Ryan_Wang
INT PU*: PU or PD in
Size Project Name Rev
special time GPIO 60 Native LINKALERT# +3VSUS
Custom N20A 1.20
Date: Monday, June 02, 2008 Sheet 2 of 101
A B C D E
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
H_REQ#[4:0]
10 H_REQ#[4:0]
T0318 Reserved for the
S3 reboot issue
T0319
1
H_CPURST#
U0301A U0301B
1
D H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32 D
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
1
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 C0303 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M3 H5 10PF/50V H_D#4 F23 V23 H_D#36
H_DEFER# 10
2
H_A#8 A[7]# DEFER# @ H_D#5 D[4]# D[36]# H_D#37
N2 A[8]# DRDY# F21 H_DRDY# 10 G25 D[5]# D[37]# T22
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# +VCCP_CPU H_D#8 D[7]# D[39]# H_D#40
P5 F1 H_BR0# 10 K24 Y25
DATA GRP 2
H_A#12 A[11]# BR0# H_D#9 D[8]# D[40]# H_D#41
P2 G24 W22
CONTROL
H_A#13 A[12]# D[9]# D[41]#
L2 A[13]# IERR# D20 H_IERR# R0309 1 2 56Ohm H_D#10 J24 D[10]# D[42]# Y23 H_D#42
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 20 D[11]# D[43]#
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
H_REQ#4 L1 REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 1 T0324 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 U4 AD1 H_D#21 M24 AC26 H_D#53
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L22 D[22]# D[54]# AD20
H_A#23 U1 AC2 1 T0326 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# XDP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 XDP_TCK H_D#25 P23 AC25 H_D#57
C
H_A#26 A[25]# TCK XDP_TDI H_D#26 D[25]# D[57]# H_D#58 C
T3 AA6 P22 AE21
DATA GRP 3
H_A#27 A[26]# TDI XDP_TDO +VCCP_CPU H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 XDP_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS XDP_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 XDP_DBR# H_D#30 T25 AF22 H_D#62
H_A#31 A[30]# DBR# R0315 H_D#31 D[30]# D[62]# H_D#63
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25 Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
A[32]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#33 AA4 THERMAL 1% M26 AF24
A[33]# 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10 Comp 1,3: Z0=55 Ohm, trace length < 0.5"
H_A#34 AB2 N24 AC20
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0311 1 2 27.4Ohm 1%
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THRM_DA 50 GTLREF COMP[0]
T0320 1 B25 R0317 2 @ 1% 1 1KOhmCPU_TEST1 C23 MISC U26 H_COMP1 R0312 1 2 54.9Ohm 1%
THRMDC CPU_THRM_DC 50 TEST1 COMP[1]
2
A6 R0318 2 @ 1% 1 1KOhmCPU_TEST2 D25 AA1 H_COMP2 R0313 1 2 27.4Ohm 1%
20 H_A20M# A20M# TEST2 COMP[2]
1
ICH
20 H_FERR# A5 FERR# THERMTRIP# C7 H_THRMTRIP# 5,11,20
R0316 T0304 1 CPU_TEST3 C24 TEST3 COMP[3] Y1 H_COMP3 R0314 1 2 54.9Ohm 1%
C4 C0301 2KOhm CPU_TEST4 AF26 1
20 H_IGNNE# IGNNE# T0302 TEST4
T0321 1 0.1UF/10V 1% T0306 1 CPU_TEST5 AF1 E5 H_DPRSTP# 11,20,80
T0322