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NEe
....~ Advanced
A~"'Personal Computer
TM
APe System Reference Guide
NEe
NEe Information Systems, Inc.
819-000100-1003
4-83
LIMITED WARRANTY
AND
LIABILITY DISCLAIMER
NEC Information Systems, Inc. products are warranted in accordance with the
terms of the applicable NEC Information Systems, Inc. products specification.
Product performance is affected by system configuration, software, the application,
customer data, and operator control of the system among other factors. While NEC
Information Systems, Inc. products are considered to be compatible with most
systems, the specific functional implementation by customers of the products may
vary.
Therefore, the suitability of a product for a specific application must be determined
by the customer and is not warranted by NEC Information Systems, Inc.
This manual is as complete and factual as possible at the time of printing, however,
the information in this manual may have been updated since that time. NEC
Information Systems, Inc. reserves the right to change the functions, features, or
specifications of its products at any time, without notice.
NEC Information Systems, Inc. has prepared this document for use by NECIS
employees and customers. The information contained herein is the property of
NECIS and shall not be reproduced in whole or in part without prior written
approval from NECIS.
First Printing - September 1982
Revised - December 1982
Revised - March 1983
Copyright 1982
NEC Information Systems, Inc.
5 Militia Drive
Lexington, MA 02173
Printed in U.S.A.
FEDERAL COMMUNICATIONS COMMISSION RADIO
FREQUENCY INTERFERENCE STATEMENT
"w ARNING: This equipment generates, uses and can radiate radio frequency
energy and if not installed and used in accordance with the instructions manual,
may cause interference to radio communications. It has been tested and found to
comply with the limits for a Class A Computing device pursuant to Subpart] of
Part 15 of FCC Rules, which are designed to provide protection against such
interference. Operation of the equipment in a residential area is likely to cause
interference in which case, the user will be required to take whatever measures may
be required to correct the interference."
Manufacturer's Instructions and User's Responsibility
to Prevent Radio Frequency Interference
Manufacturer's Instructions
The user must observe the following precautions when installing and operating this
device:
1. Operate the equipment in strict accordance with the manufacturer's
instructions for the model.
2. Ensure that the unit is plugged into a properly grounded wall outlet and
that the power cord supplied with the unit is used and not modified.
3. Ensure that the unit is always operated with the factory-installed cover set
on the unit.
4. Make no modifications to the equipment which would affect its meeting the
specified limits of the Rules.
5. Properly maintain the equipment in a satisfactory state of repair.
User's Responsibility
The user has the ultimate responsibility to correct problems arising from harmful
radio-frequency emissions from equipment under his control. If this equipment
does cause interference to radio or television reception, which can be determined by
turning the equipment off and on, the user is encouraged to try to correct the
interference by one of the following measures. All of these responsibilities and any
others not mentioned are exclusively at the expense of the user.
111
1. Change in orientation of the receiving device antenna.
2. Change in orientation of the equipment.
3. Change in location of equipment.
4. Change in equipment power source.
If these attempts are unsuccessful, install one or all of the following devices:
1. Line isolation transformers
2. Line filters
3. Electro-magnetic shielding
If necessary, the user should consult the dealer, NEC, or an experienced radioltele-
vision technician for additional suggestions. The user may find the following
booklet prepared by the Federal Communications Commission to be helpful: "How
to Identify and Resolve Radio-TV Interference Problems." This booklet is available
from the U.S. Government Printing Office, Washington, D.C. 20402, Stock No.
004-000-00345-4.
"N ote: The operator of a computing device may be required to stop operating his
device upon finding that the device is causing harmful interference and it is in the
public interest to stop operation until the interference problem is corrected."
iv
Contents
Page
PREFACE ...................................................... Xlii
CHAPTER 1 HARDWARE OVERVIEW
CHAPTER 2 PROCESSOR PCB
2.1 MOTHER BOARD/CARD CAGE INTERFACE ......... 2-3
2.2 MICROPROCESSOR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-13
2.3 DIRECT MEMORY ACCESS .......................... 2-14
2.4 INTERVAL TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-19
2.5 INTERRUPT CONTROL. . . . . . . . . . . . . . . . . .. . . . . . . . . . .. 2-20
2.6 MEMORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-26
2.6.1 Main Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-27
2.6.2 Battery-Backed Memory. . . . . . . . . . . . . . . . . . . . . . .. 2-28
2.6.3 Read Only Memory ............................ 2-29
2.7 PARALLEL PRINTER CONTROL ...................... 2-29
2.7.1 Interface ...................................... 2-29
2.7.2 Programming Considerations. . . . . . . . . . . . . . . . . . .. 2-29
2.8 KEYBOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-38
2.8.1 Keyboard Layout and Scan Codes. . . . . . . . . . . . . . .. 2-39
2.8.2 Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-41
2.9 CALENDAR AND CLOCK GENERATOR .............. 2-42
2.9.1 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-43
2.9.2 Programming Considerations. . . . . . . . . . . . . . . . . . .. 2-44
2.10 JUMPER SETTINGS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-44
CHAPTER 3 CONTROLLER PCB
3.1 MOTHER BOARD/CARD CAGE INTERFACE ......... 3-1
3.2 CRT DISPLAY CONTROL ............................ 3-4
3.2.1 Display Buffer Memory. . . . . . . . . . . . . . . . . . . . . . . .. 3-5
3.2.2 Programming Considerations. . . . . . . . . . . . . . . . . . .. 3-8
3.3 CRT DISPLAY UNIT ................................. 3-18
3.4 FLEXIBLE DISK DRIVE CONTROLLER. . . . . . . . . . . . . .. 3-21
3.4.1 Programming Considerations. . . . . . . . . . . . . . . . . . .. 3-24
3.4.2 Drive A and B Interface. . . . . . . . . . . . . . . . . . . . . . . .. 3-37
v
Contents (cont'd)
Page
3.5 FDD UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-39
3.5.1 Specifications ................................. , 3-39
3.5.2 Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-40
3.5.3 Terminations and Jumper Settings. . . . . . . . . . . . . . .. 3-40
3.6 SERIAL I/O COMMUNICATIONS CONTROLLER ..... , 3-43
3.6.1 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-43
3.6.2 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-43
3.6.3 Interface ..................................... , 3-43
3.6.4 Programming Considerations ................... , 3-43
3.6.4.1 Asynchronous Operating Mode .................. 3-50
3.6.4.2 Synchronous Operating Mode ................... 3-53
3.6.4.3 Business Machine Operating Mode ............... 3-57
3.6.5 Status Word Format ........................... 3-59
3.7 SOUND CONTROL .................................. , 3-60
3.7.1 Interface ...................................... 3-61
3.7.2 Programming Considerations. . . . . . . . . . . . . . . . . . .. 3-62
3.8 ARITHMETIC PROCESSING UNIT. . . . . . . . . . . . . . . . . . .. 3-62
3.9 JUMPER SETTINGS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-64
CHAPTER 4 POWER SUPPLY
APPENDIX A INTEGRATED CIRCUIT DATA SHEETS
Al 16-BIT MICROPROCESSOR ........................... AI-I
A2 PROGRAMMABLE COMMUNICATION INTERFACES .. A2-1
A3 SINGLE/DOUBLE DENSITY FLOPPY DISK
CONTROLLER ....................................... A3-1
A4 GRAPHICS DISPLAY CONTROLLER .................. A4-1
APPENDIX B LOGIC AND SCHEMATIC DIAGRAMS
VI
Contents (cont'd)
APPENDIX C PROGRAMMABLE ARRAY LOGIC DECODING
SPECIFICATIONS
APPENDIX D CHARACTER CODE AND KEYBOARD
INFORMATION
APPENDIX E 110 PORT ADDRESSES AND INSTRUCTIONS
APPENDIX F HARDWARE SPECIFICATIONS
Vll
List of Illustrations
Figure Title Page
1-1 System Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-2
2-1 Processor PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
2-2 Processor PCB Block Diagram .............................. 2-2
2-3 Mother Board/Card Cage Intp.rface . . . . . . . . . . . . . . . . . . . . . . . . .. 2-3
2-4 Processor Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-8
2-5 DMA Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-9
2-6 RD Y Signal Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-10
2-7 RFSH Signal Timing ...................................... , 2-10
2-8 Processor T nterface Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-11
2-9 Device Interface Circuits ................................... 2-12
2-10 DMA Command and Mode Registers ........................ 2-16
2-11 DMA Request and Mask Register. . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-17
2-12 DMA Status Register ...................................... 2-19
2-13 Interval Timer Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-19
2-14 Interrupt Control Block Diagram ............................ 2-21
2-15 Interrupt Initialization Command Words ..................... 2-24
2-16 Interrupt Operation Command Words ............ , ........... 2-25
2-17 System Memory Map ...................................... 2-26
2-18 Main Memory Block Diagram ............................... 2-27
2-19 Battery-Backed Memory Block Diagram ...................... 2-28
2-20 Parallel Printer Control Block Diagram ....................... 2-30
2-21 Parallel Printer Cable Connections ........................... 2-32
2-22 Parallel Printer Controller Interface Timing ................... 2-36
2-23 Parallel Printer Controller Interface at Paper Out Status ........ 2-37
2-24 Keyboard Block Diagram ................................... 2-38
2-25 Keyboard Layout .......................................... 2-39
2-26 Keyboard Interface ........................................ 2-41
2-27 Clock/Calendar Block Diagram ............................. 2-43
2-28 Clock/Calendar Format .................................... 2-45
2-29 Proce<:sor PCB Jumper Settings .............................. 2-46
3-1 Controller PCB ..........................