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5 4 3 2 1
DDRII-SODIMM1
ZK8 BLOCK DIAGRAM CPU_CORE0
CPU VDDNB_CORE
CPU CORE
PG 35
PCB STACK UP
LAYER 1 : TOP
01
PG 7,8 DDR II 667 MHZ +NB_CORE NB CORE LAYER 2 : GND
HOST 200MHz (1.0~1.2V)
CPU_CLK LAYER 3 : IN1
AMD S1g3 CLOCK GENERATOR PCIE 100MHz
PG 36
NBGFX_CLK
LAYER 4 : IN2
DDRII-SODIMM2 ICS9LPRS476AKLFT +2.5V
D
Caspian Processor +2.5V LAYER 5 : VCC D
PG 7,8 NBGPP_CLK SLG8SP628VTR
USB 48MHz
+1.5V +1.5V LAYER 6 : BOT
RTM880N-795 REF 14MHz +1.1V_NB +1.1V_NB
Side port SBLINK_CLK
PG 3 +1.2V_S5 +1.2V_S5 PG 38
(638 S1g3 socket) Daughter Board
PG 9
PG 4,5,6
+1.2V
+1.2V PG 38 MMB Board
HT_LINK
GIGALAN RJ45
LVDS MUX*2 PCI-E, 1X (port4)
LVDS CONN AR8131 +1.8VSUS +1.8VSUS
PG 19 PG 19 PG 22 PG 23 SMDDR USB Board
+1.8V
LVDS(2ch)
RS880M PCI-E, 1X (port2) +SMDDR_VTERM VTERM PG 37
Mini Card (WLAN)
PG 24 Touch Pad board
CRT MUX +3VPCU
LVDS(2ch)
CRT 21mm X 21mm, 528pin BGA
CRT CONN PCI-E, 1X (port3) +3V_S5 3V/5V
PG 20 PG 20 MINI CARD (TV) +3VSUS
PG 24 Touch Pad board
+3V
C CRT (with Fingerprinter) C
PG 9,10,11,12 +5VPCU
+5V
PG 34 Power Buttom board
A_LINK (X4) SBSRC_CLK
MXM 3.0 CONN PCI-E X16
Type A PG 18 USB2.0 (P3/11) USB2.0 MINI CARD Ports X2 Programming Buttom
(MB) PG 24
USB2.0 (P5) CCD board
HDMI HDMI CONN HDMI PG 20
SB710 USB2.0 (P8) High speed EXT USB
PG 21
USB2.0 (P9) Fingerprint (MB) PG 30
PG 31
USB2.0 (P1/2) USB2.0 I/O Ports X2
SATA HDD SATA0 USB2.0 (P4)
Card Reader (MB) PG 30
PG 25 RTS5159
USB Board USB2.0 (P0) USB2.0 I/O Ports X1
USB2.0 (P10) (DB) PG 30
B
SATA ODD SATA4 Bluetooth B
21mm X 21mm, 528pin BGA
PG 23
PG 25
4.5W(Ext)
Azalia
Digital MIC
4.3W(Int)
PI2EQX3201 Azalia Audio Codec
eSATA CONN SATA2
eSATA reDriver ALC888S
PG 26
PG 30
PORT-A
PG 30 MDC CONN MDC
RJ11
Board
PORT-B
PG 13,14,15,16,17
PG 26
Sub woofer Amp
LPC
HP+Speaker MAX9737
Amplifier PG 27
AN12947A PG 27
EC
WPCE775 H.P/ INT. MIC Line in
Sub woofer
A SPDIF S.P. JACK Jack A
PG 32
PG 27 PG 27 PG 27 PG 27 PG 27
SPI
Flash Touch Palm Rest Quanta Computer Inc.
PWM FAN Keyboard CIR
ROM Pad thermal sensor PROJECT : ZK8
Size Document Number Rev
PG 31 PG 31 PG 32 PG 31 PG 32 PG 32 3A
BLOCK DIAGRAM
Date: Monday, May 04, 2009 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
ZK8 Power On Sequence
02
BOM naming rule
From AC,Battery VIN
+5VPCU +3VPCU Items Function BTO Name Description
D From PWM SYS_HWPG(PCU) 1 CIR v CIR@
D
From Power Button NBSWON#
2 HDMI port v HDM@
From EC S5_ON
+3V_S5 3 HDMI transmitter v SI@ Silicon image SiI 1392/1932
+1.2V_S5 30ms 4 HDMI-CEC v CEC@ Renesas R8C/1B
From EC RSMRST# >100ms
5 Discrete VGA EV@ External VGA stuff
From EC DNBSWON#
From SB PCIE_WAKE# 6 UMA IV@ Internal VGA stuff
From SB to EC SUSB#,SUSC# SUSON
7 New Card NEW@
From EC SUSON
8 RJ11 v MD@ Modem
+3VSUS +1.8VSUS SMDDR_VREF,SMDDR_VTERM
From PWM HWPG_1.8V MAINON 9 RJ45-10/100 40@ Marvell 8040T(10/100)
From EC MAINON 10 RJ45-1000 55@ Marvell 8055(Giga)
+5V +3V +2.5V +1.8V +1.5V
C 11 Option for RJ45-10/100 and RJ45-1000 40@55@ Option for 8040/8055 C
From LDO HWPG_1.5V
MAINON
From EC VRON 12 TV v TV@
CPU_CORE0,CPU VDDNB_CORE 13 Cardbus CB@
From PWM CPU_COREPG(CPU)
14 FM transmitter v FM@
From EC +1.2V_ON
+1.2V,+NB_CORE,+1.1V_NB 15 Mainstream ID LED MID@
From PWM HWPG_1V_NB,HWPG_NBCORE,HWPG_1.2V 16 Low cost ID LED LID@
HWPG
17 CCD v CCD@
From EC PWROK_EC
SB_PWRGD_IN 18 INT MIC v I_MIC@
0~30ns
From SB WD_PWRGD 19 AMD Hyper Flash HF@ Only for AMD platform
NB_PWRGD_IN(level shift) 99ms~108ms
20 North bridge(690MC/RS780MC) MC@ Only for AMD platform
From SB CPU_PWRGD 102ms~113ms
From SB PLTRST# ,PCIRST# 21 North bridge(RX780) RX@ Only for AMD platform
B
1.9ms~2.3ms B
From SB CPU_LDT_RST# 22 PowerXpress PX@ Only for AMD platform
From SB CPU_LDT_STOP# >1us
23 PowerXpress with UMA SKU PX@IV@ Only for AMD platform
24 PowerXpress with Discrete VGA SKU PX@EV@ Only for AMD platform
25 Power player/Power Shift PP@ Only for AMD platform
*Note: EC will sampling SUSB# & EC SMBUS Table
SUSC# every 5ms. Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor MMB
AMD SB710 SMBUS Table EC775 SDATA1/SCLK1(+3VPCU) V
CLK GEN RAM Mini Card TV) Mini-card(WL) LAN EC775 SDATA2/SCLK2(+3VPCU) V V
SB710 SDATA0/SCLK0(+3V) V V V V V EC775 SDATA3/SCLK3(+3VPCU) V V
A A
SB710 SDATA1/SCLK1(+3V_S5) EC775 SDATA4/SCLK4(+3VPCU)
SB710 SDATA2/SCLK2(+3V_S5) Power +3VPCU +3V +3VPCU +3V +3VPCU
Power +3V +3V +3V +3V +3V (Atheros) Reserve MOS ckt X X X X X
Reserve MOS ckt V X V V X
Quanta Computer Inc.
PROJECT : ZK8
Size Document Number Rev
3A
SYSTEM INFORMATION
Date: Monday, May 04, 2009 Sheet 2 of 42
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628(CLK)
03
+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO
+3V L56 L58
BK1608HS600/500mA/60ohm_6 BK1608HS600/500mA/60ohm_6
C549 C559 C557 C553 C555 C563 C550 C551 C560 C568 C564 C562 C565 C552 C561 C558
4
2
D RP38 10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D
*4.7KX2
Q31
2
*2N7002E
3
1
3 1 CGCLK_SMB
7,8,14,24 PCLK_SMB
R258 0_4
ICS9LPRS480 P/N : ALPRS480000 Clock chip has internal serial terminations
+3V
for differencial pairs, external resistors are
Q32 SLG8SP628 P/N : AL8SP628000 reserved for debug purpose.
2
*2N7002E
7,8,14,24 PDAT_SMB 3 1 CGDAT_SMB RTM880N-796 P/N : AL000880000
Place within 0.5"
R274 0_4 of CLKGEN R113
U11
*261/F_4
4 50 CPUCLKP
Add 0216 +3V
L16
+3V_CLK_48 +3V_CLK_VDD 16
26
VDDDOT
VDDSRC
CPUK8_0T
CPUK8_0C
49 CPUCLKN
CPUCLKP 4
CPUCLKN 4
To CPU
VDDATIG
35
VDDSB_SRC RS780/RX780 for VGA
BK1608HS600/500mA/60ohm_6 40 30 NBGFX_CLKP
VDDSATA ATIG0T NBGFX_CLKP 11
C158 48 29 NBGFX_CLKN To NB
VDDCPU ATIG0C NBGFX_CLKN 11
C160 55 28 MXM_REFCLKP_R RP1 1 2 EV@0_4P2R CLK_MXM
VDDHTT ATIG1T CLK_MXM 18
2.2U/6.3V_6 0.1u/10V_4 56 27 MXM_REFCLKN_R 3 4 CLK_MXM# To MXM
VDDREF ATIG1C CLK_MXM# 18
63
VDD48
C +3V SBLINK_CLKP C
37 SBLINK_CLKP 11
+1.2V_CLK_VDDIO SB_SRC0T SBLINK_CLKN To NB
Add 0226 11
17
VDDSRC_IO0 SB_SRC0C
36
32 SBSRC_CLKP
SBLINK_CLKN 11
SBSRC_CLKP 13
Q8 VDDSRC_IO1 SB_SRC1T SBSRC_CLKN To SB
25 31 SBSRC_CLKN 13
R96 *RHU002N06 R463 *0_6 VDDATIG_IO SB_SRC1C
+3V_CLK_VDD 34
2
VDDSB_SRC_IO
47
*10K_4 VDDCPU_IO NBGPP_CLKP_R
22 T5
CLKREQ3# SRC0T NBGPP_CLKN_R
1 3 CLKREQ_TV# 24 21 T8
SRC0C
1 20 T4
GND48 SRC1T
7 19 T7
GNDDOT SRC1C CLK_PCIE_MINI1
10 15 CLK_PCIE_MINI1 24
+3V GNDSRC0 SRC2T CLK_PCIE_MINI1# To Mini PCIE Slot
18 14 CLK_PCIE_MINI1# 24
GNDSRC1 SRC2C CLK_PCIE_TV
24
33
GNDATIG QFN64 SRC3T
13
12 CLK_PCIE_TV#
CLK_PCIE_TV 24
To Mini PCIE Slot
GNDSB_SRC SRC3C CLK_PCIE_TV# 24
Q9 43 9 CLK_PCIE_LAN
GNDSATA SRC4T CLK_PCIE_LAN 22
R104 *RHU002N06 46 8 CLK_PCIE_LAN# To LAN Controller
CLK_PCIE_LAN# 22
2
GNDCPU SRC4C
52
*10K_4 GNDHTT
60
CLKREQ2# GNDREF
1 3 CLKREQ_WLAN# 24 42 T10
SRC6T/SATAT
41 T9
CG_XIN SRC6C/SATAC
CG_XOUT
61
X1 SRC7T/27M_SS
6 T11 B2A to C3A
62 5 T12
+3V X2 SRC7C/27M_NS
CGCLK_SMB 2 54 NBHT_REFCLKP
SMBCLK HTT0T/66M NBHT_REFCLKP 11
Q5 Add 0216 CGDAT_SMB 3 53 NBHT_REFCLKN To NB
SMBDAT HTT0C/66M NBHT_REFCLKN 11
R92 *RHU002N06
2
R98 *22_4
CLK_Card48 30
*10K_4 CLK_PD# 51 64 CLK_48M_USB_R R102 22_4 CLK_48M_USB To SB
PD# 48MHz_0 CLK_48M_USB 14
CLKREQ4# 1 3 R101 *22_4 To LAN
CLKREQ_LAN# 22 LAN_48 22
T6 CLKREQ0# 23 59 SEL_HTT66 R452 33_4 Add 0217 14.318M for SB
B CLKREQ0# REF0/SEL_HTT66 SB_OSC 13 B
T17 CLKREQ1# 45 58 SEL_SATA Ra