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1401 DATA PROCESSING SYSTEM BULLETIN
1401 DATA FLOW
New, more efficient programming techniques for the age on one of the wires running through the center of
IBM 1401 Data Processing System are being developed the core. This voltage is recognized as a bit.
as the programming knowledge and the experience Information is always read into core storage during
level on the system increases. This manual presents a the late haH of a cycle. If the information that was read
semi-detailed data How explanation of every 1401 oper- out of a storage location is to be retained in the same
ation. This approach should assist both the new, and location, it is read back into that location from one of
the more experienced, programmer with his 1401 pro- the registers during the late haHof the read-out cycle.
gramming effort. The 1401 system also makes use of this core-storage
Each operation is presented in the form of a data- operation to perform the system's arithmetic opera-
How diagram. The path that the data takes during an tions. Two areas are alternately read out a position at a
operation is graphically presented along with a written time, added together, and the sum stored in the last
explanation of the steps involved. The internal-parity position read out. This is called add-to-storage logic,
and validity-checking operations are also presented, and it eliminates the need for special-purpose accumu-
along with a list of the console lights that will be ON in lators or counters. Because any group of storage posi-
the event of a parity or validity check condition. tions can be used as an accumulating field, the capacity
for arithmetic functions is not limited by a predeter-
Data Flow mined number of counter positions.
DATA LINES AND INHIBIT DRIVE
The data How of an IBM 1401 Data Processing System
is schematically shown in Figure 1. The How paths used The data-How paths shown in Figure 1 as single lines
are initially specified by the stored program instruc- are actually eight lines (4 digit, 2 zone, 1 word mark,
tions. These instructions tell the system what areas to and 1 check). The lines leading to the inhibit drive are
read out of, and what areas to read into. The internal called inhibit lines because they inhibit, or prevent, the
circuitry of the system then carries out the specified setting of cores unless activated by the presence of a
data movement. The various component areas of the bit of information. Information being sent into core
system are: storage goes through the inhibit-drive area, while in-
formation being sent from core storage goes through
CORE STORAGE the B-register.
The IBM 1401 Data Processing System uses magnetic- B-REGISTER
core storage for storing instructions and data. All the Each character leaving 1401 core storage enters the
data in core storage is readily available, and the design B-register and is stored in an 8-bit code (BCD code,
of the core-storage area makes each position individu- word mark, check bit). The register is reset and filled
ally addressable. All data received from input units is with a character from core storage during the read-out
stored in the core storage, and all data sent to the out- portion of every storage cycle. The character can be
put units is sent from core storage. entered back into core storage from the output of the
Information is always read out of core storage dur- B-register during the storage read-in portion of a stor-
ing the early haH of a cycle. The read-out is actually age cycle. This is necessary when an instruction is being
accomplished by setting all the cores, at the specified read and will be needed another tLT!le, because the
location; to zero. A core originally set at one will, when cores of a position are all set to zero when that position
flipped from one to zero during read-out, induce a volt- is read out.