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8 7 6 5 4 3 2 1
Cover Sheet 1
Block Diagram
GPIO Spec.
2
3
MS-6529
D
INTEL (R) Brookdale Chipset D
Clock Gen & ATA100 IDE CONNECTORS 4 Willamette/Northwood 423pin mPGA-B Processor Schematics
INTEL CPU Sockets 423 5-6 Version 0A
INTEL Brookdale MCH -- North Bridge 7-8
INTEL ICH2 -- South Bridge 9 - 10
LPC I/O W83627HF 11
AC'97 Codec 12
Audio Amp TL072 & GAME 13
C C
FWH -- BIOS & CNR RISER 14
SDR DIMM-168 15
AGP 4X SLOT (1.5V) 16
PCI SLOT 1 & 2 & 3 & 4 & 5 & 6 17 18 19
Front Panel & Connectors 20
USB & FAN Connectors 21
PC2PC & D_LED 22
B B
System Votlage 1 23
System Votlage 2 24
CPU VID Control 25
Intersil HIP6301 PWM 26
IO Connectors 27
POWER CONSUMPTION 28
JUMPER SETTING 29
A A
CK-408 30
Title Rev
DIMM Design Guide 31 Micro-Star MS-6529 0A
Document Number
HISTORY 1 32 Cover Sheet
Last Revision Date:
Saturday, June 02, 2001 Sheet 1 of 32
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PCB1
U17-1
PLCC32-SMT
D D
_
P01-652900A
BAT1-1 COM1 COM2
COM-D9-GN COM-D9-GN
YSKTBT
C
X_U8 C
JBAT1(1-2) J4(1) JP1(1)
YJUMPER-MG YJUMPER-MG X_YJUMPER-MG
845-MCH-H
B B
A A
Title
{Title}
Size Document Number Rev
Custom{Doc} {RevCode}
Date: Saturday, June 02, 2001 Sheet 1 of 1
5 4 3 2 1
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AGP
4X(1.5V)
AGP CONN
D D
(423PINS)
(100MHz)
Power
Supply VRM Willamette/Northwood CK408 Clock
CONN 9.0 Socket (PGA423-B) (100MHz)
(400MHz) Scalable Bus Scalable Bus/2
4X (66MHz) AGP
AGP 4X
(1.5V) MCH: Memory
Controller HUB
(593PINS/FCBGA) (133MHz)
DIMM 1:3
VRM
AGP
CONN
( 66MHz X 4 ) HUB Interface
(14.318MHz)
C Heceta Hardware SM Bus C
Monitor ICH2: I/O PCI (33MHz)
PCI Slots 1:6
(360PINS/EBGA)
Controller HUB
IDE CONN 1&2
(48MHz)
(33MHz)
(33MHz)
LPC Bus AC Link
USB Port 0:3 CNR Riser
(Shared slot)
(USB3)
AC '97 Audio
FWH: Firmware HUB AMP
Codec
SIO
PC2PC Line Out
Telephone In
MIC In
B
Audio In B
Line In
PS2 Mouse & Parallel (1) Floppy Disk
DLED CD-ROM
Keyboard Serial (2) Drive CONN
Stuffing
Options
A A
Title Rev
Micro-Star MS-6529 0A
Document Number
Block Diagram
Last Revision Date:
Friday, June 01, 2001 Sheet 2 of 32
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General Purpose I/O Spec.
ICH2 FWH PCI
GPIO Pin Type Function
GPIO Pin Type Function DEVICES INT# IDSEL REQ#/GNT# CLOCK
D D
GPIO 0 I Non Connect
GPI 0 I ATA IDE 1 Detect PCI SLOT 1
INT#A
INT#B AD16
PREQ#0
GPIO 1 I Non Connect (PREQ#5) INT#C PGNT#0 PCICLK0
GPI 1 I ATA IDE 2 Detect INT#D
GPIO 2 I INTE#
GPI 2 I Reserved PCI SLOT 2
INT#B
INT#C AD17
PREQ#1
PCICLK1
GPIO 3 I INTF# INT#D PGNT#1
GPI 3 I Reserved INT#A
GPIO 4 I INTG# INT#C PREQ#2
PCI SLOT 3 INT#D AD18 PCICLK2
GPIO 5 I INTH# W627HF-AW INT#A
INT#B
PGNT#2
GPIO 6 I CNR Detect PIN NAME Function define INT#D PREQ#3
PCI SLOT 4 INT#A AD19 PCICLK3
GPIO 7 I None GP23/PLED PLED(POWER LED)
INT#B
INT#C
PGNT#3
GPIO 8 I LAN Wake Up GP24/WDTO DLED2 INT#B PREQ#4
C PCI SLOT 5 INT#C AD21 PCICLK4 C
GPIO 9 I AC'97 Serial Data In GP32/PWROK DLED1
INT#D
INT#A
PGNT#4
GPIO 10 I Non Connect GP33/RSMRST# DLED4
GPIO 11 I Non Connect GP34/CIRRX DLED3
GPIO 12 I External SMI GP35/SUSLED SUSLED
GPIO 13 I LPC PME
GPIO 14~15 I Not Implemented
GPIO 16 O Non Connect
GPIO 17 O PGNT#5
GPIO 18 O Not Implemented
B GPIO 19 O SDR Votlage settig B
GPIO 20 O SDR Votlage settig
GPIO 21 O CPU VID Control
GPIO 22 OD Non Connect
GPIO 23 O BIOS Locked/Unlocked
GPIO 24 O STR Control
GPIO 25 O Non Connect
GPIO 26 O Non Connect
GPIO 27 I/O Non Connect
GPIO 28 I/O Non Connect
A A
GPIO 29~31 I/O Not Implemented
Title Rev
Micro-Star MS-6529 0A
Document Number
GPIO Spec.
Last Revision Date:
Saturday, June 02, 2001 Sheet 3 of 32
5 4 3 2 1
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*Trace less 0.5"
CLOCK GENERATOR BLOCK Shut Source Termination Resistors Pull-Down Capacitors
CP4
X_COPPER CPUCLK R104 49.9RST
U9 CPUCLK# R105 49.9RST
FB12 601S/0805 39 41 R115 33RST CPUCLK MCHCLK R108 49.9RST
VCC3 CPU_VDD CPU0 CPUCLK 5
R116 33RST CPUCLK# MCHCLK# R109 49.9RST
+
40 CPUCLK# 5
CB87 Rubycon CT20 CB91 CB102 CPU0#
104P 105P/0805 104P 36 38 R117 33RST MCHCLK
CPU_GND CPU1 MCHCLK 7
37 R118 33RST MCHCLK#
CPU1# MCHCLK# 7
D for good filtering from 10K~1M D
46
ELS10/16-B MREF_VDD C_STP CN12
CB93 3VMREF/CPU_STP#
45
P_STP
Trace less 0.2" MCH_66
44 1 2
104P 3VMREF#/PCI_STP# ICH_66
43
MREF_GND 49.9ohm for 50ohm M/B impedance AGPCLK
3 4
5 6
32 31 1 2 MCH_66 7 8
3V66_VDD 3V66_0 MCH_66 7
30 RN12 3 4 ICH_66
3V66_1 ICH_66 10
CP5 CB95 8P4R-33 5 AGPCLK
X_COPPER R107 104P 29
3V66_2
28
27 7
6
8
AGPCLK 16 CLOCK STRAPPING RESISTORS X_8P4C-10P
X_0 3V66_GND 3V66_3
6 FS2 7 8 SIO_PCLK FS4 R136 10K VCC3V
FS2/PCI_F0 SIO_PCLK 11
FB14 601S/0805 VCC3V 9 7 FS3 5 6 FWH_PCLK FS3 R150 10K VCC3V
VCC3 PCI_VDD FS3/PCI_F1 FWH_PCLK 14
MODE 4 ICH_PCLK
+
8 3 ICH_PCLK 9
CB121 Rubycon CT24 CB117 CB115 MODE/PCI_F2 RN14 1 FS1 R145 X_10K VCC3V CN15
2
104P 105P/0805 104P 5 10 FS4 8P4R-33 R134 10K SIO_PCLK 7 8
PCI_GND FS4/PCI0 PCICLK4 FWH_PCLK
11 PCICLK4 18 5 6
for good filtering from 10K~1M PCI1 PCICLK0 FS0 R144 10K VCC3V ICH_PCLK
18 12 7 8 PCICLK0 17 3 4
ELS10/16-B PCI_VDD PCI2 PCICLK3 R131 X_10K PCICLK4
14 5 6 PCICLK3 18 1 2
CB118 PCI3 PCICLK2
15 3 4 PCICLK2 17
104P 13 PCI4 PCICLK1 X_8P4C-10P
16 1 2 PCICLK1 17
PCI_GND PCI5 R142 X_10K VCC3V
*Put GND copper under Clock Gen. PCI6
17
RN13 FS2 R137 10K
connect to every GND pin 24 8P4R-33
48_VDD FS0 R132 33 ICH_48
* 40 mils Trace on Layer 4 CB119 FS0/48MHz
22
FS1 R133 33 SIO_48
ICH_48 10
MODE R151 10K
23 SIO_48 11
with GND copper around it 104P 21 FS1/24_48MHz CN16
48_GND PCICLK0
* put close to every power pin PCICLK3
7 8
C 2 5 6 C
REF_VDD MUL0 R112 33 ICH_14 MUL0 R102 X_10K VCC3V PCICLK2
* Trace Width 7mils. VCC3 CB113 MUL0/REF0
48
MUL1 R129 33 AC97_14
ICH_14 10
R111 10K PCICLK1
3 4
1 AC97_14 12 1 2
104P 47 MUL1/REF1
* Same Group spacing 15mils REF_GND MUL1 R141 X_10K VCC3V X_8P4C-10P
* Different Group spacing 30mils 34 3 C98 18p R140 10K
CORE_VDD X1 32pF
* Different mode spacing 7mils on itself R121 CB94 X1 14M-32pf-HC49S-D
104P 33 4 C91 18p CRST# R135 10K VCC3V
10K CORE_GND X2
SMBCLK 26 35 R106 475RST ICH_48 C100 10P
10,11,14,15 SMBCLK SCLK IREF
SMBDATA 25 SMBCLK R120 4.7K SIO_48 C101 10P
10,11,14,15 SMBDATA SDATA FP_RST# 19 VCC3
20 CRST# R143 0 SMBDATA R119 4.7K
RST# R114 4.7K VCC3V ICH_14 C80 10P
19 42 VCC3V
VTT_GD# PWR_DN#
R128 200 Q15 ICS 950208/CY28323/4 C_STP R113 X_1K VCC3V
VCCP
2N3904S P_STP R103 X_1K used only for EMI issue
R125 X_1K Trace less 0.2"
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
ATA100 IDE CONNECTORS
R317 4.7K IDE2 R308 4.7K IDE1
D2x20-1:21-BL-ZBT D2x20-1:21-WH-SBT
HD_RST# R316 33 1 2 HD_RST# R307 33 1 2
PDD7 3 4 PDD8 SDD7 3 4 SDD8
B 10 PDD[0..7] PDD[8..15] 10 10 SDD[0..7] SDD[8..15] 10 B
PDD6 5 6 PDD9 SDD6 5 6 SDD9
PDD5 7 8 PDD10 SDD5 7 8 SDD10
PDD4 9 10 PDD11 SDD4 9 10 SDD11
PDD3 11 12 PDD12 SDD3 11 12 SDD12
PDD2 13 14 PDD13 SDD2 13 14 SDD13
PDD1 15 16 PDD14 SDD1 15 16 SDD14
PDD0 17 18 PDD15 SDD0 17 18 SDD15
19 19
10 PD_DREQ 21 22 10 SD_DREQ 21 22
10 PD_IOW# 23 24 10 SD_IOW# 23 24
10 PD_IOR# 25 26 10 SD_IOR# 25 26
27 28 R312 470 27 28 R281 470
10 PD_IORDY 10 SD_IORDY
10 PD_DACK# 29 30 10 SD_DACK# 29 30
31 32 31 32
9 IRQ14 9 IRQ15
10 PD_A1 33 34 PD_DET 14 10 SD_A1 33 34 SD_DET 14
10 PD_A0 35 36 PD_A2 10 10 SD_A0 35 36 SD_A2 10
10 PD_CS#1 37 38 PD_CS#3 10 10 SD_CS#1 37 38 SD_CS#3 10
R311 33 39 40 R285 33 39 40
19 PD_LED 19 SD_LED
C166 R314 C167 C158 R284 C159 * Trace Width : 5mils
R310 8.2K 220p 10K X_4700p R283 8.2K 220p 10K X_4700p * Trace Spacing : 7mils
VCC5 VCC5
VCC3 VCC3 * Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"
A RESET BLOCK VCC5 A
R315
R303 330 R302 330 330 Title Rev
VCC3 VCC3
PCIRST# 1 2 PCIRST#1 7,11,14
PCIRST# 3 4 PCIRST#2 16,17,18
Micro-Star MS-6529 0A
9 PCIRST# PCIRST# HD_RST#
11 10
U16A U16B U16E DM7407-SOIC14 Document Number
DM7407-SOIC14 C165 DM7407-SOIC14 Clock CY28323/4 & ATA100 IDE
(VCC5_STR)
X_10P Last Revision Date:
Friday, June 01, 2001 Sheet 4 of 32
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CPU SIGNAL BLOCK CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
VCCPS+ 25
7 HA#[3..31] VCCPS- 25
R41
ITP_DBR#
2/3*Vccp 49.9RST
VID[0..4] 24
GTLREF1
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26