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5 4 3 2 1
Volks_AMD Comal DIS/UMA (14") Ultra/Slim 01
D D
PCB 6L STACK UP
AMD APU AIT Mars PRO VRAM DDR3 x 8 (900 MHz)
PCI-E Gen3 128 x 16 x 8, 64 bit
x 8 Lane LAYER 1 : TOP
Power : 25 (Watt) Max 1GBs/2GBs
PAGE 21-22 LAYER 2 : SGND
DDR3 SODIMM1 Processor : TRINITY Daul / Package : M2
DDR3 800 ~ 1600 MT/s Quad Core LAYER 3 : IN1(High)
Maxima 4GBs Size : 29 x 29 (mm) 27MHz LAYER 4 : IN2(Low)
PAGE 12 Power : 25 (Watt) PAGE 16
LAYER 5 : SVCC
Package : FP2 827-PIN BGA PAGE 14-20
DDR3 SO-DIMM2 LAYER 6 : BOT
DDR3 800 ~ 1600 MT/s Size : 27 x 31 (mm)
Maxima 4GBs DP Port2
IME HDMI Conn
PAGE 13
PAGE 30 Power Source
RTD2132S BQ24728
DP Port0 LCD Conn (15.6") System Charge Power (+BATCHG)
PAGE 02-05 DP to LVDS
Translator PAGE 11 PAGE 30
BCLK133M
C C
Green CLK
32.768KHz
UMI x 4 PAGE 27 G5934RZ1U
System Discharge Power
(+1.5V/+3V/+5V)
(+3VSUSV/+3VLANVCC/+1.1V)
SATA - 1st HDD AMD FCH USB3.0 Interface USB 2.0/3.0
SATA0 6GB/s Combo x 2 USB2.0 x 2
Package : 9.5 (mm) PORT0,1
Hudson M3 Ricktek RT8223PZ
Power : PAGE 28 PAGE 26
Power : 4.7 Watt System Power (+3VPCU/+5VPCU/
Package : 656pin FCBGA +3VS5/+5VS5)
mSATA SATA1 6GB/s
Size : 24.5 x 24.5 (mm) USB2.0 Interface
Package : 12.7 (mm)
Power : PAGE 28 SPI Interface
PAGE 06-10 ISL6277/RT8228AZ/AP3407A/ISL6208BCRZ
System BIOS Processor Power (+VCC_CORE/
SPI ROM +1.2V/+2.5V/+VDDNB_CORE)
Camera External USB BT USB2.0 x 2
B PAGE 08 B
Azalia
8 0 2 10, 11
PAGE 30 PAGE 23 PAGE 27 PAGE 26
Richtek RT8207L
LPC Interface PCIE Gen 1 x 1 Lane System Memory Power (+1.5VSUS/
+0.75V_DDR_VTT)
80 Port (Debug)
iTE IT8518E/HX IDT 92HD99B Realtek RTL8105E Realtek RTS5229 Intel Rambo Peak Richtek RT8228AZ
PAGE 25
Embedded Controller Audio Codec LAN Controller Card Reader Halt Mini Card PCH Power (+1.1VS5)
EC SPI ROM WLAN / BT Combo
PAGE 29
Power : Power : Power : Power : Power :
Keyboard Package : LQPF128 Package : QFN-40 Package : OFN48 Package : LQPF24 Package :
PAGE 26 RT8152E/G5193/G5193R41U/NB650
Size : 14 x 14 (mm) Size : 5 x 5 (mm) Size : 6 x 6 (mm) Size : 4 x 4 (mm) Size :
Touch Pad DGPU Power (+VGA_CORE/+1.0V_VGA/+3V_VGA/
PAGE 28 PAGE 29 PAGE 23 PAGE 24 PAGE 25 PAGE 27 +1.5V_VGA/+1.8V_VGA/+VDDCI)
A A
SLG3NB242 FAN Controller Daughterl/B CONN 25MHz
GreenCLK Combo Jack
NS681684 RJ45 Conn
PAGE 27 PAGE 28 PAGE 23 PROJECT : VOLKS_Comal 14"
TRANSFORMER
PAGE 24 PAGE 24 Quanta Computer Inc.
Size Document Number Rev
25MHz A3 1A
Block Diagram
NB5 Date: Thursday, September 20, 2012 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
02
U27A
PEG_RXP0 AP1 AN1 PEG_TXP0_C C702 *0.1U/10V_4 PEG_TXP0
[14] PEG_RXP0 P_GFX_RXP[0] P_GFX_TXP[0] PEG_TXP0 [14]
PEG_RXN0 AP2 AN2 PEG_TXN0_C C703 *0.1U/10V_4 PEG_TXN0
[14] PEG_RXN0 P_GFX_RXN[0] P_GFX_TXN[0] PEG_TXN0 [14]
PEG_RXP1 AM1 AM4 PEG_TXP1_C C665 *0.1U/10V_4 PEG_TXP1
[14] PEG_RXP1 P_GFX_RXP[1] P_GFX_TXP[1] PEG_TXP1 [14]
PEG_RXN1 AM2 AM3 PEG_TXN1_C C666 *0.1U/10V_4 PEG_TXN1
[14] PEG_RXN1 P_GFX_RXN[1] P_GFX_TXN[1] PEG_TXN1 [14]
PEG_RXP2 AK3 AK2 PEG_TXP2_C C704 *0.1U/10V_4 PEG_TXP2
[14] PEG_RXP2 P_GFX_RXP[2] P_GFX_TXP[2] PEG_TXP2 [14]
PEG X 8
PEG_RXN2 AK4 AK1 PEG_TXN2_C C705 *0.1U/10V_4 PEG_TXN2
[14] PEG_RXN2 P_GFX_RXN[2] P_GFX_TXN[2] PEG_TXN2 [14]
PEG_RXP3 AJ1 AH1 PEG_TXP3_C C667 *0.1U/10V_4 PEG_TXP3
[14] PEG_RXP3 P_GFX_RXP[3] P_GFX_TXP[3] PEG_TXP3 [14]
PEG_RXN3 AJ2 AH2 PEG_TXN3_C C668 *0.1U/10V_4 PEG_TXN3
[14] PEG_RXN3 P_GFX_RXN[3] P_GFX_TXN[3] PEG_TXN3 [14]
PEG_RXP4 AH4 AF3 PEG_TXP4_C C706 *0.1U/10V_4 PEG_TXP4
[14] PEG_RXP4 P_GFX_RXP[4] P_GFX_TXP[4] PEG_TXP4 [14]
PEG_RXN4 AH3 AF4 PEG_TXN4_C C707 *0.1U/10V_4 PEG_TXN4
[14] PEG_RXN4 P_GFX_RXN[4] P_GFX_TXN[4] PEG_TXN4 [14]
PEG_RXP5 AF2 AE1 PEG_TXP5_C C669 *0.1U/10V_4 PEG_TXP5
[14] PEG_RXP5 P_GFX_RXP[5] P_GFX_TXP[5] PEG_TXP5 [14]
PEG_RXN5 AF1 AE2 PEG_TXN5_C C670 *0.1U/10V_4 PEG_TXN5
[14] PEG_RXN5 P_GFX_RXN[5] P_GFX_TXN[5] PEG_TXN5 [14]
D PEG_RXP6 AD1 AD4 PEG_TXP6_C C708 *0.1U/10V_4 PEG_TXP6 D
[14] PEG_RXP6 P_GFX_RXP[6] P_GFX_TXP[6] PEG_TXP6 [14]
PEG_RXN6 AD2 AD3 PEG_TXN6_C C709 *0.1U/10V_4 PEG_TXN6
[14] PEG_RXN6 P_GFX_RXN[6] P_GFX_TXN[6] PEG_TXN6 [14]
PEG_RXP7 AB3 AB2 PEG_TXP7_C C672 *0.1U/10V_4 PEG_TXP7
GRAPHICS
[14] PEG_RXP7 P_GFX_RXP[7] P_GFX_TXP[7] PEG_TXP7 [14]
PEG_RXN7 AB4 AB1 PEG_TXN7_C C671 *0.1U/10V_4 PEG_TXN7
[14] PEG_RXN7 P_GFX_RXN[7] P_GFX_TXN[7] PEG_TXN7 [14]
AA1 Y1
AA2 P_GFX_RXP[8] P_GFX_TXP[8] Y2
Y4 P_GFX_RXN[8] P_GFX_TXN[8] V3
Y3 P_GFX_RXP[9] P_GFX_TXP[9] V4
V2 P_GFX_RXN[9] P_GFX_TXN[9] U1
P_GFX_RXP[10] P_GFX_TXP[10] UMA can remove
V1 U2
T1 P_GFX_RXN[10] P_GFX_TXN[10] T4
T2 P_GFX_RXP[11] P_GFX_TXP[11] T3
P3 P_GFX_RXN[11] P_GFX_TXN[11] P2
P4 P_GFX_RXP[12] P_GFX_TXP[12] P1
N1 P_GFX_RXN[12] P_GFX_TXN[12] M1
N2 P_GFX_RXP[13] P_GFX_TXP[13] M2
M4 P_GFX_RXN[13] P_GFX_TXN[13] K3
M3 P_GFX_RXP[14] P_GFX_TXP[14] K4
K2 P_GFX_RXN[14] P_GFX_TXN[14] J1
K1 P_GFX_RXP[15] P_GFX_TXP[15] J2
P_GFX_RXN[15] P_GFX_TXN[15]
PCIE_RXP0_WLAN AH5 AG7 PCIE_TXP0_C C245 0.1U/10V_4
[27] PCIE_RXP0_WLAN P_GPP_RXP[0] P_GPP_TXP[0] PCIE_TXP0_WLAN [27]
TO WLAN PCIE_RXN0_WLAN AH6 AG8 PCIE_TXN0_C C251 0.1U/10V_4 TO WLAN
[27] PCIE_RXN0_WLAN P_GPP_RXN[0] P_GPP_TXN[0] PCIE_TXN0_WLAN [27]
AG5 AE7
AG6 P_GPP_RXP[1] P_GPP_TXP[1] AE8
AE6 P_GPP_RXN[1] P_GPP_TXN[1] AD7
AE5 P_GPP_RXP[2] P_GPP_TXP[2] AD8
AD6 P_GPP_RXN[2] P_GPP_TXN[2] AB6
AD5 P_GPP_RXP[3] P_GPP_TXP[3] AB5
GPP
P_GPP_RXN[3] P_GPP_TXN[3]
C AM10 AN6 UMI_TXP0_C C282 0.1U/10V_4 UMI_TXP0 C
[7] UMI_RXP0 P_UMI_RXP[0] P_UMI_TXP[0] UMI_TXP0 [7]
AN10 AM6 UMI_TXN0_C C290 0.1U/10V_4 UMI_TXN0
[7] UMI_RXN0 P_UMI_RXN[0] P_UMI_TXN[0] UMI_TXN0 [7]
AN8 AP6 UMI_TXP1_C C305 0.1U/10V_4 UMI_TXP1
[7] UMI_RXP1 P_UMI_RXP[1] P_UMI_TXP[1] UMI_TXP1 [7]
AM8 AR6 UMI_TXN1_C C315 0.1U/10V_4 UMI_TXN1
[7] UMI_RXN1 P_UMI_RXN[1] P_UMI_TXN[1] UMI_TXN1 [7]
AP8 AP4 UMI_TXP2_C C274 0.1U/10V_4 UMI_TXP2
[7] UMI_RXP2 P_UMI_RXP[2] P_UMI_TXP[2] UMI_TXP2 [7]
AR8 AR4 UMI_TXN2_C C279 0.1U/10V_4 UMI_TXN2
[7] UMI_RXN2 P_UMI_RXN[2] P_UMI_TXN[2] UMI_TXN2 [7]
AR7 AP3 UMI_TXP3_C C263 0.1U/10V_4 UMI_TXP3
[7] UMI_RXP3 P_UMI_RXP[3] P_UMI_TXP[3] UMI_TXP3 [7]
AP7 AR3 UMI_TXN3_C C267 0.1U/10V_4 UMI_TXN3
[7] UMI_RXN3 P_UMI_RXN[3] P_UMI_TXN[3] UMI_TXN3 [7]
UMI
+1.2V_VDDP R422 196/F_6 P_ZVDDP AR11 AP11 P_ZVSS R421 196/F_6
P_ZVDDP P_ZVSS
4/19 For Comal. TRINITY-A8-SERIES_BGA813
+3V
HDT+ Connector for Debug only VID Override Circuit
BOOT VOLTAGE
+1.5V
R184
*0_4/S 4/19 For Comal. SVC SVD VFIX_+VDD VFIX_+VDD
=VCC/GND =OPEN
R183 R182
1K/F_4 1K/F_4 0 0 1.1 1.1
U7 Note: 0 1 1.0 1.2
B APU_RST# 1 6 APU_RST_L_BUF To override VID,Remove Rd, Re, Rf, install Rc B
[4,7] APU_RST# A1 Y1
2 5
set VID via SVC & SVD option RES.
GND VCC
1 0 0.9 1.0
APU_PWRGD 3 4 APU_PWROK_BUF
A2 Y2
1 1 0.8 0.8
74LVC2G07GW
J1
+1.5VSUS 20
APU_TEST18 19
close to HDT [4] APU_TEST18 18
Rd
debug HEADER +1.5VSUS APU_TEST19 SVC R158 *0_4/S CPU_SVC
[4] APU_TEST19 17 [4] SVC CPU_SVC [39]
APU_RST_L_BUF Re
APU_TDI R186 1K/F_4 CPU_LDT_RST_HTPA# 16 SVD R161 *0_4/S CPU_SVD
TP47 15 [4] SVD CPU_SVD [39]
APU_TCK R188 1K/F_4 APU_DBREQ# Rf
[4] APU_DBREQ# 14
APU_TMS R187 1K/F_4 APU_DBRDY APU_PWRGD R180 *0_4/S CPU_PWRGD_SVID_REG CPU_PWRGD_SVID_REG [39]
[4] APU_DBRDY 13 [4,7] APU_PWRGD
APU_TRST# R185 1K/F_4 APU_TCK
[4] APU_TCK 12
APU_TMS APU_PWRGD have pull up 300ohm
[4] APU_TMS 11
APU_TDI to +1.5V on page 4 PV1 Change to short pad
[4] APU_TDI 10
APU_TRST#
[4] APU_TRST# APU_TDO 9
[4] APU_TDO 8
APU_DBREQ# R189 1K/F_4 APU_PWROK_BUF
7
A 6 A
5
4/19 For Comal. 4
3
2
1
*HDT CONN
88511-2001-20p-l PROJECT : VOLKS_Comal 14"
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 Llano PCIE/UMI/GPP
Date: Thursday, September 20, 2012 Sheet 2 of 42
5 4 3 2 1
5 4 3 2 1
M_A_DQ[0..63] [12] M_B_DQ[0..63] [13]
03
[12] M_A_A[15:0] U27B [13] M_B_A[15:0] U27C
M_A_A0 AA28 F15 M_A_DQ0 M_B_A0 Y33 C16 M_B_DQ0
M_A_A1 R29 MA_ADD[0] MA_DATA[0] E15 M_A_DQ1 M_B_A1 R32 MB_ADD[0] MB_DATA[0] B17 M_B_DQ1
M_A_A2 T30 MA_ADD[1] MA_DATA[1] H19 M_A_DQ2 M_B_A2 T31 MB_ADD[1] MB_DATA[1] B20 M_B_DQ2
M_A_A3 R28 MA_ADD[2] MA_DATA[2] F19 M_A_DQ3 M_B_A3 P33 MB_ADD[2] MB_DATA[2] C20 M_B_DQ3
D M_A_A4 R26 MA_ADD[3] MA_DATA[3] E14 M_A_DQ4 M_B_A4 P32 MB_ADD[3] MB_DATA[3] A16 M_B_DQ4 D
M_A_A5 P26 MA_ADD[4] MA_DATA[4] H15 M_A_DQ5 M_B_A5 P31 MB_ADD[4] MB_DATA[4] B16 M_B_DQ5
M_A_A6 P27 MA_ADD[5] MA_DATA[5] E17 M_A_DQ6 M_B_A6 N32 MB_ADD[5] MB_DATA[5] B19 M_B_DQ6
M_A_A7 P30 MA_ADD[6] MA_DATA[6] D18 M_A_DQ7 M_B_A7 M33 MB_ADD[6] MB_DATA[6] A20 M_B_DQ7
M_A_A8 P29 MA_ADD[7] MA_DATA[7] M_B_A8 M32 MB_ADD[7] MB_DATA[7]
M_A_A9 M28 MA_ADD[8] G20 M_A_DQ8 M_B_A9 L32 MB_ADD[8] B22 M_B_DQ8
M_A_A10 AB26 MA_ADD[9] MA_DATA[8] E20 M_A_DQ9 M_B_A10 AB31 MB_ADD[9] MB_DATA[8] C22 M_B_DQ9
M_A_A11 M26 MA_ADD[10] MA_DATA[9] H23 M_A_DQ10 M_B_A11 M31 MB_ADD[10] MB_DATA[9] A26 M_B_DQ10
M_A_A12 M29 MA_ADD[11] MA_DATA[10] G23 M_A_DQ11 M_B_A12 K32 MB_ADD[11] MB_DATA[10] B26 M_B_DQ11
M_A_A13 AE27 MA_ADD[12] MA_DATA[11] E19 M_A_DQ12 M_B_A13 AF33 MB_ADD[12] MB_DATA[11] B21 M_B_DQ12
M_A_A14 L26 MA_ADD[13] MA_DATA[12] H20 M_A_DQ13 M_B_A14 K33 MB_ADD[13] MB_DATA[12] A22 M_B_DQ13
M_A_A15 L27 MA_ADD[14] MA_DATA[13] E22 M_A_DQ14 M_B_A15 J32 MB_ADD[14] MB_DATA[13] C24 M_B_DQ14
[12] M_A_BS#[2..0] MA_ADD[15] MA_DATA[14] D22 [13] M_B_BS#[2..0] MB_ADD[15] MB_DATA[14] B25
M_A_DQ15 M_B_DQ15
M_A_BS#0 AB27 MA_DATA[15] M_B_BS#0 AB33 MB_DATA[15]
M_A_BS#1 AA29 MA_BANK[0] H25 M_A_DQ16 M_B_BS#1 AA32 MB_BANK[0] A28 M_B_DQ16
M_A_BS#2 M30 MA_BANK[1] MA_DATA[16] F25 M_A_DQ17 M_B_BS#2 K31 MB_BANK[1] MB_DATA[16] B28 M_B_DQ17
[12] M_A_DM[7..0] MA_BANK[2] MA_DATA[17] D28 [13] M_B_DM[7..0] MB_BANK[2] MB_DATA[17] B31
M_A_DQ18 M_B_DQ18
M_A_DM0 D16 MA_DATA[18] D29 M_A_DQ19 M_B_DM0 C18 MB_DATA[18] A32 M_B_DQ19
M_A_DM1 D20 MA_DM[0] MA_DATA[19] E23 M_A_DQ20 M_B_DM1 B23 MB_DM[0] MB_DATA[19] C26 M_B_DQ20
M_A_DM2 E25 MA_DM[1] MA_DATA[20] D24 M_A_DQ21 M_B_DM2 C28 MB_DM[1] MB_DATA[20] B27 M_B_DQ21
M_A_DM3 F30 MA_DM[2] MA_DATA[21] D26 M_A_DQ22 M_B_DM3 D31 MB_DM[2] MB_DATA[21] A30 M_B_DQ22
M_A_DM4 AK29 MA_DM[3] MA_DATA[22] D27 M_A_DQ23 M_B_DM4 AM31 MB_DM[3] MB_DATA[22] C30 M_B_DQ23
M_A_DM5 AL25 MA_DM[4] MA_DATA[23] M_B_DM5 AN30 MB_DM[4] MB_DATA[23]
M_A_DM6 AM20 MA_DM[5] G28 M_A_DQ24 M_B_DM6 AR24 MB_DM[5] B33 M_B_DQ24
M_A_DM7 AM16 MA_DM[6] MA_DATA[24] G29 M_A_DQ25 M_B_DM7 AN18 MB_DM[6] MB_DATA[24] C32 M_B_DQ25
MA_DM[7] MA_DATA[25] H27 M_A_DQ26 MB_DM[7] MB_DATA[25] F33 M_B_DQ26
G17 MA_DATA[26] J29 M_A_DQ27 B18 MB_DATA[26] F32 M_B_DQ27
[12] M_A_DQSP0 H17 MA_DQS_H[0] MA_DATA[27] E28 [13] M_B_DQSP0 A18 MB_DQS_H[0] MB_DATA[27] B32
M_A_DQ28 M_B_DQ28
[12] M_A_DQSN0 MA_DQS_L[0] MA_DATA[28] [13] M_B_DQSN0 MB_DQS_L[0] MB_DATA[28]
F22 F27 M_A_DQ29 B24 C31 M_B_DQ29
[12] M_A_DQSP1 G22 MA_DQS_H[1] MA_DATA[29] H29 [13] M_B_DQSP1 A24 MB_DQS_H[1] MB_DATA[29] E32
M_A_DQ30 M_B_DQ30
C [12] M_A_DQSN1 E26 MA_DQS_L[1] MA_DATA[30] H28 [13] M_B_DQSN1 B30 MB_DQS_L[1] MB_DATA[30] F31 C
M_A_DQ31 M_B_DQ31
[12] M_A_DQSP2 MA_DQS_H[2] MA_DATA[31] [13] M_B_DQSP2 MB_DQS_H[2] MB_DATA[31]
F26 B29
[12] M_A_DQSN2 H30 MA_DQS_L[2] AH29 [13] M_B_DQSN2 D32 MB_DQS_L[2] AK32
M_A_DQ32 M_B_DQ32
[12] M_A_DQSP3 MA_DQS_H[3] MA_DATA[32] [13] M_B_DQSP3 MB_DQS_H[3] MB_DATA[32]
G30 AJ30 M_A_DQ33 D33 AL32 M_B_DQ33
[12] M