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5 4 3 2 1
G1S: MEROM/965-PM/ICH8-M/NB8P-GS BLOCK DIAGRAM
CLOCK GEN(CK505)
D
ICS9LPR363CGLF-T D
Merom PAGE 29
CPU
478B uFCPGA
FAN + THERMAL
SENSOR
PAGE 3-6
VRAM CH.C VRAM CH.A
LVDS GDDR3 *2 GDDR3 *2
PAGE 50
136 FBGA 136 FBGA FSB 800 MHz
PAGE 45 PAGE 73 PAGE 72
NVIDIA PCIE * 16 CRESTLINE DDR2 667MHz
CRT DDR2 SO-DIMM
NB8P-GS Intel 965PM
PAGE 46 820 BGA PAGE 7-9
1466 FCBGA
PAGE 70-79
PAGE 10-18
C
DMI *4 TRANSFOMER RJ11+RJ45 CONN C
SDTV HDMI PAGE 34 PAGE 34
PAGE 46 PAGE 46
POWER
RTL8111B(GLAN)
VCORE
PAGE 33 PAGE 80
ALAZIA AUDIO
AZALIA
PAGE 36-38 MINICARD(WLAN) PAGE 81
PAGE 53
ALAZIA MDC PAGE 82
PAGE 34 PCIE *1 NEWCARD PAGE 83
PAGE 43
T/P PAGE 84
B
KBC 8511TE LPC ROBSON B
PAGE 56
ICH8-M PAGE 85
(8750E) 652 BGA
PAGE 58
KBD PAGE 86
PAGE 31 PAGE 30-32
ESATA
PAGE 66 PAGE 87
SATA
SATA HDD PAGE 88
PAGE 51
PAGE 89
PATA
PATA ODD PCI 1394
RICOH PAGE 41
PAGE 90
PAGE 51
PAGE 20-28 R5C833 CARD PAGE 91
A USB USB USB PAGE 40-41 READER A
PAGE 42
PAGE 92
BLUE USB 2.0
CAMERA
TOOTH PORTS x2 Title : BLOCK DIAGRAM
PAGE 45 PAGE 61 PAGE 52 Engineer: ENGINEER
ASUSTeK COMPUTER INC
Size Project Name Rev
Custom G1S 1.1
Date: , 03, 2007 Sheet 1 of 94
5 4 3 2 1
5 4 3 2 1
Reset
IC
EC_RST# 6
D PWR_SW# Power On D
2 SWITCH
+3VA 1
AC_BAT_SYS +5VA +3VA_EC 7 PM_PWRBTN# PM_SUSC#
EC
To EC
IT8511TE 5 PM_RSMRST# ICH8-M PM_SUSB#
3 (IT8750E)
VSUS_ON
CK_PWRGD
EC_CLK_EN
VRMPWRGD
H_PWRGD
13
+3VSUS 4 CL_PWROK
SUS_PWRGD
+5VSUS PWROK
SUSC_EC#
SUSB_EC1#
+12VSUS
PLT_RST#
H_PWRGD
C C
8 16
ALL_SYSTEM_PWRGD
16
SUSC_EC#
+1.5V
VRM_PWRGD
+1.8V
+3V
+5V 17
+12V GMCH H_CPURST# Merom
10 15 965PM
CPU
CL_PWROK
+0.9VS PM_PWROK
PWROK
+VCCP
+VGA_VCORE 12
+1.2VSP
B +1.25VS 14 B
+1.5VS CLK_PWRGD
CLK
+1.8VS
9 Gen.
+VRAM
SUSB_EC1# +2.5VS CLK_PWRGD asserted when both
+3VS 11 PM_SUSB# and VRM_PWRGD are high.
+5VS CPU_VRON
+12VS
13 Power On Sequence
IMVP
CLK_EN#
+VCORE 1 17
A A
Title : POWER SEQUENCE
ASUSTeK COMPUTER INC Engineer: ENGINEER
Size Project Name Rev
Custom G1S 1.1
Date: , 03, 2007 Sheet 2 of 94
5 4 3 2 1
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
D T0318 D
H_REQ#[4:0] T0319
10 H_REQ#[4:0]
1
1
U0301A U0301B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
ADDR GROUP 0
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 10 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 F1 H_BR0# 10 K24 Y25
DATA GRP 2
H_A#12 A[11]# BR0# R0309 H_D#9 D[8]# D[40]# H_D#41
P2 A[12]# G24 D[9]# D[41]# W22
CONTROL
H_A#13 L2 D20 H_IERR# 1 56Ohm 2 H_D#10 J24 Y23 H_D#42
A[13]# IERR# +VCCP_CPU D[10]# D[42]#
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 20 D[11]# D[43]#
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
C H_REQ#4 L1 C
REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# T0322 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
ADDR GROUP 1
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 U4 AD1 1 T0323 H_D#21 M24 AC26 H_D#53
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# T0324 H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 1 L22 D[22]# D[54]# AD20
H_A#23 U1 AC2 1 T0325 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# H_PREQ# H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 H_TCK H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK H_TDI H_D#26 D[25]# D[57]# H_D#58
T3 AA6 P22 AE21
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP_CPU H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62 Comp0,2 connect with Zo=27.4 ohm,
H_A#31 A[30]# DBR# R0315 H_D#31 D[30]# D[62]# H_D#63
V4 N25 AC23 make trace length shorter than 0.5".
H_A#32 A[31]# 1KOhm D[31]# D[63]#
W3 10 H_DSTBN#1 L26 AE25 H_DSTBN#3 10 Comp 1,3 connect with Z0=55 ohm,
H_A#33 A[32]# 1% DSTBN[1]# DSTBN[3]#
AA4 A[33]# THERMAL 10 H_DSTBP#1 M26 DSTBP[1]# DSTBP[3]# AF24 H_DSTBP#3 10 make trace length shorter than 0.5".
H_A#34 AB2 N24 AC20
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0311 1 2 27.4Ohm 1%
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THRM_DA 50 GTLREF COMP[0]
1 B25 R0317 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0312 1 2 54.9Ohm 1%
THRMDC CPU_THRM_DC 50 TEST1 COMP[1]
2
T0320 A6 R0318 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0313 1 2 27.4Ohm 1%
20 H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R0316 T0304 1 C24 Y1 H_COMP3 R0314 1 2 54.9Ohm 1%
20 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 11,20,30 TEST3 COMP[3]
C4 C0301 2KOhm T0305 1 AF26
20 H_IGNNE# IGNNE# TEST4
R0319 1 2 +VCCP_CPU 0.1UF/10V 1% T0306 1 AF1 E5 H_DPRSTP# 11,20,80
2
1KOhm T0307 TEST5 DPRSTP# GND
20 H_STPCLK# D5 1 A26 B5 H_DPSLP# 20
1
STPCLK# TEST6 DPSLP#
20 H_INTR C6 LINT0 H CLK DPWR# D24 H_DPWR# 10
B 20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 29 29 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 20 B
A3 A21 GND GND GND B23 D7
20 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 29 29 CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# 10
T0321 1 C21 AE6
29 CPU_BSEL2 BSEL[2] PSI# PM_PSI# 80
T0308 1 M4
T0309 RSVD1 Zo=55 ohm, 0.5" max SOCKET478B
1 N5 RSVD2
T0310 1 T2 for GTLREF
T0311 RSVD3
1 V3 RSVD4
RESERVED
T0312 1 B2
T0313 RSVD5
1 C3 RSVD6
T0314 1 D2
T0315 RSVD7
1 D22 RSVD8
T0316 1 D3
T0317 RSVD9 +VCCP_CPU
1 F6 RSVD10
Default Strapping When Not Used
SOCKET478B +VCCP_CPU R0310
68Ohm
XDP_BPM#1 R0301 @ 54.9Ohm 1%
2nd source:12G04600479A H_PREQ# R0302
1
1
2
2 54.9Ohm 1%
H_TDI R0303 1 2 150Ohm 1%
H_TDO R0304 1 @ 2 54.9Ohm 1% H_PROCHOT_S#
H_TMS R0305 1 2 39Ohm
3 Q0301
D
H_DBR# R0306 1 @ 2 1KOhm1% Q0302 3 D 2N7002
+3VS
2N7002
H_TCK R0307 1 2 27.4Ohm 1% 1
1 THRO_CPU 30,31
G
88 PWRLIMIT_CPU S 2
H_TRST# R0308 1 2 649Ohm 1% G
2 S
A R1.0_BOM A
GND
GND GND