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test1




1 1




2



Compal confidential 2




Schematics Document
Mobile Arrandale rPGA989 with
3 Intel PCH(Ibex Peak-M) core logic 3




2009-11-05
REV 1.0

4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
Cover Sheet
http://mycomp.su/x/
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 1 of 45
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A B C D E




Compal confidential Calpella Consumer 14" UMA
CK505 32QFN
Clock Generator
1
Fan conn Page 6
Mobile Arrandale ICS9LRS3197AKLFT MLF 1


P19
2C CPU + GMCH
Socket-rPGA989 DDR3 SO-DIMM X2
DDR3 1066 1.5V BANK 0, 1, 2, 3 P17, 18
LCD Conn. Page 6,7,8,9,10
page 21 UMA

Dual Channel

USB conn x1 P29
CRT Left side (ESATA)
page 20 DMI X4 FDI X4
UMA
USB conn x2
Right side P29

2 2

USB2.0 X12
BT Conn
P29


HDMI Conn. Level Shifter UMA Intel PCH USB Camera
page 22 page 22
Azalia
(LVDS Conn) P21
Ibex Peak-M
SATA Master-1
PCI-E BUS*4 FCBGA 951 Finger print P29
SATA Slave

Page 11,12,13,14,15,16
Mini-Card P29
WWAN


RTL8401 (LAN Mini-Card Mini-Card SPI
Audio CKT
New Card Codec_IDT92HD80 Audio Jack
+Card reader) WLAN TV-tuner
P27 P28
P25 P24 P24 P24 LPC BUS
3 3

P30
SPI ROM 32M
AT25DF321-SU MDC
RJ45 CONN P27
P25
ME code + System BIOS
ENE SATA HDD Connector
4M Bytes P23
KB926
Version D2 P31
SATA ODD Connector
P23

Touch Pad CONN. Int.KBD
RTC CKT. LED
P32 P31
P11 P32 Dock ESATA P29
USB2.0*1

ACCELEROMETER RGB SPI ROM 2M P30 LPC Debug
RJ45 MX25L2005CMI-12G Port P30 Multi Bay P23
ST P23
SPDIF
4 4

MIC*1 EC code
K/B backlight Conn LINE-OUT*1 256K Bytes Capsense switch Conn
P32
P32

Security Classification Compal Secret Data Compal Electronics, Inc.
2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
http://mycomp.su/x/
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P33 P26 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 2 of 45
A B C D E
A




Symbol Note : USB assignment:
USB-0 Left side(with ESATA)
Voltage Rails O MEANS ON X MEANS OFF
: means Digital Ground USB-1 Right side
USB-2 Right side
USB-3 Dock
: means Analog Ground USB-4 Camera
power USB-5 MiniCard(WLAN)
plane @ : means just reserve , no build USB-6 X (HM55 don't support)
USB-7 X (HM55 don't support)
+B +5VALW +1.5V +5VS 45@ : means need be mounted when 45 level assy or rework stage. USB-8 MiniCard(WWAN)
+3VS
VL BATT @ : means need be mounted when 45 level assy or rework stage. USB-9 New Card
+3VALW +1.5VS
USB-10 X
+0.75V CONN@ : means ME part USB-11 Finger Printer
State +VCCP
PA@ : Only For PA (With Capacitor sensor) USB-12 Bluetooth
+CPU_CORE
USB-13 X
+1.05VS OPP@ : For POWER BUTTON (NO CAP SERSOR)
+1.5VS_CPU PCIe assignment:
DEBUG@ : For DEBUG
PCIe-1 WWAN
PCIe-2 WLAN
S0 O O O O PCIe-3 RTL8401 Combo
PCIe-4 New card
S1 O O O O PCIe-5 X
PCIe-6 X
S3 O O O X PCIe-7 X (HM55 don't support)
PCIe-8 X (HM55 don't support)
S5 S4/AC O O X X
SATA assignment:
S5 S4/ Battery only O X X X SATA0 HDD
SATA1 ODD
S5 S4/AC & Battery
don't exist X X X X SATA2 X (HM55 don't support)
1
SATA3 X (HM55 don't support) 1




SATA4 ESATA
SATA5 Multi Bay

SMBUS Control Table PCH I2C / SMBUS ADDRESSING
WWAN M93 NEW
Thermal Thermal Cap sensor CARD G sensor
SOURCE XDP BATT Sensor SODIMM CLK GEN WLAN
Sensor board DEVICE HEX ADDRESS
SMB_EC_CK1
SMB_EC_DA1
KB926 X V X X X X X X V X X +3VL DDR SO-DIMM0 A0 10100000
DDR SO-DIMM1 A4 10100100
SMB_EC_CK2 +3VALW
SMB_EC_DA2
KB926 X X X X X X X X X X X CLOCK GENERATOR (EXT.) D2 11010010
G sensor 1D 00011101
SMBCLK +3VS/+3VALW
SMBDATA
PCH X X X V V V V X X V V
SML0CLK
PCH X X X X X X X X X X X +3VALW EC I2C / SMBUS1 ADDRESSING
SML0DATA
SML1CLK
SML1DATA
PCH X X X X X X X X X X X DEVICE HEX ADDRESS

VCCP +3VS +3VS +3VS
+3VS
+3VL +3VS +3VS
CONNECTED Smart Battery
@+3VALW Cap Sensor board
@+3VALW


ZZZ ZZZ
PCB: DA60000F400
PA@: DAZ0BI00600 (w/o SIM daoughter/B)
OPP@: DAZ0BI00400
DAZ0BI00100 DAZ0BI00400
PA@ OPP@




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
Notes List
http://mycomp.su/x/
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 3 of 45
A
5 4 3 2 1



1A 80mA 80mA
+V_BATTERY Dock con +3VAUX_BT BLUE TOOTH
1.3A 1.3A
Dock con 0.3A +3VS_PEC New card
INVPWR_B+ LVDS CON
EC_ROM 10mA
SPI ROM(PCH) 25mA
20mA CODEC 92HD81
DOCK_VIN VL +5VL +3VL_EC EC 25mA
D
+3VS_DVDD D



CIR INT_MIC
50mA
Finger printer
541mA
PCH
1.5A 1.5A
7642mA +3VS +LCDVDD LVDS CON
201mA 201mA 250mA
8.3A 8287mA +3V_LAN LAN +3VS_CK505
AC VIN +3VALW
275A 275mA 1A 1A
+3V_PEC NEW CARD +3VS_WWAN Mini card-WWAN
7.12A
B++ 169mA 1A 1A
PCH +3VS_WLAN Mini card-WLAN

500mA 500mA 250mA
+USB_VCC USB-L(ESATA) PCH
C
850mA 850mA C


1A +1.8VS 600mA
USBX2-R CPU
7.7A
+5VALW 0.1A 20mAx4 100mA 100mA
+5VALW_LED LED +3VS_LS HDMI TRANS

6.1A DDR3
+5VS
35mA
MDC
B+ 3A
CPU
20.67A +3VS_HDA CODEC I/O
8 A
2.16A 13.3A DDR3 800Mhz 4G x2 1mA 1mA
+1.5V_B+ +1.5V +3VS_ACL G-SENSOR
650mA 650mA
+0.75V DDR3 60mA
CODEC 92HD81
60mA
B
0.5A +AVDD_CODEC B

3.7 X 3=11.1V Mini card-WWAN INT_MIC
+1.5VS_WLAN 500mA
DC BATT 0.5A CODEC PVDD
1650mA Mini card-WLAN
+1.5VS
1.8A
650mA 650mA ODD
+1.5VS_PEC New card
1300mA
HDD
162mA
PCH 1300mA
18.24A Multi Bay
+VCCP 18A
CPU 1A 1A
+CRT_VCC CRT CONN
2.89A 25.24A
VCCP_B+ +1.05V_VCCP 80mA
+1.05VS_CK505 50mA/3.19V
+USB_CAM PC Camera
7A 7A
+1.05VS PCH 120mA 20mAx6
+5VS_LED LED
A A




5.49A 48A/1.05V
CPU_B+ +VCC_CORE CPU

Security Classification Compal Secret Data Compal Electronics, Inc.
1.72A 15A/1.05 V Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title

GFX_B+ +GFX_CORE CPU
http://mycomp.su/x/ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power delevry
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 4 of 45
5 4 3 2 1
A




1 1




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
Notes List
http://mycomp.su/x/
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Calpella_UMA_LA4106P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 12, 2009 Sheet 5 of 45
A
5 4 3 2 1
Layout rule 10mil
width trace length <

+VCCP
0.5", spacing 20mil JCPU1B
R1 1 2 20_0402_1% COMP3 AT23 COMP3
A16 CLK_CPU_BCLK
XDP Connector XDP_TDI @ R2 1 2 51_0402_1%
BCLK CLK_CPU_BCLK 14




MISC
R3 1 2 20_0402_1% COMP2 AT24 B16 CLK_CPU_BCLK# XDP_TMS @ R4 1 2 51_0402_1%
COMP2 BCLK# CLK_CPU_BCLK# 14
R5 1 2 49.9_0402_1% COMP1 XDP_PREQ# @ R6 1 2 51_0402_1%




CLOCKS
G16 COMP1 BCLK_ITP AR30
BCLK_ITP# AT30
R7 1 2 49.9_0402_1% COMP0 AT26 XDP_TDO R8 1 2 51_0402_1%
COMP0 CLK_EXP
PEG_CLK E16 CLK_EXP 12
D16 CLK_EXP# This shall place near CPU
PEG_CLK# CLK_EXP# 12
PAD T1 TP_SKTOCC# AH24 SKTOCC# XDP_TCK @ R9 1
DPLL_REF_SSCLK A18 2 51_0402_1%
D DPLL_REF_SSCLK# A17 eDP D
H_CATERR# AK14 CATERR#




THERMAL