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213 Quad Voltage Source
SPECIFICATIONS IEEE-488 BUS IMPLEMENTATION
QUAD VOLTAGE SOURCE: Sources voltage from four independent, isolated ports. Includes 8-bit MULTILINE COMMANDS: SDC, DCL, GET, UNL, UNT, SPE, SPD,
digital I/O port. MTA, MLA.
FUNCTION: Can be used as a constant DC source or as a voltage waveform generator. UNILINE COMMANDS: IFC, REN, EOI, SRQ, ATN.
INTERNAL BUFFER: An 8192-location internal buffer is used to store values for waveform gener- INTERFACE FUNCTIONS: SH1, AH1, T4, TE0, L4, LE0, SR1, RL0, PP0,
ation. DC1, DT1, C0 (C28 during calibration), E1.
CONTROL MODES: Four control modes may be chosen by the user: PROGRAMMABLE FUNCTIONS: Port select, output voltage, control
mode, autorange enable, range select, waveform step interval,
Direct: Output changes upon execution of the "V" device dependent command.
number of cycles, offset calibration, gain calibration, buffer alloca-
Indirect: Output changes after receiving an external trigger. tion, buffer data, buffer location pointers, command trigger, trigger
Stepped: Step through internal buffer, under control of external triggers. masking, SRQ masking, system defaults, digital output, EOI, IEEE-
Waveform: Output voltage waveform from buffer, under control of an internal time base. 488 output terminator, IEEE-488 output format, system status out-
NUMBER OF WAVEFORM CYCLES: The number of cycles through the buffer in the Waveform put, system test, error query.
Control Mode is user selectable, 1 to 65535 or continuous. IEEE-488 address is set manually from the rear panel.
SYNCHRONIZATION OF PORTS: The ports can be forced to execute their voltage waveforms in a
synchronized manner.
WAVEFORM STEP INTERVAL: 1ms to 65535ms.
TRIGGER AND SRQ: IEEE-488 bus or rear panel DB-25.
DIGITAL I/O: 8 TTL compatible level sensitive inputs. 8 outputs, internally selectable TTL compat-
ible or open collector with 100mA drive and capable of withstanding 50V (for driving relays or
other devices from an external voltage supply).
VOLTAGE ACCURACY GENERAL
MAXIMUM STEP 18