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SERVICE INFORMATION FROM HEWLETT-PACKARD
JANUARY-FEBRUARY 1977
LOGIC INDICATOR SYMBOLS output with respect to its definition.
1 For our purposes, we will assume
SYMBOLS Indicator symbols identify the active positive logic (Le., the more positive
SUMMARY state or level of a symbol's input or voltage level (H) a logic 1).
is
by Jim Bechtold
A1 Faulkenburg
-[ UL
--
High Level Sanrittve period
ACTIVE HIGH inputs and outputs are
indicated by t h e m of the polarity
indicator (b ) or negation symbol ( 0 ) .
Since the articles on Logic Symbols
were spread over almost 9 months,
and many new subscribers did not
receive all the pertinent issues, I felt
LOW9P2l-L-
Level %nsitive A C t M Period ACTIVE LOW inputs and outputs are
indicated by thepresence of the polarity
-e&
inaicator ( h ) or negation symbol ( 0 ) .
I
it would be appropriate to highlight
some of the material from the series
Lowic-High
Edge Sansittve Active Period
and expand on other items that had EDGE SENSITIVE (Dynamic) inputs are
been originally edited out. Also, if indicated by the presence of the
you want to obtain a copy of the dynamic indicator symbol ( b ):
IEEE 91-1973 Standard, write to: L
High t e Low
+x
Edge Sensitive Act've Per'od Input Signal
American National OUTPUT DELAY indicator symbol
Standards Institute ( 1 ) shows that an output becomes
effective when the signal that initiated
1430 Broadway that change returns to its opposite state.
New York, N.Y. 10018 Active Period
Flmure 2. indiccltor Symbols
QUALIFIERS
CONTIGUOUS BLOCKS 3, there is generally no logic connec-
Qualifiers are that portion of the tion across a horizontal line; how-
symbol (either. rectangular o r Two symbols may share a common ever, there is always a logic connec-
distinctive shaped) that denotes the boundary parallel or perpendicular tion across a vertical line. An excep-
logic function. to the direction of signal flow. Note tion to this is the Common Control
that in the examples shown in Figure Block (Figure 4) where there is a
logic connection across a horizon-
t a l line.
AND NAND
IN THIS ISSUE
LOGIC SYMBOLS SUMMARY
OR NOR
GLOSSARY OF IC TERMS
SERVICE TRAINING
=tD-+-
E XC LUSl V E
BUFFER
SEMINARS
OR
333OAlB TROUBLESH 0 0 TIN G
SERVICE NOTE
I INVERTER
SAFETY SERVICE NOTES
I
Figure 3 Contiguous Blocks
. NEW SERVICE NOTES
I
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COMMON CONTROL BLOCK DEPENDENCY NOTATION
The Control Block is used in conjuc- Dependency Notation is a way to and interconnections involved. The
tion with an array of related symbols simplify symbols for complex IC following examples use the letter
in order to group common logic elements by defining the existence "C" for control and "G" for gate. The
lines. Figure 4 shows how the Con- of an AND relationship between dependent input is labeled with a
trol Block is usually represented. inputs, or by the AND conditioning number that is either prefixed (e.g.
of an output by an input without 1X) or subscripted (e.g.X1). They
actually showing all the elements both mean the same thing.
The input that controls or gates other
CONTROL
BLOCK inputs is labeled with a "C" or a "G",
followed by an identifying number.
The controlled or gated input or output
is labeled with the same number. In this
ARRAY example, "1" is controlled by "Gl".
-F
When the controlled or gated input or
output already has a functional label (X
is used here), that label will be prefixed
or subscripted by the identifying
number.
Figure 4. Common Control Block
If a particular device has only one gating
or control input then the identifying
Figure 5 shows a quad D-Type flip- number may be eliminated and the
flop with reset. This can be redrawn relationship shown with a subscript.
by combining what has been shown
previously in Figures 3 and 4 about If the input or output is affected by more
Contiguous Blocks and Common
Control Blocks. The result is shown
in Figure 6.
1.2x
than one gate or control input, then the
identifying numbers of each gate or
control input will appear in the prefix or
3
subscript, separated by commas. In this
example "X" is controlled by "Gl" and
Note that the more complex repre- "G2".
sentation shown in Figure 5 might be
used when the flip-flops are func-
t i o n a l l y scattered around the Figure 7. Dependency Notation, General Form Uslng Numbers
schematic (not used as a quad unit).
Note that many times a controlled
line may already be labeled with a
number; as for example, a coder. In
this case, the controlling or gating
RESET input will be labeled with a letter. See
CLOCK RESET
Figure 8.
1
DATA CLOCK
DATA
DC I I
DATA DATA
FF
3
Figure 6. Quad D-Type Latch Figure 8. Dependency Notation, Coder
Figure 5. Quad D-Type Flip-Flop (Combined) Example Using Letters
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LOGlC SYMBOLS
rl) COMPLEX #&VICES
Figures 9 through 12 show how the
basic symbols we've looked at can
be combined in various ways to
illustrate the behavior of fairly com- Shift Register Control Block used to
plex devices. a +rn show common inputs to a bidirectional
c1 shift register. Notice that "+ means
m"
b c r n shift the contents to the right or down by
"m" units. And " c m " means shift the
3
c2
contents to the left or up by "m" units.
J
c-c3
d- A Note: If m= 1, it may be omitted. Inputs
REG
1 r:
C12,3
"a" and "b'are each single IC pins that
have two functions. Input "a" enables
-3D
- 1D FF - one of the inputs to the top D-type flip-
flop (lD), and also shifts the register
-30 FF C1.2.3
1
- contents down one unit. Input "b"
enables one of the inputs to the bottom
C1.2.3 flip-flop (2D),and also shifts the register
-30 FF _.
1 contents up one unit. Input "c" loads all
four flip-flops in parallel (3D). Input "d"
-3D
720
FF
c1.2.3
,- is a common rescdt. The output delay
indicator is used because these are
master-slave flip-flops.
Register control block used to illustrate
a quad D-type latch. There is a common
active-low reset (R), and a common
edge-triggered control input (C). Since
t h e r e is o n l y one d e p e n d e n c y
relationship, the controlling input is not
numbered and the controlled functions Figure 11. ShUt R ~ 1 s t . rExample
(D) subscripted with a C.
are
Figure 9. Quad D-Type Latch Example
-t m Counter Control Block used to show
--m -9,tl - common inputs to a PresettableDecade
- c1 =OF1 - Up/Down Counter. Notice that `` + m"
-R means count up (increment the count)
by "m"; "-m" means count down by "m".
1 r Note: if m =1, it may beomitted. Since the
-D1 ; -t1- D-type flip-flops are master-slave, the
output delay indicator is used. The "=9,
-D l FF
(2) -+-I - + 1" and "=O, -1" notation defines when
the carry and borrow outputs are
generated. They also define it as a
-01 FF
(4) -+l - decade counter; a binary counter would
have carry indicatedwith "=15, +1". Flip-
-Dl FF
(8) - + l__ f l o p weighting is i n d i c a t e d i n
parenthesis.
Selector Control Block used to simplify
AND portion of a quad A N P O R select
gate. When G1 is high, the data
presented at the "1" inputs will be gated
through. When G2 is high, the data
presented at the " 2 inputs will begated
through.
Flgure 10. And-Or Selector Example Figure 12. Up/Down Counter Example
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IC TERMS
I
-
' I
A GLOSSARY OF CCD - Charge coupled device. Primary of a character set consisting of 8-bit
applications of CCDs have occurred in coded characters; used for information
IC TERMS image sensing, signal processing, and as representation and interchange among
high-density semiconductor memory data processing system, communications
components. A CCD is a semiconductor systems and associated equipment. Used
that stores localized packets of charge especially by IBM.
and transfers them to adjacent locations
when stimulated by externally manipu-
ECL - Emitter-coupled logic. ECL is
How many times have you read technical approximately six times faster than
articles, or manuals and schematics that lated voltages. The charge in each packet transistor logic. It usually requires only a
used undefined acronyms? (An - which depends on the CCD's capaci- one volt swing in three to four nano
acronym is a word formed from the initial tance and its applied voltage - can seconds to change states.
letters of a compound term -9.g.
SNAFU- and we all know what that
represent digital information.
CMOS -
Complimentary metal-oxide-
EEROM -
Electrically eraseable Read-
Only Memory. A voltage is applied at an
means.) semiconductor. CMOS technology uses input pin to overcome the charge and bit
both P and N channel devices on the same designation a t a particular gate.
Here is a partial list of acronyms and silicon substrate. Basic CMOS construc-
technical terms taken from the tion uses N and P channel devices con- EFL - Emitter function logic. Used for
"Microcomputer Dictionary and Guide" nected in series. Only one device i s turned LSI purposes only - non-inverting.
by Charles J. Sippl and David A. Kidd. on at one time, keeping power dissipation EPROM - Electrically programmable
low. The switching of devices through the read-only memory. Manufactured with a
active region and charging and discharging transparent quartz lid covering the silicon
of capacitance are main causes of dissipa- die to facilitate erasure with an ultraviolet
tion. Major advantages are: 1) Low power irradiation instrument. Programming will
Bubble Memories - Such memories are dissipation. 2) Good noise immunity not degrade after exposure to other light
actually tiny cylinders of magnetization (45% of drain voltage). 3)High fanout to sources, such as fluorescent lighting or
whose axis lie perpendicular to the plane other CMOS. 4) Allowance for very wide sunlight.
of the single crystal sheet that contains
them. Magnetic bubbles arise when two
magnetic fields are applied perpendicular
t o the sheet. A constant field strengthens
and fattens the regions of the sheet whose
power supply variations. 5) Shorter
propagation delay than with p-MOS
(approximately 60ns). 6) Full tempera-
ture range capabilities. CMOS is used in
HiNlL - High noise immunity logic. A
MOS microprocessor system can be
a
battery operated systems, aerospace logic troubled by disastrous bugs unless it is
magnetization lies along it. A pulse field protected against noise transients gener-
systems and portable digital communib-
then breaks the strengthened regions into ated by switches, electro mechanical
tion equipment. It i s also used for com-
isolated bubbles which are free to move ponents in digital instruments which peripherals and other nearby noise
within the plane of the sheet. Because the sources such as lamps and machinery. But
operate in noisy environments.
presence or absence of bubbles can repre- filters and shielding. the traditional cures,
sent digital information, and because are often difficult to add to a micro-
other external fields can manipulate this processor because of size and cost con-
information, magnetic bubble devices DIP - Dual inline package. The most
popular IC packaging in use in the straints. Many of the problems can be
could find uses in future data storage avoided by substituting HiNl L interface
mid-1970's i s the plastic dual inline case,
systems. devices for conventional I/O logic.
using plastic for economic reasons and
the dual inline package (DIP) configura- HiNIL-Bipolar Hi Noise Immunity Logic
tion for manufacturingefficiency. - has a guaranteed DC noise immunity
CAM -Content addressable memory.
DTL - Diode transistor logic. Logic is
about 10 times that of TTL, for example
The unique characteristic of content (3.5 vs. 0.44. Also, HiNlL blocks AC
addressable memories as logic elements is performed by diodes. Transistors are used transients large enough to cause TTL
that the location of a desired data pattern as inverting amplifiers. malfunctions. Two additional advantages
is retrieved on command. CAMs also are superior output drive and in low
provide a normal read/write across
method to allow programming or switch-
EAROM - Electrically alterable ROM.
power systems, protection of CMOS
memory and random logic inputs. When
Electrically alterable read-only memories
ing of the data base to be scanned. These HiNlL and CMOS are combined, they
are low powered devices that are pro-
features make CAMs ideal for quick data maximize system noise immunity and
grammed much like ordinary RAMS.
searches, correlation checks, and sorting assure an excellent system function/
They have no fusiable links and do not
by value or attribute. One specific power product. HiNlL and CMOS inter-
require ultraviolet irradiation. A voltage is
application of fast CAMs is in large virtual face directly at V , voltages from 10 to
applied a t an input pin to overcome the
memory systems. Another is in airplane 16 volts, the power supply range of
reservations systems where searches by charge and bit designation a t a particular
HiNl L. Moreover, HiNl L protects CMOS
gate.
attribute (freight number, destination, inputs from destruction by static elect-
departure, credit card, etc.) comprise a EBCDIC Code -
An acronym for Ex- ricity and from harmful DC input levels
very high percentage of the computing tended Binary Coded Decimal Inter- that can exist before CMOS circuits are
effort. change Code. A standard code consisting powered up.
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I *
IC TERMS
I *I
*
5
nto b l w , @eating new fieM affaet tramistar. Thw, MOfi-t.
al;rpew to mow towpird types of traMistm far IarW
mi, &ring the w i v a - intwmed (kSl) metatsxide s m o - e cn blowin$').
lant of positive eharps flowing to the ductar components fur wmputer
tmminai.
-
WIC High threshold lo&. Designed for
m r y units,
MFET - Metal oxide miconductor
RAJH - Random access memory. A col-
lection of s e m i d u c t o r cells that can be
industrial appiicrrtions that desire power- field effect tramistor. When a voltage in either a ONE or a ZERO logic state.
excess of lOV, a ,high (negative with respect to the substrate) is This stored piece of infarmation L
r operation in an elee applied to the gats, then the MOSFET is referred to as a bit, and a m s of i
a
oby mvironment, and moderate a conductor, and, if a potential diffarmce
is rppfkd tmwm towoe and drain, thws
c circuit
utilizing nrro or more ty compo-
nene which perform similar functions
Integrated injection logic. A new maintain the setting. This is why this type
kind of bipolar LSI logic that may positive "holes" cany the cwrtent in of RAM is referred t9 as
oontsin as many as 3,008 gates operating
at less than 10 nam oecond speeds,
pchannel devices. And,
trans travel w h faster
6
-
Ring cort3wsr A k#,
bistable &lrmetrt.ssuch
W$%ti one rutnowatt of p e r MCS there is a third h@Cw#)s.
i eW a one is in a spedfied s
Per 9me are appearing in eleotronic This type of Cirouit has both nchmnel time and such that, as
wrist wWch.es and as single chip con- and p-channel devices on the same chip. counted, the position of the dement in
trollers for industrial, automobiles, and The primary advantage of CMOS is its the specified state move in an ordered
computer systems. extremely low quiescent power dissipa- sequence around the loop.
tion. CMOS is available either in the form
of dedicated circuits or as arrays of ROM - Read only memory. A blank
WWeproartwr - The semieanducfor
central processing unit (CPU) and om of
ices. $trimly speaking,
are ICs; therefore they
to be a mosaic of
the principal components of the micro- in the boundaries of t i hs
computer. The elements of the micro- report - which is restricted to discrete
FETs. of a final manufacturing stage. Informa-
processor are frequently contained on a
tion i s stored permanently and is read
single chip or within the same package MSI - Medium scale integration. The out, but not altered in operation. ROMs
but sometimes distributed over several accumulation of several circuits (usually are used for various functions - storing a
separate chips. In a microcomputer with a less than 100) on a single chip of computer or microprocessor's instruction
fixed instruction set it consists of the semiconductor. set, or handling applications programming
arithmetic logic unit and the control logic
unit. In a microcomputer with a micro-
MTL - Merged transistor logic. This such as calculating fast Fourier trans-
bipolar trend started in 1972 with the forms, handling sine and m i n e problcams,
programmed instruction set, it contains
presentation of the first integrated- or running mi;Crodriven F q games. A
an additional control memory unit. program permanently incorporated into
injection logic (I2L) or merged-transistor
Microprocessors are often used in instru-
1 logic (MTL) circuits. These circuits use the hardware of a ROM and stored
mentation to make front panel controls permanently in a read-only state i called
s
inverted multicollector transistors by
push button oriented. The microproces- "firmware".
carrier injection. The merits af the new
sor can also contain a complete diagnostic
program that will complete a self test of
IiL/MTL circuits point particularly to
their favorable "speed-power product"
RTL - Resistor transisto c is
the instrument. are
figures and high packaging density
NK)s -Metal-oxidesemiconductor. 1) In compared to MOS circuits.
MOS technology. amplification or switch-
ing is accomplished by applying a signal
I voltage to a gate electrode. The resulting PROM - Programmable read-only
electrostatic field creates a conduction memory. Refers generically to all ROM's
channet between the two defused regions that can be programmed by the user, and
I in the silicon crystal structure called the in some cases, re-programmed. Usually
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CUSTOMER SERVICE SEMINARS
GLOSSARY OF IC
TERMS (Continued)
TTL (or T2L) - Transistor-transistor
logic, a kind of bipolar circuit logic which
takes i t s name from the way the basic
able CMOS logic generally parallels that
of TTL. This infers similar system design,
therefore the unique aspects of CMOS
e
transistor components are inter- interface are electrical, rather than
connected. The TTL logic features a logical. The electrical differences are as
multiple-emitter-base diode, each serving follows:
Threestate Logic - The output of a
as an input. Operation of the circuit is
very similar to that of some DTL circuits.
CMOS output drive a t Vcc = 5 V is
standard logic element has two stable and 1/40 of standard TTL output drive,
TTL logic uses two dc flip-flops with one
defined states (a logic "1" or true state therefore increasing the need for
single-phase clock pulse to control the (I
and - logic "0" or false state). Both of drivers to operate relays, displays and
these states can be represented by a low logic steps in a classic master-slave
even TTL.
impedance device coupled to one of the relationship.
CMOS power supply voltage may
power supply rails. A three-state logic TTL vs CMOS - Complementary MOS
range from 3 to 18 V (practical limits
i
element simply provides an additional (CMOS) digital logic continues to grow in
are 4 to 12 V): interface elements
third output state. When in the third state popularity as more and more functions
should operate over the same range.
(output disable or OFF), the output is are added to this family. Originally
effectively disconnected from the logic designed for aerospace application, CMOS CMOS circuits require inputs above
driving devices by a high impedance logic i s now used in portable instruments, 70% VDD for logic HIGH, below 30%
network at i t s output. This allows a industrial and medical electronics, auto- VDD for logic LOW. The high level
number of devices to be connected to a motive applications, and computer requirement is a problem when driving
bus line. peripherals. In terms of functions avail- CMOS from TTL.
CUSTOMER SERVICE Hewlett-Packard continually offers
training to customers on a world-
States in an effort to bring our
training facilities closer to your area.
SEMINARS wide basis to help keep service skills For registration please use the form
current with HPs extensive product on page 15 of Bench Briefs or con-
line. Seminars are Provided tact your Hewlett-Packard Salesand
throughout Europe and the United Service Office.
8660 SYNTHESIZED SIG GEN
MAR 14-15, LOS ANGELES, CALIF.
MAR 28-29, RICHARDSON, TEXAS
MAR 30-31, PARAMUS, NJ
COURSE CONTENT
J
t
I
This course includes the following components of the
8660 System:
8660A Thumbwheel Mainframe
866OC Keyboard Mainframe
86601A RF Section 0-110 MHz
86602B RF Section 1-1300 MHz 1
86603A RF Section 1-2600 MHz
86632B Modulation Section
86633A Modulation Section
86634A Modulation Section
86635A Modulation Section
11661B Frequency Extension Module
i
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CUSTOMER SERVICE SEMiNARS
~~
I
I
LECTURE
1. Introduction to 8660 System
IV.
A. System Block
B. Specifications
C. General Operation
1. Mainframe
2. RF Section F. Lab
. 3. Modulation Section
D. Indirect Generation (Video Tape)
1
I
11. 8660 Theory
I A. Reference and Loops
r;' B. DCU
~ C. Remote Programming
111. 86601A
A. Operation and Controls
B. Mainframe Interface
C. Functional Block Theory
D. Adjustments
E. Module Level Troubleshooting
F. Lab PRESTUDY uai; View Video Tapes
90030-566 (Optional)
I8
I
8640
MAR
AM/FM SIGNAL GENERATOR
16-17, LOS ANGELES, CALIF. COURSE CONTENT
MAR 28-29, PARAMUS, NJ
MAR 30-31, RICHARDSON, TEXAS
LECTURE
1. Introduction
11. Features and Model Options
111. Front Fane1 Features
A. VideoTape
B. Demonstration
IV. Theory
A. Block Diagram r
B. Assembly Locations
C. Schematic
LAB
I. Adjustments
11. Performance Tests
111. Troubleshooting
PREREQUISITES - Basic knowledge of digital logic
circuits and general knowledge of
electronics including operational
amplifiers
PRESTUDY - Review digital logic and block diagram
information in 8640B manual.
Read pages 1-48in "Signal Generator
Seminar" textbook.
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CUSTOMER SERVICE SEMINARS
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141T, 8552N8, 85538,
85548, 8555A
SPECTRUM ANALYZERS
MAY 9-13, PARAMUS, NJ
V1. Troubkshooting techniques ("bugged" instruments
with typical failures)
VII. Repair cautions and mechanical tuning adjustments
LAB
I. Front panel familiarization'
11. Change first mixer
111. Set up YIG frequency
IV. Normal calibration
P PREREQUISITES-None
PRESTUDY - Read Application Note 150, "Spectrum
.
Analysis . . Spectrum Analyzer Basics";
View video tape "141T/8552B/8554B
Spectrum AnaIyzer Operation",
90030-646,20 minutes (Optional)
- Read Application Note 136,
"Understanding and Operating the
8555A Spectrum Analyzer and 8445B
COURSE CONTENT Automatic Preselector"', View video
tapes "141T/8552B/8555A Spectrum
Analyzer Operation", Part I, 9OO30-..-647,
28 minutesandhrt iI, 90030-697,
18 minutes (Optional)
LECTURE
I. Block diagram related to front panel controls. Optional
viewing of video tape "141T/8552B/8553B Spectrum
Analyzer Operation", 90030-607,26 minutes.
11. Video tape, "141T/8552B/8554B Spectrum Analyzer
Operation", 90030--646,20 minutes
111- Overall block diagram and system description
IV. Detailed block diagram
V. Circuit descriptions
A. Input circuits
B. First, second and third mixers and F stages
C. YIG drive circuits
D, 50 MHz amplifier
E. Marker generator
F. Phase-lock circuits
I
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CUSTOMER TRAlNlNG CALENDAR
'I I
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W C E SEMINAR TRAINING CALENDAR
I
DATE CONTENT LOCATION TUITION COORDINATOR
March 14 and 15,1977 8660 Synthesized Service Center $200/Student Ralph Helper
Siwal Generator 6315 Arizona PI. - 3939 Lankershim Blvd.
Los hgeles, CA 90045 N. Hollywood, CA 91604
(213) 776-7500 (213) 877-1282
March 16and 17,1977 8640 AM/FM Service Center $200/Student Ralph Helper
Signal 6315 Arizona PI. 3939 Lankershim Blvd.
Generator Los Angeles, CA 90045 N. Hollywood, CA 91604
(213) 776-7500 (213) 877-1282
March 28 and 29,1977 8660 Synthesized Service Center $2OO/Student George Brush
Signal 201 E. Arapaho Rd. Richardson, TX
Generator Richardson, TX 75080
(214) 231-6101
March 28 and 29,1977 8640 AMIFM Service Center $200/Student Pete Johnson
Signal W120 Century .Rd. Paramus, NJ
Paramus, NJ 07652
(201) 265-5000
March 30 and 31,1977 8660 Synthesized Service Center $200/Student Pete Johnson
Signal W120 Century Rd. Paramus, NJ
Generator Paramus, NJ 07652
(291) 265-5000
March 30 and 31,1977 8640 m/FM*-h&
.~ Service Center $2OO/Student George Brush
Signal 201 East Arapaho Rd. Richardson, TX
Generator Richardson, TX 75080
(214) 231-6101
May 9 thru 13,1977 141T, 8552A/B, Service Center $350/Student Pete Johnson
85538,85548. Wl20 Century Rd. Paramus, NJ
8555A Spectrum Paramus, NJ 07652
Analyzers (201) 265-5000
August 29 thru 8660,8640, Signal Stanford Park Div. $350/Student Bill Whitney
Sept. 2, 1977 Generators 1501 Page Mill Rd. Palo Alto, CA
#5A, 436A Palo Alto, CA 94304
Power Meters (415) 493-1501
September 1 and 2,1977 5340A Microwave Service Center $2OO/Student Pete Johnson
Frequency Wl20 Century Rd. Paramus, NJ
Counter Paramus, NJ 07652
(201) 265-5000
September 26 5328A t Options, Santa Clara Div. $250/St udent Fran Groat
thru 28, 1977 Universal Counter 5301 Stevens Creek Blvd. Santa Clara, CA
Santa Clara, CA 95050
(408) 246-4300
5062C Cesium Beam Santa Clara Div. $450/Student Fran Groat
a
October 10 thru 14, 1977
Frequency Referencx 5301 Stevens Creek Blvd. Santa Clara, CA
Santa Clara, CA 95050
(408) 246-4300
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SAFETY-RELATED SERVICE TIPS
.
SAFETY-RELATED 412A VTV
SERVICE NOTES
The Model 412A Vacuum Tube
Voltmeter "volts" probe (HP Part No.
Service Notes from HP relating to 00412-62101) has a small Allen
personal safety and possible screw set in the red rubber boot to
equipment damage are of vital the rear of the probe. This Allen
importance. To make you more screw has been recessed and
aware of these important notes, HP covered with a rubber insulating
has recently modified the Safety compound to prevent possibleflash-
Service Noteformat. The note is now over between the screw (common
printed on paper with a red border, ground) and the operator, when
-
and a " S'suffix has been added to making floating measurements.
the note's number. In order to make
you immediately aware of any Frequency checks should be made
potential safety problems, we are to insure that this insulation is
high-lighting safety-related Service properly seated. If replacement
Notes herewith a brief descriptionof becomes necessary, a compound
each problem. Also, in order to draw such as G.E. RTV-108 Silicone
our attention to safety-related
4
I ervice Notes on the Service Note
order form at the rear of Bench
Rubber (HP Part No. 0470-0304) is
recommended.
Briefs, each appropriate number is
highlighted by beinQpri rhr.
140T AND 141T 3720N3721A
STORAGE SCOPES SPECTRUM DISPLAY
AND CORRELATOR
141T DISPLAY SHOWN WITH
8555A SPECTRUM ANALYZER
A shock hazard may exist on the fan
housing or any metal part common
to it. The fan assembly is rubber
shock mounted and is electrically
isolated from ground: If any of the
series regulators, the thermal
switch, or the fan motor itself should
short to the fan housing, a shock 3720A Spectrum Displays, serial
hazard would exist. numbers 1405U00496 to 1544U-
00596, and 3721A Correlators, serial
To eliminate the possibility of this numbers 1349U00240 to 1349U- In keeping with Hewlett-Packard's
shock hazard it is necessary to
install a ground wire from the fan
housing to the chassis of the
00260 may have been manufac-
tured without a C;RT plexiglass
safety shield installed. Although it is
safety policies, the screen will be
installed at no charge when the
instrument is returned post-paid to
0
instrument. For more information desirable to have the safety shield in HP for repairs. If desired, you may
~ please order the appropriate Service place, it is not absolutely essential order the kit (HP Part No. 5061-0854)
Note with the form provided in due to the small CRT size and exist- complete with installation instruc-
Bench Briefs. ing safety requirements. tions, at no charge.
/
WWW. H PARCHIVE.COM
SERVICE NOTES
ATTENTION
3330A/B SYNTHESIZER
OWNERS
Two new Service Notes, 3330A/
B-8A and 3330A/B-9, have been
issued that provide information on
improving the reliability, and
isolating an unusual failure symp-
I
tom in the 3330A/B.
Natural aging of the instrument can
sometimes cause the slide switches certain integrated circuit packages
on the A6 and A7 board to become When the 3330A/B is used in a
intermittent. Intermittent switches 3040A, 3041A, and 3042A Network are at fault. Please note that if your
on the A6 board can cause the Analyzer System, an unusual IC system is operating correctly the
IC's need not be changed.
I
3330A/B to fail to respond to its failure can cause timing problems
Listen address. Improper display that in turn cause unusual and
can be caused by intermittent intermittent operation (e.g., the Owners of the3330A/B Synthesizers
switches on the A7 board. Service controller may select an incorrect can order the Service Notes with th