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Title Page
MS-9620-0A
Cover Sheet 1
D
Block Diagram 2 D
POWER DELIVER 3
CPU 0 940 PIN 4-7
System Memory / DDR Terminations 8-11
CPU1 940 PIN 12-15
CK8-04 PRO 16-21
PCI1 & CPUCLOCK BUFFER 22
PCI-Express *16 and *1 23
C C
PCIE-*4 SLOT 24
PCI-Express *8 and NV-SLI 24
Rear USB Port 26
BCM 5705 GbLAN 27
FAN 28
B 88E1111CAA LAN 29 B
Front USB Port 30
AC97 ACL850 31
KB/MS/LPT/COM Port 32
ATX connector / Front Panel 39 W627THF LPC I/O / BIOS 33
SYSTEM CLOCK BLOCK DIAGRAM 40 VIA 6306 1394 34
SYSTEM RESET BLOCK DIAGRAM 41 IDE CONNECTOR 35
A
SYSTEM SMBUS BLOCK DIAGRAM 42 MS-6 ACPI Controller & MS-6+ 36
A
Micro Star Restricted Secret
DDR ROUTING BLOCK DIAGRAM 43 VRM1 ISL 6566 37
Title
Cover Sheet
R ev
0A
Document Number MS- 9620
GENERAL SPEC 44 VRM0 ISL 6566 38 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City, Tuesday, January 25, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 44
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http://laptop-motherboard-schematic.blogspot.com/
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Block Diagram
DDR400
AMD K8 Socket 940 AMD K8 Socket 940
D D
CPU 1 HT(8GB/s) CPU 0
HT(8GB/s) DDR * 6
PCIE_X8
PCIE_X8
PCIE_X4
PCIE _X20LANE
C C
1 PCI Slots
IDE Slot
==>ATA66,100,133 *2
Dual ATA
PC I-33
100/133
CK8-04
B B
LPC BUS
AC97
AC97 => S/W Audio
ALC850 8 CHANEL
SUPER I/O
Giga Bit LAN VIA 6306 W83627HF FWH
BCM5705 1394-->2 PORT SERIAL ATA *4 USB RGMII
A A
Dual USB 1.1 OHCI 88E1111
/2.0 EHCI 8 Ports PHY GIGA
==> Front-Port *6, BIT LAN Micro Star Restricted Secret
Back-Port *4 Title Rev
Block Di agram
0A
Document Number MS- 9620
http://laptop-motherboard-schematic.blogspot.com/ MICRO-STAR INT'L CO.,LTD.
N o. 69, Li-De St, Jung-He City,
Last R evision Date:
W ed nesday, February 02, 2005
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 44
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MS-9620 POWER DELIEVERY DIAGRAM
24A
D 19.8A D
VCC2_5_DDR 1.5A VTT_DDR 25 0mA 50mA
P12V_CPU 25A 160A 80A VCC3 5VSB 5VDUAL USB*10
VRD10.1 CPU0 Linear Reg Linear Reg (Note 3)
28.3A+?A P41 P41 0.715A+?
Switch Reg P13 P41
P37 P38 P37 20 0mA
0.107A BIOS 0.3A Keyboard
EFF 80% P32
VCC_25 & Mouse
80A CK-804
ANALOG
P41 0.465A+? 60mA
CPU1
P13
3VDUAL 1V5_DUAL CK-804
3.0A PCI Express X16 Linear Reg
P23 P41
+12V 7.5A
Fan*5
19.245A+?A 30mA BCM5705
95.4mA 1394
P37 P29
2.8A
PCI1 37 5mA
PCI1
(Note 4)
1.9A PCI1 P28
4 5mA+?
P5V_AUD ALC850
Linear Reg
C
1.5A PCI Express X4 C
P28
4.4A
PCI Express X16
3VDUAL 40 0mA BCM5705
P41
37 5mA
PCI1
1.5A PCI Express X4 (Note 4)
45 0mA 88E1111PHY
3A 1.5A
PWR1394 J1394CON1
Power Isolation 12 0mA
1V5_DUAL CK-804
Linear Reg
30 0mA
1V2_VDDA CK-804
Linear Reg
B B
37 1mA
CK-804
VCC5 5.5A 5.5A
5VDUAL USB*10
16.396A+?A (Note 3)
P37 P41
8.3A
V_1P5_CORE CK-804
Switch 8.3A
P41
95.4mA
1394 P29
A A
2.5A
PCI1
P27 P28 Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
http://laptop-motherboard-schematic.blogspot.com/ Power Delivery Block Diagram
Size Document Number R ev
Custom MS-9620 0A
Date: Tuesday, January 25, 2005 Sheet 3 of 44
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VTT_DDR VTT_DDR U2006B
H0_MEMCLK_H3
HT0 is for SH0 & Golem connection AC19
AE19
VTT1
VTT2
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
G20
G21
C2052 C2542 C2560 J19 AE21 H0_MEMCLK_H5 H0_MEMCLK_H5 <10>
R2063
VTT_DDR VTT3 MEMCLK_UP_H(2)
H19 AE20 H0_M EMCLK_L5 H0_MEMCLK_L5 <10>
VTT4 MEMCLK_UP_L(2)
4.7u/0805 0.22u/16V/X7R 1000P/50V/X7R F20 L24 H0_MEMCLK_H3 H0_MEMCLK_H3 <9>
(BOT)120RST
VTT5 MEMCLK_UP_H(1)
G19 L25 H0_M EMCLK_L3 H0_MEMCLK_L3 <9>
H0_M EMCLK_L3
VTT6 MEMCLK_UP_L(1)
AE18 R23 H0_MEMCLK_H2 H0_MEMCLK_H2 <8>
VTT7 MEMCLK_UP_H(0)
AC18 T23 H0_M EMCLK_L2 H0_MEMCLK_L2 <8>
H0_MEMCLK_H2
R2089 VTT8 MEMCLK_UP_L(0)
F21 H23
SOLDER SIDE VTT9 MEMCLK_LO_H(3) R2067
AF18 J23
X_51 VTT10 MEMCLK_LO_L(3)
AD21 H0_MEMCLK_H4 H0_MEMCLK_H4 <10>
MEMCLK_LO_H(2)
AD20 H0_M EMCLK_L4 H0_MEMCLK_L4 <10>
(BOT)120RST
MEMCLK_LO_L(2)
VDD_12_A U2006E AF19 Y23 H0_MEMCLK_H1 H0_MEMCLK_H1 <9>
H0_M EMCLK_L2
VTT_SENSE MEMCLK_LO_H(1)
AA23 H0_M EMCLK_L1 H0_MEMCLK_L1 <9>
MEMCLK_LO_L(1)
K10 VC C _ DDR
R2083 42.2RST AF17 U25 H0_MEMCLK_H0 H0_MEMCLK_H0 <8>
H0_MEMCLK_H1
VLDT_1(1) R2082 42.2RST MEMZN MEMCLK_LO_H(0)
J11 AE16 U24 H0_M EMCLK_L0 H0_MEMCLK_L0 <8>
D VLDT_1(2) MEMZP MEMCLK_LO_L(0) R2072
D
H10
VLDT_1(3)
C2554 C2545 H8 H24 H0_MCKEUP H0_MCKEUP <11>
VLDT_1(4) MEMCKE_UP
K14 H 0 _VREF0_DDR F22 H25 H0_MC KELO H0_MCKELO <11>
(BOT)120RST
0.22u/16V/X7R 1000P/50V/X7R VLDT_1(5) MEMVREF0 MEMCKE_LO H0_M EMCLK_L1
J15 H 0 _VREF0_DDR AF22
VLDT_1(6) MEMVREF1
K16 V23
VLDT_1(7) RSVD_MA(15) H0_MEMCLK_H0
J16 M23
VLDT_1(8) RSVD_MA(14)
J9
VLDT_1(9) H0_MAA13 R2073
AE23 H0_MAA13 <11>
SOLDER SIDE MEMADD(13) H0_MAA12
E14 D11 J24 H0_MAA12 <11>
L1_CADIN_H(15) L1_CADOUT_H(15) MEMADD(12) H0_MAA11 (BOT)120RST
E13 C11 J25 H0_MAA11 <11>
L1_CADIN_L(15) L1_CADOUT_L(15) MEMADD(11) H0_MAA10 H0_M EMCLK_L0
C15 E9 V24 H0_MAA10 <11>
L1_CADIN_H(14) L1_CADOUT_H(14) MEMADD(10) H0_MAA9
D15 E10 K23 H0_MAA9 <11>
L1_CADIN_L(14) L1_CADOUT_L(14) MEMADD(9) H0_MAA8
E16 D9 L23 H0_MAA8 <11>
L1_CADIN_H(13) L1_CADOUT_H(13) MEMADD(8) H0_MAA7
E15 C9 K25 H0_MAA7 <11>
L1_CADIN_L(13) L1_CADOUT_L(13) MEMADD(7) H0_MAA6 H0_MEMCLK_H5
C17 E7 M25 H0_MAA6 <11>
L1_CADIN_H(12) L1_CADOUT_H(12) MEMADD(6) H0_MAA5
D17 E8 M24 H0_MAA5 <11>
L1_CADIN_L(12) L1_CADOUT_L(12) MEMADD(5) H0_MAA4 R985
C19 E5 N25 H0_MAA4 <11>
L1_CADIN_H(11) L1_CADOUT_H(11) MEMADD(4) H0_MAA3
D19 E6 N23 H0_MAA3 <11>
L1_CADIN_L(11) L1_CADOUT_L(11) MEMADD(3) H0_MAA2 (BOT)120RST
E20 D5 P23 H0_MAA2 <11>
L1_CADIN_H(10) L1_CADOUT_H(10) MEMADD(2) H0_MAA1 H0_M EMCLK_L5
E19 C5 T25 H0_MAA1 <11>
L1_CADIN_L(10) L1_CADOUT_L(10) MEMADD(1) H0_MAA0
C21 E3 V25 H0_MAA0 <11>
L1_CADIN_H(9) L1_CADOUT_H(9) MEMADD(0) H0_MEMCLK_H4
D21 E4
L1_CADIN_L(9) L1_CADOUT_L(9) H0_M D127 AG24 H0_M D63
E22 D3 <11> H0_MD[127..64] AJ24 H0_MD[63..0] <11>
L1_CADIN_H(8) L1_CADOUT_H(8) H0_M D126 AH25 MEMDATA(127) MEMDATA(63) H0_M D62 R986
E21 C3 AK25
L1_CADIN_L(8) L1_CADOUT_L(8) H0_M D125 AG26 MEMDATA(126) MEMDATA(62) H0_M D61
C14 A11 AK27
L1_CADIN_H(7) L1_CADOUT_H(7) H0_M D124 AH27 MEMDATA(125) MEMDATA(61) H0_M D60 (BOT)120RST
B14 A12 AJ27
L1_CADIN_L(7) L1_CADOUT_L(7) H0_M D123 AF23 MEMDATA(124) MEMDATA(60) H0_M D59 H0_M EMCLK_L4
A16 B10 AL24
L1_CADIN_H(6) L1_CADOUT_H(6) H0_M D122 AH24 MEMDATA(123) MEMDATA(59) H0_M D58
A15 C10 AK24
L1_CADIN_L(6) L1_CADOUT_L(6) H0_M D121 AF25 MEMDATA(122) MEMDATA(58) H0_M D57
C16 A9 AL26
L1_CADIN_H(5) L1_CADOUT_H(5) H0_M D120 AJ26 MEMDATA(121) MEMDATA(57) H0_M D56
B16 A10 AL27
L1_CADIN_L(5) L1_CADOUT_L(5) H0_M D119 AG27 MEMDATA(120) MEMDATA(56) H0_M D55
A18 B8 AJ28
L1_CADIN_H(4) L1_CADOUT_H(4) H0_M D118 AF26 MEMDATA(119) MEMDATA(55) H0_M D54
A17 C8 AK30
L1_CADIN_L(4) L1_CADOUT_L(4) H0_M D117 AF28 MEMDATA(118) MEMDATA(54) H0_M D53
A20 B6 AJ31
L1_CADIN_H(3) L1_CADOUT_H(3) H0_M D116 AE29 MEMDATA(117) MEMDATA(53) H0_M D52
A19 C6 AG29
L1_CADIN_L(3) L1_CADOUT_L(3) H0_M D115 AJ29 MEMDATA(116) MEMDATA(52) H0_M D51
C20 A5 AL28
L1_CADIN_H(2) L1_CADOUT_H(2) H0_M D114 AH29 MEMDATA(115) MEMDATA(51) H0_M D50
B20 A6 AK28
L1_CADIN_L(2) L1_CADOUT_L(2) H0_M D113 AE27 MEMDATA(114) MEMDATA(50) H0_M D49
A22 B4 AH31
L1_CADIN_H(1) L1_CADOUT_H(1) H0_M D112 AD26 MEMDATA(113) MEMDATA(49) H0_M D48
C A21 C4 AG30 C
L1_CADIN_L(1) L1_CADOUT_L(1) H0_M D111 AD27 MEMDATA(112) MEMDATA(48) H0_M D47