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Compal confidential
Schematics Document
2 2
Mobile Penryn uFCPGA with Intel
Cantiga_GM+ICH9-M core logic
2009-07-15
Blade 1.4 MV
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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Montevina Blade UMA LA4105P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, July 18, 2009 Sheet 1 of 45
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A B C D E
Compal confidential Montevina Consumer 14" UMA
CK505 72QFN
Clock Generator
Thermal Sensor Mobile Penryn
1 SLG8SP553V 1
EMC1402 uFCPGA-478 CPU P17
P06
P6, 7, 8
Fan conn P06 H_A#(3..35)
FSB
H_D#(0..63) 667/800/1066 MHz 1.05V
DDR3 800/1066MHz
LVDS Panel 1.5V DDR3 SO-DIMM X2
BANK 0, 1, 2, 3 P15, 16
Interface P19
Intel Cantiga MCH
Dual Channel
CRT FCBGA 1329
P18
Support V1.3 USB conn x1
P9,10, 11, 12, 13, 14 P30
2
HDMI P35 2
USB2.0 X12
DMI X4 C-Link BT Conn
P30
USB Camera
P19
PCI-E BUS*5 Azalia
Intel ICH9-M SATA Master-1
Finger print P30
SATA Slave
PCIE RTL8103EL Mini-Card Mini-Card mBGA-676
SATA Slave
CardReader (10/100M) TV-tuner or New Card P20,21,22,23
WLAN
JMB385 P27
Robson Audio CKT AMP & Audio Jack
P25 P26 P26 P26
Codec_IDT9271B7 TPA6017A2
P28 P29
5 in1 Slot RJ45/11 CONN LPC BUS MDC
P33 P25 P29
3 3
SATA HDD Connector
P24
ENE
KB926 SATA ODD Connector
P24
SPI
RTC CKT. LED P32
P21 P33
Int.KBD e-SATA Connector P30
ACCELEROMETER-1 Touch Pad CONN. USB Board Conn
Dock P33 P32 USB conn x2 P30
ST P24
USB2.0*1
ACCELEROMETER-2 RGB SPI ROM Audio board
BOSCH P24
RJ45 SST25VF080P31
CIR Conn P29
4
SPDIF 4
MIC*1
K/B backlight Conn LINE-OUT*1 Capsense switch Conn
P33
P33
Security Classification Compal Secret Data Compal Electronics, Inc.
2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P36 P34 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Montevina Blade UMA LA4105P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, July 18, 2009 Sheet 2 of 45
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A
Symbol Note :
Voltage Rails O MEANS ON X MEANS OFF USB assignment:
: means Digital Ground USB-0 Right side
USB-1 Right side
USB-2 Left side(with ESATA)
: means Analog Ground USB-3 Dock
power USB-4 Camera
plane USB-5 WLAN
+B +5VALW +1.8V +5VS @ : means just reserve , no build USB-6 Bluetooth
+3VS USB-7 Finger Printer
+3VALW +1.5VS
45@ : means need be mounted when 45 level assy or rework stage. USB-8 MiniCard(WWAN/TV)
+0.9V DEBUG@ : means just reserve for debug. USB-9 Express card
State +VCCP USB-10 X
+CPU_CORE
BATT @ : means need be mounted when 45 level assy or rework stage. USB-11 X
+2.5VS CONN@ : means ME part
+1.8VS
ESATA @ : means just reserve for ESATA PCIe assignment:
GS @ : means just reserve for G sensor PCIe-1 TV /WWAN/Robeson
S0 O O O O PCIe-2 X
FP @ : means just reserve for Finger Print PCIe-3 WLAN
S1 O O O O Multi @ : means just reserve for Multi Bay PCIe-4 GLAN (Realtek)
PCIe-5 Card reader
S3
NewC@ : means just reserve for New card PCIe-6 New Card
O O O X
DOCK@ : means just reserve for Docking
S5 S4/AC O O X X Main@ : means just reserve for Main stream
I2C / SMBUS ADDRESSING
S5 S4/ Battery only O X X X OPP@ : means just reserve for OPP
S5 S4/AC & Battery 2MiniC@ : means just reserve for 2nd Mini card slot DEVICE HEX ADDRESS
don't exist X X X X
1
PA @ : means just reserve for PA DDR SO-DIMM 0 A0 10100000 1
DDR SO-DIMM 1 A4 10100100
PR @ : means just reserve for PR CLOCK GENERATOR (EXT.) D2 11010010
SMBUS Control Table
SERIAL Thermal Cap sensor
43154432L01 UMA GM PA FF (V)
SOURCE INVERTER BATT EEPROM Sensor SODIMM CLK CHIP MINI CARD LCD board NEW CARD G sensor
43154432L02 UMA GM PR FF (V)
SMB_EC_CK1
43154432L03 UMA GL PR FF-
SMB_EC_DA1
KB926 X V V X X X X X V X X
43154432L04 UMA GM OPP (V)
SMB_EC_CK2
43154432L05 UMA GL OPP
KB926 X X X V X X X X X X X
SMB_EC_DA2
Cantiga GM45 B0(QR32)SA00001P930 (SI-1SI-2)
SMB_CK_CLK1
ICH9 X X X X V V V X X V V ICH9M A2 ES2 Base
SA00002AN10 (SI-1SI-2)
SMB_CK_DAT1
Cantiga GM45 B-2 QS QT62SA00002JT10 (PV-1)
LCD_CLK
Cantiga X X X X X X X V X X X
Cantiga GM45 B-3 QS QU36SA00002JT50 (PV-2)
LCD_DAT
ICH9M A-3 QS - BASE QT09SA00002JH00 (PV-1PV-2)
Cantiga GM45 B-3 QS SLB97SA00002JJE0 (MV-1MV-2)
ICH9M A-3 QS -BASE SLB8QSA00002JHB0 (MV-1MV-2)
43154432L01Main@/DEBUG@/DOCK@/NewC@/FP@/ESATA@/GS@/Multi@/2MiniC@/PA@
43154432L02Main@/DEBUG@/DOCK@/NewC@/FP@/ESATA@/GS@/PR@
PCBDA600007110 --->M/B
43154432L03Main@/DEBUG@/DOCK@/NewC@/FP@/PR@ DAZ03V00200 --->Main
43154432L04OPP@/DEBUG@/PR@ DAZ03V00101 --->OPP
43154432L05OPP@/DEBUG@/PR@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Montevina Blade UMA LA4105P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, July 18, 2009 Sheet 3 of 45
A
5 4 3 2 1
60mA
+3VAUX_BT
50mA
Finger printer
25mA +3VS_DVDD
1A ALC268
D
+V_BATTERY Dock con D
20mA
+3VALW_EC
35mA
MDC 1.5 10mA
SPI ROM
177mA
0.3A ICH9 1A
INVPWR_B+ LVDS CON New card
300mA
LAN 278mA
AC VIN ICH9
1.7A 5.89A 3.39A
+3VALW +3VS 1.5A
2A 550mA +LCDVDD LVDS CON
B++ JMB385
250mA
+3VS_CK505
657mA ICH_VCC1_5
C
1A C
0.3A 2.2A ICH9 Mini card (WLAN)
+1.5VS 1.56A
ICH9 1A
Mini card (TV tu/WWAN/Robeson)
0.58A 1.3A 35mA +VDDA
+5VALW +5VS IDT 9271B7
B+
7A 10mA
+5VAMP
1.8A
ODD
700mA
B
SATA B
3.7A
3.7 X 3=11.1V MCH
1.8A
DC BATT Muti Bay
8 A
1.9A 12.11A DDR2 800Mhz 4G x2
B+++ +1.8V 50mA
PC Camera(4.75V)
50mA
+0.9V
1.17A
ICH9
4.7A 1.26A
1.05V_B+ +VCCP MCH
2.3A
CPU
2A 10mA 34A/1.025V
CPU_B+ +VCC_CORE CPU
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power delevry
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C Montevina Blade UMA LA4105P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, July 18, 2009 Sheet 4 of 45
5 4 3 2 1
A
1 1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/28 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Montevina Blade UMA LA4105P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, July 18, 2009 Sheet 5 of 45
A
5 4 3 2 1
+3VS
ITP-XDP Connector XDP_DBRESET# 1
@R1
@ R1
2 1K_0402_5%
Change value in 5/02 +VCCP
PV follow check list ver:1.5 change to 51 ohm
04/29 MV1 R2~R8 change to 54.9 Ohm,
XDP_TDI R2 1 2 54.9_0402_1%
follow checklist 2.0
XDP_TMS R3 1 2 54.9_0402_1%
D D
XDP_TDO R4 1 2 54.9_0402_1%
XDP_TRST# R7 1 2 54.9_0402_1%
<9> H_A#[3..16]
JCPU1A
H_A#3 J4 H1 H_ADS# XDP_TCK R8 1 2 54.9_0402_1%
A[3]# ADS# H_ADS# <9>
ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
H_A#5 A[4]# BNR# H_BPRI# H_BNR# <9>
L4 G5 H_BPRI# <9>
H_A#6 A[5]# BPRI#
K5 This shall place near CPU
H_A#7 A[6]# H_DEFER#
M3 H5 H_DEFER# <9>
H_A#8 A[7]# DEFER# H_DRDY#
N2 A[8]# DRDY# F21 H_DRDY# <9>
H_A#9 J1 E1 H_DBSY#
H_A#10 A[9]# DBSY# H_DBSY# <9>
N3
H_A#11 A[10]# H_BR0#
P5 F1 H_BR0# <9>
H_A#12 A[11]# BR0#
P2
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# T1
H_A#14 A[13]# IERR# H_INIT#
P4 B3 H_INIT# <21>
H_A#15 A[14]# INIT#
P1
A[15]# Place TP with a
H_A#16 R1 H4 H_LOCK#
H_ADSTB#0 M1
A[16]# LOCK# H_LOCK# <9> GND 0.1" away
<9> H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# <9>
H_REQ#0 K3 F3 H_RS#0
<9> H_REQ#0 H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 <9>
<9> H_REQ#1 H2 F4 H_RS#1 <9>
H_REQ#2 REQ[1]# RS[1]# H_RS#2
<9> H_REQ#2 K2 G3 H_RS#2 <9>
H_REQ#3 REQ[2]# RS[2]# H_TRDY#
<9> H_REQ#3 J3 G2 H_TRDY# <9>
H_REQ#4 REQ[3]# TRDY#
<9> H_REQ#4 L1 REQ[4]#
G6 H_HIT#
<9> H_A#[17..35] H_A#17 HIT# H_HITM# H_HIT# <9>
C H_A#18
Y2
A[17]# HITM#
E4 H_HITM# <9>
03/18 PVDelete XDP connector C
U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]#
U4 AD1
H_A#22 A[21]# BPM[2]#
Y5 AC4
A[22]# BPM[3]#