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5 4 3 2 1
01_Block Diagram
02_Power Sequence
03_Clock Gen_ICS9LPRS427C
1015P2 1.0G
CLOCK GEN
04.PineView-M_1 (LVDS_DMI_CPU) ICS9LPRS427CGLFT
05.PineView-M_2 (DDR2_XDP_CRT)
D 06.PineView-M_3 (PWR&GND) 2010_0104 THERMAL CONTROL D
07.XDP
08.Tigerpoint_DMI_USB
09.Tigerpoint_SYS
10.Tigerpoint_PWR
11.DDR2 SODIMM LCD Board
12.DDR2-Termination
CPU SODIMM 200P
13.Onboard VGA LCD LVDS 2 TTL
14.LCD Conn_LID PineView-M
15.WIFI&SMART33SW
16.LAN_AR8132
CRT FCBGA437
17.WLAN
18.USIN&3G_CON
19.Bluetooth
C
20.HDD_CON C
21.
LINE OUT
22.
23.USB Port1
24.EC_ENE KB3310 Debug Conn Speaker
25.KB_TP
AZALIA CODEC
26.Fan_debug
SOUTH Realtek ALC269
EXT MIC
27.SPI_ROM EC BRIDGE
28.DUA_CON ENE KBC3310
29.PWR Jack INT MIC
30_Discharge TIGERPOINT
31.
SPI ROM Internal KB Touch Pad
32.Srew Hole&EMI
33.Power Flow
34.Power_Charger
B B
35.Vcore
36.Power _+1.8V&VTTDDR&+1.8VS
37.Power_VCCP USB Port x3
38.Power_+0.89VS MINICARD WLAN
39.Power_+1.5VS
40.Power Latch
SD/MMC Card Reader
41.Power System au6336 Atheros
42.power swich
Card LAN AR8132 RJ-45
Reader
Camera
MINIPCIE 3G CARD/
CONN WiMax
SATA HDD SATA
A
Conn A
BLUETOOTH
Title : Block Diagram
ASUSTek Computer INC. Engineer: Nicky_Cheng
Size Project Name Rev
Custom 1015P 1.1G
Date: Saturday, February 06, 2010 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
For Adapter Mode: (1) -> (2) -> (3) -> (4) -> (5) -> ...
For Battery Mode: (1) -> (2) - > (3) -> (4) -> (4a) -> (4b) -> (5) -> ... AC_BAT_SYS
2 5 +5VA +3VA 6 UP6111 +1.8V 16
3 UP7714 8 +5VSUS
A/D_DOCK_IN VCC
AC_BAT_SYS AC_BAT_SYS
Adapter 15 SUSC_ON
RT8205C +5VA 5 8 +5VSUS EN
MB39A132 +5VS 16
2 4b PS-ON
Latch EN 15 SUSB_ON AP4800 +5V_USB 16 16 +1.8V
D BAT D
4 AC_OK VCNTL +VTTDDR 17
Battery +5VSUS 8
8 +3VSUS 16 +5VS UP7711
+3VSUS 8 +3VS 16
7 VSUS_ON 15 SUSB_ON AP4800
Signal S0/S1 S3 S4/S5 Power EN 16 +1.8V
+1.5VS 17
VSUS_ON H H Adapter H VSB VSUS_PWRGD 9 APL5912
1 16 +5VS
Battery L 4 AC_BAT_SYS VCC
+1.5VS_PWRGD 18
BAT_IN
SUSB_ON H L L Main UP6111 +VCCP 20 15 SUSB_ON
AC_OK
16 +5VS EN
SUSC_ON H H L DUAL VCC
21
19 CPU_VRON EN
VCCP_PWRGD 16 +1.8V
+1.2VS 17
9 VSUS_PWRGD UP7704
+5VS
PM_RSMRST# 11 AC_BAT_SYS 16 VCC
6 +3VA SUSC_ON 10 EC_RSMRST# AND
15 UP6111 +0.89VS 22 16 +5VS
ENE KB3310 SUSB_ON 16 +5VS EN
7 VSUS_ON 15 VCC
CPU_VRON
55ms 19 9 VSUS_PWRGD 21 VCCP_PWRGD +0.89VS_PWRGD 23 16 +1.8V
9 VSUS_PWRGD EN
C
PM_PWROK 29 +1.8VS 22
C
VRM_PWRGD 27 28 EC_PWROK AND
4b PS-ON 21 VCCP_PWRGD AP9452
4a 12 PWR_SW# EC_PWROK 28
160ms
+3VS
AC_BAT_SYS 3
10 PCI_RST# 21 +1.8VS VID[6:0] 21
EC_RSMRST# 13 C_PCI_EC 26 +0.89VS +5VS 16
24 +VCORE VCC
+1.5VS
PM_PWRBTN#
+0.89VS_PWRGD 23
SUSB#
SUSC#
+1.8V PINEVIEW RT8152 EN
C_FSB_CPU 26
+VCCP CLK_EN# 25
C_FSB_NB 26
+1.2VS
11 PM_RSMRST# (internal) C_PCIE_NB 26 4.7ms VRM_PWRGD 27
14 14 C_96M_NB
PM_PWROK 26
29 PWROK C_LCD_LVDS
0 26
VRM_PWRGD 27 30 H_PWRGD
+VCC_RTC VRMPWRGD CPUPWRGOOD
B
+ PM_PWROK 29 31 S_PCIRST# B
BATT PWROK PLT_RST# MCLK_DDR EC
31 CPURST# 32
+5VSUS Tiger Point PCI_RST# 31 SODIMM
1ms 3G
+3VSUS PLT_RST# 31
+1.5VSUS WLAN
(internal)
C_PCIE_SB 26 8 +3VSUS 31 PLT_RST#
+5VS AR8132
C_SATA_SB 26 FSB CLK 166M
+3VS CPU ITP 26
C_48M_USB 26 25 CLK_EN#
+1.5VS VTT_PWRGD/PD# SPLTRST#
C_PCI_SB 26 BUFFER PINEVIEW RSTIN#
+VCCP REF CLK 14M
C_14M_SB 26 SB 1.8ms
26 PCIE CLK 100M XDP
USB CLK 48M CPU, SB
H_PWRGD CLK Stable WIFI, LAN 26
30 SB, CARD READER
26 3G/WIMAX SYS_RESET# TPT SYS_RESET#
RSTBTN
CLK Gen
26 PCI CLK 33M ICS9LPRS427C
SB EC DEBUG LVDS CLK 100M 26
A CPU RESET MAP A
26 SATA CLK 100M UMA CLK 96M 26
SB CPU Title : Power Sequence
ASUSTek Computer INC. Engineer: Nicky_Cheng
Size Project Name Rev
A3 1015P 1.1G
Date: Saturday, February 06, 2010 Sheet 2 of 42
5 4 3 2 1
5 4 3 2 C_SATA_SB 1 2
CC50 1 10PF/50V
/X
1:Disable C_SATA_SB# CC51 2 1 10PF/50V
/X
0:Enable PCIE2 CC52 2 1 10PF/50V
/X
PEREQ1:PCIEx0 & FS4 Function PCIE2# CC53 2 1 10PF/50V
CR1 1MOhm /X /X
1 2 PCIEx1 C_LCD_LVDS# CC54 2 1 10PF/50V
PEREQ2:PCIEx2 & /X
FIXED PLL (Asynchronous) C_LCD_LVDS CC55 2 1 10PF/50V
PCIEx3 & SATA H /X
CX1 14.31818Mhz PEREQ3:PCIEx4 & STP_PCI# EC7 2 1 10PF/50V
C_XIN 1 3 C_XOUT +3VSUS +3V_CLK /EMI/X
D 1
CL1
2
PCIEx5 & PCIEx6 L PCI/PCIEX PLL(synchronize) STP_CPU# EC10 2 1 10PF/50V
/EMI/X
D
1
1
CC12 C_PCI_SB_R CC36 2 1 10PF/50V
CC13 120Ohm/100Mhz /X
2
4
15PF/50V 15PF/50V N/A FS4 CC37 2 1 10PF/50V
+3VS +3V_CLK_VDDA /X
2
2
CL2 CL4 S_SMBDATA EC14 2 1 10PF/50V
1 2 1 2 /EMI/X
GND GND S_SMBCLK EC15 2 1 10PF/50V
1
1
1
1
1
1
1
1
1
1
1
1
120Ohm/100Mhz CC1 CC58 CC2 CC3 CC4 CC5 CC6 CC7 CC8 CC9
CC10 120Ohm/100Mhz CC48 /EMI/X
/X 10UF/6.3V N/A 0.1UF/16V C_DOC_REQ EC16 2 1 10PF/50V
c0603 0.1UF/16V 0.1UF/16V 0.1UF/16V
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
0.1UF/16V 0.1UF/16V 0.1UF/16V /EMI/X
C_FSLC CC39 2 1 10PF/50V
2
2
2
2
2
2
2
2
2
2
2
2
/X
CC58 for RF , C_FSLA CC40 2 1 10PF/50V
/X
close to pin 42 C_48M_R CC35 2 1 47PF/50V
GND N/A
C_LAN_25M_R CC11 2 1 10PF/50V
+3V_CLK_VDDA /X/RF
C_PCIE_LAN EC17 2 1 10PF/50V
+3V_CLK /EMI/X
C_PCIE_LAN# EC18 2 1 10PF/50V
+3V_CLK /EMI/X
CU1 /LAN_CLK C_PCI_DEBUG EC19 2 1 10PF/50V
1 56 C_LAN_25M_R 47Ohm 1 2 CR10 C_LAN_25M /EMI/X
VDD1 25MHz/FREERUN C_LAN_25M 16 C_LPC_EC
2 55 EC20 2 1 10PF/50V
GND1 PCI&PCIEX_STOP# STP_PCI# 9
PEREQ1# 3 54 /EMI/X
PEREQ1# CPU_STOP# STP_CPU# 9 C_14M_SB
C_REQ#_WLAN 4 53 C_FSLC 33Ohm 1 2 CR4 EC21 2 1 10PF/50V
PEREQ2# REF0/FSLC C_14M_SB 9
C 26 C_PCI_DEBUG
CR8 1 2 33Ohm/DEBUG FS4 5
6
FS4/PCICLK0 DOC_PEREQ3# 52
51
C_DOC_REQ 0Ohm 1 2 CR23 L_REQ#_LAN 16
/EMI/X
C
CR6 GND2 GND4
24 C_LPC_EC 1 2 33Ohm 7 VDDPCI X1 50 C_XIN /LAN_REQ
CR7 1 2 33Ohm C_PCI_SB_R 8 49 C_XOUT
8 C_PCI_SB CR12 33Ohm C_48M_R ITP_EN/PCICLK_F0 X2
28 C_48M_CARD_READER 1 2 9 SEL12_48#/12_48MHz VDDREF 48
CLK_EN 10 Vtt_PwrGd/PD# SDATA 47 S_SMBDATA
S_SMBDATA 9 For RF,EMI GND
11 46 S_SMBCLK +3V_CLK
C_FSLA VDD2 SCLK S_SMBCLK 9
CR3 1 2 33Ohm 12 45 10KOhm
8 C_48M_USB FSLA/USB_48MHz GND5 CR5
13 GND3 CPUT_LR0 44 C_FSB_CPU 4
14 43 C_FSLB 1 2
5 C_96M_NB DOTT_96MHzLR CPUC_LR0 C_FSB_CPU# 4
5 C_96M_NB# 15 DOTC_96MHzLR VDDCPU 42
C_FSLB 16 41 CR32 2 1 8.2KOhm
FSLB CPUT_LR1 C_FSB_NB 5
17 40 /X
5 C_LCD_LVDS PCIeT_LR0 CPUC_LR1 C_FSB_NB# 5
18 39 C_RESET# 1 2 CR21
5 C_LCD_LVDS# PCIeC_LR0 RESET# SYS_RESET# 7,9
19 38 /X