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5 4 3 2 1
Power
SYSTEM PAGE REF.
PAGE Content
UX31A2 SCHEMATIC Revision R2.0 VCORE+GFX CORE
Page 80
1 Block Diagram System
2 System Setting Page 81
3
4
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(2)_DDR3
BLOCK DIAGRAM
D
+1.05VS D
5 CPU(3)_CFG,RSVD,GND Page 82
6 CPU(4)_PWR
7 CPU(5)_XDP +1.5V & +0.75V
13 DDR3 TERMINATION Page 83
14 DDR3 ON-BOARD_A
15 DDR3 ON-BOARD_B +1.8VS
19 DDR3 CA_DQ VOLTAGE Page 84
20 PCH_SATA,IHDA,RTC,LPC CPU
21 PCH_PCIE,CLK,SMB,PEG DDR3 on-board DIMM +0.8VS
22 PCH_FDI,DMI,SYS PWR Ivy Bridge ULV
16bits * 8 , 2 channel Page 87
23 PCH_DP,LVDS,CRT Page 13~15, 19
24 PCH_PCI,NVRAM,USB Page 3~7 Charger
25 PCH_CPU,GPIO,MISC Page 88
26 PCH_POWER,GND
27 PCH_POWER,GND Load Switch
28 PCH_SPI ROM,OTH Page 91
29 ****
30 EC_IT8572_BGA
31 EC_KB_TP_TPM HDMI type D
C
32 RST_Reset Circuit Page 48 5 C
38 AUD SPK-R-CONN MiniCard
44 BUG_Debug 2
WLAN + BT
45 LCD Panel_CMOS_DMIC Page 53
46 CRT_D-Sub Debug Conn.
48 HDMI_type D Page 44 PCH 0 Chief River
50 FAN_Fan & Sensor Touchpad
51 MiniCard_SSD EC Panther-point Page 64
Page 31
53 MiniCard_Wlan & BT ITE IT8572 BGA
56 LED_Indicator Keyboard USB 3.0 Port
57 DSG_Discharge
Page 30 HM76
Page 31 Page 69
58 PW_PROTECT SPI ROM
60 DC_DC & BAT Conn. Page 28 Page 20~28
63 B TO B CONN 1
65 ME_Conn & Skew Hole
68 USB3.0 FRESCO FL1009
69 USB3.0_One Port
Daughter Board Conn
70 EC_PWR_SW 1
B 2 USB Port 3.0 (Chief River) B
MiniCard
SSD 0
3 CardReader Cardreader
Page 51
Page RTS5139-GR
56
80_PW_VCORE(RT8168B)
81_PW_SYSTEM(RT8239B) Azalia Codec Jack
2
82_PW_I/O_VCCP(TPS51317) eDP conn with CMOS & D-Mic &
83_PW_I/O_DDR(RT8207M) Touch Panel 4
Realtek ALC269
84_PW_+1.8VS(RT8015B) Page 45 Speaker L
87_PW_+0.8VS(RT8015B)
88_PW_CHARGER(BQ24725)
91. PWR_LOAD SWITCH
Speaker R
Page 38
Page 63 Daughter Board
A A
Discharge Circuit DC & BATT. Conn.
Page 57 Page 60
PWM Fan Reset Circuit Skew Holes
Page 50 Page 32 Page 65
Title : %ORFN 'LDJUDP
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 1 of 99
5 4 3 2 1
5 4 3 2 1
PCH_IBEX Int.& Ext EC GPIO Use As Signal Name
PCH_CPT GPIO Use As Signal Name Pull up / down Power EC IT8572 GPA0 O PWR_LED#
Design IP Source: N53S
GPIO 00 Native NC_TP EXT PU 1K +3VS
GPIO GPIO 01 GPI EXT_SMI# INT PU 20K, EXT PU 10K +3VS GPIO GPA1 O SM_BUS ADDRESS :
GPA2 O CHG_FULL_LED# 3&+ 0DVWHU
GPIO 02 Native NC_TP EXT PU 10K +3VS
GPA3 O 60%XV 'HYLFH 60%XV $GGUHVV
GPIO 03 GPI SATA_ODD_DA# EXT PU 10K +5VS
EXT PD 10K
GPA4 O
GPIO 04 GPI PCB_ID0
EXT PD 10K
GPA5 O FAN_PWM
GPIO 05 GPI PCB_ID1
INT PU 20K, EXT PU 10K
GPA6 -
GPIO 06 Native TMDS_HDMI_HPD +3VS
INT PU 20K, EXT PU 10K +3VS
GPA7 O KB_LED_PWM
D GPIO 07 GPI USB3_SMI# D
GPB0 O ME_AC_PRESENT
GPIO 08 Straping ICC_EN#
EXT PU 10K
GPB1 O
GPIO 09 Native EXT_SCI# +3VSUS
EXT PU 10K
GPB2 O +3VA_ON
GPIO 10 Native OC#6 +3VSUS
EXT PU 10K
GPB3 IO SMB0_CLK
GPIO 11 GPI EXT_SCI# +3VSUS
GPB4 IO SMB0_DAT (& 0DVWHU 60% 60%XV $GGUHVV
GPIO 12 GPO
GPB5 O A20GATE 60%XV 'HYLFH
GPIO 13 Native HDA_DOCK_RST#
GPB6 O RCIN# ',00 7(03 $K
GPIO 14 Native OC#7 EXT PU 10K +3VSUS
INT PD 20K, EXT PU 1K
GPB7 O PM_RSMRST# &38 7KHUPDO 6HQVRU K
GPIO 15 GPO BT_LED +3VSUS
EXT PU 10K
GPC0
GPIO 16 Native SATA_DET#4 +3VS
INT PU 20K, EXT PD 10K
GPC1 IO SMB1_CLK
GPIO 17 GPI
EXT PU 10K
GPC2 IO SMB1_DAT
GPIO 18 Native CLK_REQ1# +3VS
INT PU 20K, EXT PU 10K +3VS
GPC3 O PM_PWRBTN#
GPIO 19 Native SATA1GP
EXT PU 10K
GPC4 I AC_IN_OC#
GPIO 20 Native CLK_REQ2# +3VS
EXT PU 10K
GPC5
GPIO 21 Native SATA0GP +3VS
EXT PU 10K
GPC6 I BAT1_IN_OC#
GPIO 22 GPO WLAN_LED +3VS
INT PU 20K
GPC7
GPIO 23 Native LPC_DRQ#1
EXT PU 10K
GPD0 I PWRLIMIT#_EC
GPIO 24 GPO +3VSUS
EXT PU 10K
GPD1 O CAP_LED#
GPIO 25 Native CLKREQ_USB3# +3VSUS
EXT PU 10K
GPD2 I BUF_PLT_RST# PCI Express USB Port
C
GPIO 26 Native CLK_REQ4# +3VSUS C
GPD3 O EXT_SCI# PCIE 1 USB 0 USB 3.0 Port
GPIO 27 Native DSW_WAKE# INT PU 20K
GPD4 O EXT_SMI# PCIE 2 Minicard WLAN USB 1 USB Port 1
GPIO 28 Straping WLAN_ON# INT PU 20K +3VSUS
GPD5 O OP_SD# PCIE 3 USB 2 Touch Panel
GPIO 29 Native SLP_LAN# EXT PU 10K +3VSUS
GPD6 I FAN0_TACH PCIE 4 USB 3.0 USB 3 Card Reader
GPIO 30 Native ME_SusPwrDnAck EXT PU 10K +3VSUS
GPD7 - PCIE 5 USB 4 CMOS Camera
GPIO 31 Native ME_AC_PRESENT_PCH INT PD 20K,EXT PU 10K +VCCPDSW
GPE0 O SUSC_EC# PCIE 6 USB 5 Bluetooth
GPIO 32 Native PM_CLKRUN# EXT PU 10K +3VS
GPE1 PCIE 7 USB 6
GPIO 33 Native HDA_DOCK_EN#
GPE2 O 1.5V_ON PCIE 8 USB 7
GPIO 34 Native STP_PCI# EXT PU 10K +3VS
GPE3 O BIOS_WP# USB 8
GPIO 35 GPO GPIO35_PCH
GPE4 I PWR_SW# SATA Port USB 9
GPIO 36 Native DMI_OVRVLTG INT PD 20K, EXT PU 200K+3VS
GPE5 I PM_SUSC# SATA 0 SATA SSD USB 10
GPIO 37 Native FDI_OVRVLTG INT PD 20K, EXT PD 100K
GPE6 I LID_SW_EC# SATA1 USB 11
GPIO 38 Native MFG_MODE EXT PU 10K +3VS
GPE7 SATA2 USB 12
GPIO 39 Native GFX_CRB_DET EXT PU 10K +3VS
GPF0 O PM_SYSPWROK SATA4 USB 13
GPIO 40 Native OC#1 EXT PU 10K +3VSUS
EXT PU 10K
GPF1 O 3VSUS_ON
GPIO 41 Native DIMM_SEL0 +3VSUS
EXT PU 10K
GPF2 - Device Identification
GPIO 42 Native DIMM_SEL1 +3VSUS
GPF3 O USB_CHARGE_ON# CPU Thermal Senser
GPIO 43 Native DIMM_SEL2 EXT PU 10K +3VSUS
GPF4 IO TP_CLK 1st 06G023123010 NCT7717U
GPIO 44 Native CLKREQ_GLAN# INT PU 20K, EXT PU 10K +3VSUS
B GPF5 IO TP_DAT 2nd B
GPIO 45 Native CLK_REQ6# EXT PU 10K +3VSUS
INT PU 20K, EXT PU 10K +3VSUS
GPF6 I PECI_EC
GPIO 46 Native CLK_REQ7# Memory Thermal Senser
EXT PU 1K
GPF7 O PCH_SPI_OV
GPIO 47 Native CLK_PEGA_REQ# +3VSUS 1st 06G023048020 G781-1
EXT PU 10K
GPG0 I ME_SusPwrDnAck
GPIO 48 GPIO TEST_SET_UP +3VS 2nd
EXT PU 10K
GPG1 I PM_SUSB#
GPIO 49 GPI SATA_DET#5 +3VS
EXT PD 10K
GPG2
GPIO 50 GPO GPU_RST#
INT PU 20K, EXT PU 10K
GPG6 -
GPIO 51 Straping PCI_GNT1# +3VS
EXT PU 10K
GPH0 IO PM_CLKRUN#
GPIO 52 Native PCI_REQ#2 +3VS
INT PU 20K
GPH1 O THRO_CPU#
GPIO 53 Native DGPU_PWM_SELECT#
EXT PD 1K
GPH2 O LCD_BACKOFF#
GPIO 54 GPO DGPU_PWR_EN#
INT PU 20K, EXT PD 1K
GPH3 O SUSB_EC#
GPIO 55 Straping STP_A16OVR
EXT PU 10K
GPH4 O USB_CHARGE_VBUS_EC
GPIO 56 Native CLK_PEGB_REQ# +3VSUS
EXT PD 100K
GPH5
GPIO 57 GPO BT_ON
EXT PU 2.2K
GPH6 I 5VSUS_PWRGD
GPIO 58 Native SML1_CLK +3VSUS
EXT PU 10K
GPI0 I Light_Sensor_AD
GPIO 59 Native OC#0 +3VSUS
EXT PU 2.2K
GPI1 I SUS_PWRGD
GPIO 60 GPO DRAMRST_PCH +3VSUS
GPI2 I ALL_SYSTEM_PWRGD
GPIO 61 Native PM_SUS_STAT#
GPI3 I CORE_PWRGD
GPIO 62 Native SUS_CLK#
GPI4 -
GPIO 63 Native SLP_S5#
A
INT PD 20K
GPI5 - A
GPIO[66:64] Native CLK_OUT[2:0]
INT PD 20K
GPI6 -
GPIO 67 Native
INT PU 20K
GPI7 I Adaptor_Sense
GPIO 68 GPO NC_TP
INT PU 20K, EXT PD 1K
GPJ0 O
GPIO 69 GPI NC_TP
INT PU 20K, EXT PU 1K
GPJ1 O PM_PWROK
GPIO[71:70] Native NC_TP +3VS
GPJ2 O
GPIO 72 Native PM_BATLOW# INT PU 20K, EXT PU 10K +3VSUS Title : 6\VWHP 6HWWLQJ
EXT PU 10K
GPJ3 O
GPIO 73 Native CLK_REQ0# +3VSUS ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
EXT PU 10K
GPJ4 O 5VSUS_PWRON Size Project Name
GPIO 74 Native PCHHOT# +3VSUS Rev
EXT PU 2.2K
GPJ5 O DRAMRST_EC C 8;$ R2.0
GPIO 75 Native SML1_DATA +3VSUS Date: Tuesday, March 27, 2012 Sheet 2 of 99
5 4 3 2 1
5 4 3 2 1
Main Board
FDI disable: (For discrete graphic) +VTT_CPU
U0301A
1. NC: G3 PEG_IRCOMP_R R0301 1 2 24.9Ohm 1%
PEG_ICOMPI
G1
PEG_ICOMPO
FDI_TX#[0:7],FDI_TX[0:7],VCC_AXGSENSE,VSS_AXGSENSE 22 DMI_TXN0 M2
DMI_RX#[0] PEG_RCOMPO
G4
22 DMI_TXN1 P6
D DMI_RX#[1] D
22 DMI_TXN2 P1
DMI_RX#[2]
2. Pull-down to GND via 1K