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1 2 3 4 5 6 7 8
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PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
BL6 Block Diagram
LAYER 3 : IN1
LAYER 4 : IN2
A LAYER 5 : VCC USB-0 A
EXT_LVDS
LAYER 6 : BOT VGA LCD/CCD Con. P23
EXT_CRT
SWITCH CIRCUIT
P15,16,17,18,19,
EXT_HDMI
20,21,22
CRT Con.
DDRIII-SODIMM1 P23
DDRIII-SODIMM2 Arrandale (UMA+VGA) INT_LVDS
P12,13 PCI-E x16
DDR SYSTEM MEMORY
PCI-E
INT_CRT
Dual Channel DDR III
HDMI Con.
800/1066/1333 MHZ
Graphics Interfaces
HDMI P14
PCI-E
INT_HDMI
rPGA 989 Level Shift
P14
P3, 4, 5, 6
SATA - HDD
P26 FDI
DMI
DMI(x4)
SATA - ODD
P26 SATA 0 PCIE-3
B B
FDI 3G
DMI USB-10
SATA 1 CK505
P24
SATA P2
PCI-Express
ESATA SATA 5 PCI-E
Re-driver P25
POWER SYSTEM
USB-4 ISL88731 P.34
SIM Card PCIE-5
USB-13 ESATA Con. WLAN ISL82882C P.39
P24
P25 Ibex Peak-M USB-5 RT8210B P.35
P24
USB-2 UPI6116A P.37
Bluetooth Con. USB 2.0 (Port0~13)
P31 USB UP6163 P.36
PCH UPI6111A P.38
USB-8 MAX8792A P.41
USB Con. P7, 8, 9, 10, 11 RT8152C P.42
P31
PCIE-6
USB-9 RTC Giga/10/100 Lan
USB Con. P28
P31 +VCC_CORE
C C
BATTERY
Cardreader USB-3 P7 +1.5V
+1.5VSUS
P29
Azalia IHDA
NVRAM NVRAM Con +VTT
LPC
+1.05V
P33
Cardreader Con.
3 IN 1 P29 LPC +1.8V
+1.5V_S5
Audio Codec EC +3VPCU
+3V_S5
P27 P30 +3V
+5VPCU
Port-B
Port-A
+5V_S5
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5V
D
MIC JACK HP SPK Con. Con. Con. +SMDDR_VTERM D
MDC Con.
P27 P27 P27 P27 P3 P31 P23 P30 P31 P31 +SMDDR_VREF
+VGPU_CORE
+VAXG
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
A1A
Block Diagram
Date: Wednesday, April 07, 2010 Sheet 1 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1
CLOCK Gen
+3V
L20
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PBY160808T-601Y-N_1A
250mA(20mils)
+3V_CK505_VDD
+VDDIO_CLK
80mA(20mils)
L43 PBY160808T-601Y-N_1A
+1.05V
D C841 C844 C826 C831 D
C798 C480 C485
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X U29 *10U/6.3V_8X 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X
R302
+1.5V *0_6 5 VDD_27
29 15
150mA(20mils) VDD_REF VDD_SRC_I/O
VDD_CPU_I/O 18 C3A
L39 R632 2.2_6 +1.5V_CK505_VDD CLK_BUF_DREFCLKP_R RP15
1 VDD_DOT_1.5 DOT_96 3 2 1 *SHORT_4P2R CLK_BUF_DREFCLKP {8}
17 4 CLK_BUF_DREFCLKN_R 4 3 JTAG need Option2 for
VDD_SRC_1.5 DOT_96# CLK_BUF_DREFCLKN {8}
PBY160808T-601Y-N_1A 24 Park,Madison Engineer sample.
VDD_CPU_1.5 CLK_VGA_27M_R R326 *EV@33_4
6
C827 C483 C797 C829 XTAL_OUT 27 XTAL_OUT
27M
27M_SS 7 CLK_VGA_27M#_R R329 EV@33_4
27M_CLK {16} B2A
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X XTAL_IN 28 R722 *EV@33_4
XTAL_IN RP19 JTAG_TCK {16}
10 CLK_BUF_DREFSSCLKP_R 2 1 *SHORT_4P2R
SRC_1/SATA CLK_BUF_DREFSSCLKP {8}
11 CLK_BUF_DREFSSCLKN_R 4 3
SRC_1#/SATA# CLK_BUF_DREFSSCLKN {8}
CPU_SEL 30 13 CLK_BUF_PCIE_3GPLLP_R RP20 2 1 *SHORT_4P2R
REF_0/CPU_SEL SRC_2 CLK_BUF_PCIE_3GPLLP {8}
14 CLK_BUF_PCIE_3GPLLN_R 4 3
SRC_2# CLK_BUF_PCIE_3GPLLN {8}
CGDAT_SMB 31 SDA
C3A
CGCLK_SMB 32 16 ICS_CPU_STOP# R332 10K_4 +3V
SCL *CPU_STOP#
C CLK_PCH_14M R289 33_4 2 20 CLK_BUF_BCLK1_P_R TP81 C
{8} CLK_PCH_14M
8
VSS_DOT
VSS_27
CPU_1
CPU_1# 19 CLK_BUF_BCLK1_N_R TP82 C3A
9 23 CLK_BUF_BCLKP_R RP16 4 3 *SHORT_4P2R
VSS_SATA CPU_0 CLK_BUF_BCLKP {8}
12 22 CLK_BUF_BCLKN_R 2 1
VSS_SRC CPU_0# CLK_BUF_BCLKN {8}
C479 21 VSS_CPU VR_PWRGD_CLKEN
26 VSS_REF CKPW RGD/PD# 25
*10P/50V_4C
33 GND
SLG8LV595VTR
CLK POWERGOOD
CLK CRYSTAL CLK CPU_SEL CLK I2C Change to +3VPCU
(follow CRB)
B B
+3V
+3V
+3VPCU R291 1K/F_4 VR_PWRGD_CLKEN
R288
3
*10K_4
R675 R292
2 Q25 100K/F_4
Y5 {39} VR_PWRGD_CK505#
2
CPU_SEL 10K_4
XTAL_IN XTAL_OUT 2N7002_200MA
2 1
{8,24,28,33} SDATA 3 1 CGDAT_SMB {12,13,24}
14.318MHZ_30 R626
1
C790 C791
10K_4 Q59
33P/50V_4N 33P/50V_4N 2N7002_200MA R679
+3V 10K_4
2
A A
0 1 3 1
{8,24,28,33} SCLK CGCLK_SMB {12,13,24}
Quanta Computer Inc.
CPU =133MHz CPU=100MHz Q60
2N7002_200MA PROJECT : BL6
CPU_SEL (default) Size Document Number Rev
A1A
CLOCK GENERATOR
Date: Thursday, April 08, 2010 Sheet 2 of 45
5 4 3 2 1
1 2 3 4 5 6 7 8
{9}
{9}
{9}
{9}
{9}
{9}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
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DMI_TXP0
DMI_TXP1
A24
C23
B22
A21
B24
D23
U15A
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
B26 PEG_COMP
A26
B27
A25 PEG_RBIAS
K35
J34
J33
G35
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
R370
R369
49.9/F_4
750/F_4
PEG_RXN[0..15] {15}
R57
R56
20/F_4
20/F_4
H_COMP3 AT23
H_COMP2 AT24
U15B
COMP3 BCLK
A16
B16
CLK_CPU_BCLKP {10}
CLK_CPU_BCLKN {10}
DMI_RX[1] PEG_RX#[3] PEG_RXN11 R20 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
{9} DMI_TXP2 B23 G32 MISC
DMI_RX[2] PEG_RX#[4] PEG_RXN10 R76 49.9/F_4 H_COMP0 AT26 COMP1
{9} DMI_TXP3 A22 F34 AR30 CLK_CPU_BCLK_ITP {33}
DMI_RX[3] PEG_RX#[5] PEG_RXN9 COMP0 BCLK_ITP
F31 AH24 AT30 CLK_CPU_BCLK_ITP# {33}
PEG_RX#[6] PEG_RXN8 TP3 SKTOCC# BCLK_ITP#
D24 D35
A
{9}
{9}
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8]
E33
C33
PEG_RXN7
PEG_RXN6 H_CATERR# AK14 CLOCKS PEG_CLK#
PEG_CLK
E16
D16 R374 EV@0_4
CLK_PCIE_3GPLLP {8}
CLK_PCIE_3GPLLN {8} A
{9} DMI_RXN2 DMI_TX#[2]