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Evaluating Tributary Jitter
from the SDH Network
Application Note 1258
2
Introduction The network architecture The impact of this pointer activity
will be to increase the jitter on the
The innovation of using pointers In the long term, the synchronous asynchronous tributary signal
to track the position of the Virtual SDH network may develop to passing out of the SDH island.
Container (VC) within SDH the state where asynchronous This will produce an accumulation
signals has produced many networks will only exist at the of jitter on the tributary signal as
benefits that will minimize the periphery of the synchronous it traverses the multiple islands in
cost and complexity of network network, and all transport through its transmission path.
equipment. For example, SDH the network is on SDH. However,
removes the need for back-to-back this is an ideal model that may not For the long term network devel-
multiplexers/demultiplexers in be prevalent until well into the opment scenario, (when end-to-
cross-connects and add/drop next century. At present, end SDH transmission is preva-
multiplexers by enabling any and during this intervening period lent), the jitter performance of the
customer payload to be located as the SDH network evolves, terminating PTE will be the main
and tracked without the need to the hybrid synchronous/asynchro- contributor to jitter on the
dismantle the multiple layers of nous network will predominate. demultiplexed tributary signal.
hierarchy within the structure. Thus a signal may experience However, until reaching this stage
However, due to the large inherent several synchronous/asynchro- of development, the network
phase step associated with a nous conversions during its will become filled with SDH
pointer movement (ie, 24UI per passage through the network. islands. A tributary signal's
AU-4 pointer movement), com- transmission path may involve
pared to that produced by pulse As SDH equipment is installed in traversing multiple SDH islands,
stuffing techniques used in asyn- the network, SDH islands will and the problem of jitter accumu-
chronous multiplexing, the SDH appear. Initially, these SDH lation will exist.
network has the potential of islands are likely to be point-to-
creating large jitter transients in point networks. As the SDH
the demultiplexed tributary portions of the network increase,
outputs. The need to characterize these islands will merge to form
the jitter performance of larger more sophisticated islands
demultiplexers is being consid- consisting of not only Path
ered by Standards Committees Terminating Equipment (PTE) but
such as ITU Study Group 13 at the also Add/Drop Multiplexers
time of writing (April 1994). (ADM), Digital Cross-connect
Systems (DCS), etc. As the
tributary signal traverses these
larger SDH islands as part of an
VC, phase and/or frequency
differences between SDH network
elements will induce pointer
activity in the SDH signal.
3
Analysis of the network In order to achieve this with the Also, as a further result of the
32 island model, the maximum experimentation, it has become
In order to specify the jitter limits jitter from a PTE is limited to clear that test methodology
on a PTE, analysis has been 1.3UI. Table 1 shows how this guidelines need to be produced in
performed to predict the expected budget has been allocated be- order to achieve accurate and
jitter accumulation that might tween mapping jitter, single repeatable results.
occur as a tributary signal passes pointer movements and degraded
through multiple SDH islands. The synchronization conditions. Liasion between ANSI and ITU has
objective of this study is to prompted ITU to also review the
produce a model that represents a pointer test sequences. Study
practical worst-case example of a Characterization of jitter Group 13 is, at the time of printing,
network that may be used to performance considering how the sequence in
transfer a PDH signal. {A similar G.783 should be expanded/modi-
study carried out by Bellcore for G.783 presently includes pointer fied.
the SONET world produced a 32 test sequences [3]. These se-
SONET island model, each of quences are aimed to emulate
which contains 10 pointer expected network degradations.
processing nodes [1], (Figure 1).}
During 1992, Telecom Canada
To ensure that the jitter accumula- carried out testing to verify the
tion does not cause service theoretically predicted responses
degradation at the output of the to various types of pointer activity
last SDH island, the total on PTEs [4]. As well as verifying
network jitter must not exceed the theoretically predicted re-
that specified for the tributary sponses to variations in pulse
rate [2]. Therefore, each PTE must stuffing ratios (used to map the
not only meet this specification tributary signal into the VC), and
but will have to exhibit a far to single pointer movements,
better performance if the jitter at Telecom Canada also showed that
the output of the last SDH island the defined tests did not fully
is to meet this requirement. represent the pointer sequences
that a real network might
Once the size and structure of the produce.
network model has been agreed,
the allocation of the amount of With the results from the practical
jitter which can be generated experimentation and the specifica-
by the various jitter-producing tion of jitter performance in terms
effects will be performed to of three network conditions, (an
ensure that the total network jitter example of which is shown in
does not exceed the specified Table 1), ANSI have reviewed the
limit on a tributary signal. As an pointer movement sequences [5].
example of the order of magnitude The aim was to produce tests that
that is likely to be settled upon, more closely emulated real
ANSI tackled a similar problem network conditions and also allow
for the DS3 interface which measurement of the specified
requires that the peak-to-peak jitter thresholds.
jitter shall not exceed 5UI, (in the
10Hz to 400 kHz range).
4
Figure 1: Hybrid network model produced for the transfer of DS3 through a SONET Network. ITU Study Group 13 is investi-
gating the generation of a similar model for each of the CEPT rates.
Island 1
Pointer Processing
A
DS3 M D A
OC-N OC-N
Jitter
Free Ptr
Adj Jitter
Network
Output Jitter
Island 2 Island 32
SONET Jitter
M D SONET
Island M D DS3
Island A
A- Asynchronous Network M - Mapper
D - Desynchronizer
Table 1: ANSI jitter specification for a DS3 signal demultiplexed from a single SDH/SONET island.
Jitter category Jitter allocation
(UI p-p)
Mapping jitter A0 0.40
(Note 1)
Single isolated A1 A0 + 0.30 Notes
pointer
1. Jitter from a SONET island in which
Degraded there is no pointer activity.
synchronization A2 1.3 2. The DS3 will be jitter free as it enters
conditions the SONET island.
5
Figure 2(a) : Single isolated pointer test.
Single
Pointer
Movement
Measurement 1 Measurement 2 Measurement 3
Initialization Cooling Down
(30 s) (30 s) (30 s)
Figure 2(b): Burst-of-3 test.
500