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1 1
2
Compal Confidential 2
Gx00/Gx00 DIS M/B Schematics Document
Intel Ivy Bridge Processor with DDRIII + Panther Point PCH
AMD Mars XT / SUN Pro
2013-02-27
3 3
LA-9631P
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
www.laptopfix.vn
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-9631P
Date: Wednesday, February 27, 2013 Sheet 1 of 60
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Compal confidential
Project Name : VIWGP (14") / VIWGR (15")
1
Chief River 1
AMD MARS XT M2 128 bits PEG 8x Intel Memory Bus 204pin DDRIII-SO-DIMM X2
/ SUN PRO M2 64 bits Gen2 / Gen3 Processor Dual Channel BANK 0, 1, 2 Page 12, 13
VRAM 512MB/1GB/2GB
DDR31600MHz
MARS XT : DDR3 x 8
SUN PRO : DDR3 x 4 Page 23~32
Ivy Bridge
DDR31333MHz
DDR31066MHz
rPGA989
37.5mm x 37.5mm
Page 5~11
FDI *8 DMI2 *4
2.7GT/s 5GT/s
2 LVDS Conn. Left USB3.0 x2 Right USB2.0 Int. Camera
2
Page 33
USB30 x2 USB30 Port 0,1 USB20 Port 9 USB20 Port 3
Page 45 Page 45 Page 33
HDMI Conn. USB20 x6 Touch Screen Card Reader
Page 35
Realtek RTS5170
USB20 Port 2
Page 45 USB20 Port 11 page 28
CRT Conn. Intel
Page 34
PCH
LAN Panther Point SATA Gen3 HDD Conn.
PCIe Port 0 PCIe x1
RJ45 Conn. Atheros SATA Port 0
Page 38 Page 40
AR8162/QCA8172(10/100)
Page 37
FCBGA 989Balls
25mm x 25mm SATA ODD Conn.
SATA Port 2
Page 40
3 PCIe Mini Card PCIe x1
3
WLAN Audio Codec
PCIe Port 1
Page 36 AZALIA CONEXANT
CX20757
Page 41
Page 14~22
Int. MIC Conn. Int. Speaker Conn. Audio Combo Jacks
Sub-borad Page 41 Page 41
HP & MIC Page 41
SPI ROM EC
15" 2MB + 4MB ENE KB9012
14" Page 14 Page 42
Power/B
(LID)
LS9631
4 4
USB/B ODD/B Thermal Sensor Touch Pad Int. KBD
Page 39 Page 43 Page 43
LS9632 LS9634
IO/B Switch/B
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title
(Card Reader) (LED, LID) MB Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
www.laptopfix.vn
LS9633 LS9635 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-9631P
Date: Wednesday, February 27, 2013 Sheet 2 of 60
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Voltage Rails BOARD ID Table
SIGNAL
Board ID PCB Revision STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+5VS
0 0.1 Full ON HIGH HIGH HIGH HIGH ON ON ON ON
+3VS
1
power 2 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
plane +1.5VS
+V1.05S_VCCP
3 S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
1 1
+5VALW +1.5V +VCC_CORE
4
5 S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+B +VGA_CORE
+3VALW +VCC_GFXCORE_AXG
6 S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.8VS
7
State +0.75VS
+1.05VS
Vcc 3.3V
Board ID / SKU ID Table for AD channel
R694 100K +/- 1%
Board ID R695 VAD_BID min V AD_BID typ VAD_BID max EC AD
0 0 0 V 0 V 0 V 0x00 - 0x0B MP
1 12K +/- 1% 0.347V 0.354V 0.360V 0x0C - 0x1C PVT
2 15K +/- 1% 0.423V 0.430V 0.438V 0x1D - 0x26 DVT
S0
O O O O 3 20K +/- 1% 0.541V 0.550V 0.559V 0x27 - 0x30 EVT
S3
O O O X
2 2
S5 S4/AC
O O X X USB Port Table BOM Structure Table
S5 S4/ Battery only 3 External Item BOM Structure
O X X X USB 2.0 Port USB Port VIWGP (14") 14@
S5 S4/AC & Battery 0 USB Port (Left Side)USB3.0 VIWGR (15") 15@
don't exist X X X X UHCI0
1 USB Port (Left Side)USB3.0 HDMI Logo 45@
2 Touch Screen LAN 10/100 8162@
UHCI1
3 Camera LAN 10/100 8172@
EHCI1
4 LAN Switch mode SWR@
UHCI2
5 LAN LDO Mode LDO@
EC SM Bus1 address EC SM Bus2 address 6 LAN Gas tube GAS@
UHCI3
7 Camera CMOS@
Device Address Device Address
8 HDMI HDMI@
Smart Battery 0001 011x Thermal Sensor 0100 1100 UHCI4
9 USB Port (Right Side USB-BD) PCH is HM76 HM76@
10 Mini Card(WLAN) PCH is HM70 HM70@
PCH SM Bus address AMD-GPU SM Bus address EHCI2 UHCI5
3 11 Card Reader PCH is NM70 NM70@ 3
12 VGA is Mars XT Mars@
Device Address Device Address UHCI6
DDR_JDIMM1 1010 000x A0h Internal thermal sensor 0100 0001 41h
13 VGA is Sun Pro Sun@
DDR_JDIMM2 1010 010x A4h
For VGA PX@
For VRAM and Strap X76@
For UMA Strap UMA@
Microphone MIC@
Touch Screen TS@
SMBUS Control Table Connector ME@
Board ID for EVT EVT@
Board ID for DVT DVT@
Thermal
SOURCE VGA BATT KB9012 SODIMM WLAN Sensor PCH Board ID for PVT PVT@
For USB2.0 (All PCH) USB2@
SMB_EC_CK1
SMB_EC_DA1
KB9012 X V
+3VALW
X X X X X For USB3.0 (HM76,HM70) USB3@
+3VALW
For share ROM SROM@
SMB_EC_CK2
SMB_EC_DA2
KB9012 V
+3VGS
X X X X +3VS
V V
+3VALW
For non-share ROM NOSROM@
+3VS
PCH_SMBCLK
X X X V V X X
4 4
PCH
PCH_SMBDATA +3VALW +3VS +3VS
PCH_SML0CLK
PCH
PCH_SML0DATA +3VALW
X X X X X X X
Security Classification Compal Secret Data Compal Electronics, Inc.
SML1CLK
SML1DATA
PCH
+3VALW
V
+3VGS
X V
+3VS
X X +3VS
V X Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title
Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
www.laptopfix.vn
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-9631P
Date: Wednesday, February 27, 2013 Sheet 3 of 60
A B C D E
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Power-Up/Down Sequence
Mars XT VRAM STRAP "Mars" has the following requirements with regards to power-supply
sequencing to avoid damaging the ASIC:
X76@ X76@ All the ASIC supplies must reach their respective nominal voltages within 20 ms
Vendor R_pu R_pd of the start of the ramp-up sequence, though a shorter ramp-up duration is
UV5, UV6, UV7, UV8 ID PS_3[ 3 ] PS_3[ 2 ] PS_3[ 1 ]
UV9, UV10, UV11, UV12 RV20 RV27 preferred. The maximum slew rate on all rails is 50 mV/