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5 4 3 2 1
Z08 SYSTEM BLOCK DIAGRAM 01
DDRII-SODIMM1 CPU_CLK
+1.8VSUS HOST 200MHz
D
+SMDDR_VREF PG 7,8 DDR II 667 MHZ AMD S1g1 CLOCK GENERATOR D
HTREF_CLK
ICS9LPRS476AKLFT PCIE 100MHz
NBGFX_CLK
DDRII-SODIMM2
Caspian Processor SLG8SP628VTR
+1.8VSUS NBGPP_CLK
USB 48MHz
RTM880N-795 VCC_CORE
+SMDDR_VREF PG 7,8 +1.2V (638 S1g1 socket) REF 14MHz CPU CORE
+2.5V SBLINK_CLK PG 3
+1.8VSUS +3V
CPU THERMAL VCC_CORE PG 4,5,6 +NB_CORE
+SMDDR_VTERM NB CORE
SENSOR (1.0~1.1V)
+3V PG 8 HT_LINK(1.0)
+2.5V
800 MHZ +2.5V
Side port
PG 9 Giga LAN
PCIE 0 +1.5V
NB BCM5784M RJ45 +1.5V
LVDS Panel(LED) +3V_S5 PG 21 PG 21
RS780MN
+3V +1.2V
VIN PG 18 LVDS(1ch) +1.2V
21mm X 21mm, 528pin BGA +1.2V_S5
C
PCIE 3 C
+3V CRT +1.1V_NB Mini Card (WLAN)
+5V PG 18 +1.8VSUS
+1.2V +1.5V
+1.8V +3V PG 22 +1.8V
GFX_TX0-3 +3V +1.8VSUS
HDMI +NB_CORE PG 9,10,11,12 +SMDDR_VTERM
+5V PG 19 SMDDR
SBSRC_CLK +SMDDR_VREF
A_LINK (X4)
USBP4 Card Reader controller Card Reader
+3VPCU
RTS5159E
SATA - HDD SATA0 +3V PG 23 PG 23 +3V_S5
+3V
+5V PG 24
SB +3VSUS
+3V 3V/5V
USB2.0 USBP8 USB2.0 I/O Ports X1
SATA4
SB710 +5VPCU PG 25
+5VPCU
SATA - ODD
+5V
+5V PG 24 21mm X 21mm, 528pin BGA
USBP10
BT CONN.
B B
+3VSUS
PG 22
Azalia +1.2V
+1.2V_S5
Azalia Audio Codec +1.8V
CX20561-15z +3V_S5 USBP5
PG 20 +3V
+3V +5V PG 13,14,15,16,17 WEBCAM
VCCRTC +3V PG 18
USBP0;USBP1
MODEM CONN. LPC USB2.0 Board
(MDC)
HP+SPDF MIC AMP +3.3V_SUS PG 24
JACK JACK G1441
+5V +3V
EC
PG 20 PG 20 +5V
PG 20
WPCE775
+3V
+3VPCU PG 26
Speaker
A
PG 20 SPI A
POWER/B Flash Touch MMB/B
FAN Keyboard
PG 25 ROM Pad PG 26
+3VPCU
PG 8 PG 25 +5V
+3V PROJECT : Z08
PG 26 PG 25
+3VPCU Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM 1A
Date: Tuesday, April 28, 2009 Sheet 1 of 36
5 4 3 2 1
5 4 3 2 1
Model REV DATE
2009/04/09
1.Page 11:
CHANGE LIST
Exchange Pin define for LVDS ON & PWM.
NOTE
02
C1A 2.Page 21:
U20 Footprint change to trf-10-1-24p-nb4.
3.Page 16:
L39 Footprint from RC0603 chenge to RC0805.
4.Page 21:
R389,R425 P/N change to CS12204JA44.
5.Page 22:
CN23 Footprint change to mipcie-as0b223-s40n-7f-52p-nb4.
2009/04/16 6.Page 23:
R460 change to 33 ohm;C586 change to 10P for EMI.
D D
2009/04/17 7.Page 26:
Add Q37,Q38,R484,R485 for MMB leakage.
And 3RD_MBCLK & 3RD_MBDATA pull high from +3V to +3VPCU.
2009/04/21 8.Page 26: Add CP8,CP9 for EMI.
9.Page 24: Remove R284;mount C347 for EMI.
10.Page 20: Remove R312;mount C365 for EMI.
11.Page 3: Mount C248 and change to 15P for EMI.
12.Page 23: Remove R295;Mount C358 and change to 15P for EMI.
13.Page 12: Add C597,C598 30P (+NB_CORE) for EMI.
HW Add C599,C600 30P (+1.2V_VDDHTTX) for EMI.
Add C601,C602 30P (+1.2V) for EMI.
14.R120,R112,R388,R116,R387 change to short pad_0402.
2009/04/22 15.Page 19: Del Q20,Q21,R196,R204;add R486,R487 for AMD suggestion.
16.Page 18: CN2 footprint from msc-rb30-5-fg-30p-l to msc-rb30-5-fg-30p-l-nb4.
17.R8,R10,R214,R216,R437,R200,R28,R4,R419,R266,R265,R275,R287,R293,
R314,R319,R325,R332,R334,R258,R283,R146,R148,R198 change to short pad_0402.
18.R106,R79,R117,R118,R480,R267,R482,L1 change to short pad_0603.
19.R105,R438,R223,R249,R29,R181,L21 change to short pad_0805.
2009/04/23 20.Page 19:Modify HDMI detect circuit_Del R174,R447,R441,Q35,Q36,R442;add R312,R488,D31.
C
21.Page 18:U2 pin7 modify voltage from +5V to +3V. C
22.Page 26:Swap NET CP8,CP9.
2009/04/27 23.Page 20:Mount U14,C435,C418;unmount L47 for Audio noise issue.
2009/04/28 24.Page 26:Modify Y1 Footprint.
2009/04/10 1.Page27 Mount PR141(10K ohm) for Charger Issue.
2.Page32 Change Z08A PU5 part number from AL009338014 to AL009334000.
3.Page32 Change PC77 from 10u/4V_8 to 10u/10V_8.
4.PL5,PL8,PL10,PL11 Footprint change to choke-etqp4lr36wfc-nb4.
2009/04/17 5.page27: 1.add PC163
2.PR110,PR139,PR149 change to short pad
3.PR141 un-mount
6.page28: 1.PR87,PR90,PR106,PR190,PR91 change to short pad.
2.JP2,JP3 remove
Power 3.PR92 un-mount
4.PR101 mount
7.page29: 1.JP4,JP5 remove
2.PR44,PR43,PR18,PR19,PR128,PR131,
B
PR117,PR5 change to short pad. B
3.add PC164,PC165
4.add PR197,PR196
8.page30: 1.Remove JP8,JP9
9.page31: 1.Remove JP1,JP6,JP7
2.PR35,PR41,PR155,PR148 change to short pad.
3.+1.8VSUS_SRC net name change to +1.8VSUS
4.VIN_1.8 net name change to VIN.
5.+1.8V_out net name change to +1.8VSUS
2009/04/22 10.PL3,PL7 Footprint change to choke-spm10040t-r45m200-4p.
2009/04/23 11.page28: Del NET RT8206_VIN.
12.page29: Add PC166 27uF/25V to VIN.
2009/04/27 13.page28: Modify component from AO4496 to AO6402A..
A A
PROJECT : Z08
Quanta Computer Inc.
Size Document Number Rev
Change List
1A
Date: Tuesday, April 28, 2009 Sheet 2 of 36
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628(CLK)
+3V
L26
+3V_CLK_VDD
BK1608HS600/500mA/60ohm_6
+1.2V
L31
+1.2V_CLK_VDDIO
03
C252 C238 C228 C250 C216 C233 C218 C219
+3V C215 BK1608HS600/500mA/60ohm_6
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C251 C241 C237 C242 C217 C220
C249
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
4
2
RP15
D D
*4.7KX2
Q22
2
*2N7002E
3
1
3 1 CGCLK_SMB
<7,14,21,22> PCLK_SMB
R216 short0402
+3V SLG8SP628 P/N : AL8SP628000 Clock chip has internal serial terminations
for differencial pairs, external resistors are
Q23
ICS9LPRS480 P/N : ALPRS480000
2
*2N7002E reserved for debug purpose.
<7,14,21,22> PDAT_SMB 3 1 CGDAT_SMB
RTM880N-796 P/N : AL000880000
Place within 0.5"
R214 short0402
of CLKGEN R173
U6
change to short pad 4/22
*261/F_4
4 50 CPUCLKP_R R175 0_4 CPUCLKP
+3V +3V_CLK_48 +3V_CLK_VDD VDDDOT CPUK8_0T CPUCLKP <4>
16
VDDSRC CPUK8_0C
49 CPUCLKN_R R171 0_4 CPUCLKN
CPUCLKN <4> To CPU for CLKIN
26
L33 BK1608HS600/500mA/60ohm_6 VDDATIG
35
VDDSB_SRC
3/10 Modify for AMD suggestion.
40 30 NBGFX_CLKP
VDDSATA ATIG0T NBGFX_CLKP <11>
C255 C247
48
VDDCPU ATIG0C
29
EXT_GFX_CLKP_R
NBGFX_CLKN
NBGFX_CLKN <11> To NB for GFX_REF
55 28 T59
2.2U/6.3V_6 0.1u/10V_4 VDDHTT ATIG1T EXT_GFX_CLKN_R
56 27 T63
VDDREF ATIG1C
63
VDD48
C SBLINK_CLKP C
37 SBLINK_CLKP <11>
+1.2V_CLK_VDDIO SB_SRC0T
11
VDDSRC_IO0 SB_SRC0C
36 SBLINK_CLKN
SBSRC_CLKP
SBLINK_CLKN <11> To NB for GPPSB_REF
17 32 SBSRC_CLKP <13>
VDDSRC_IO1 SB_SRC1T
R206 *0_6
25
VDDATIG_IO SB_SRC1C
31 SBSRC_CLKN
SBSRC_CLKN <13> To SB for PCIE_RCLK
+3V_CLK_VDD 34
VDDSB_SRC_IO
47
VDDCPU_IO
22 T69
SRC0T
21 T68
C240 33p/50V_4 SRC0C
1 20 T67
CG_XIN GND48 SRC1T
1 2 7 19 T72
GNDDOT SRC1C CLK_PCIE_WLAN
10 15
<22> To Minicard (WLAN)
CLK_PCIE_WLAN <22>
2
GNDSRC0 SRC2T CLK_PCIE_WLAN#
18 14 CLK_PCIE_WLAN#
Y3 GNDSRC1 SRC2C
24 QFN64 13 T74
14.318MHZ GNDATIG SRC3T
33 12 T76
C244 33p/50V_4 GNDSB_SRC SRC3C CLK_PCIE_LAN
43 9
To LAN chip
1
GNDSATA SRC4T CLK_PCIE_LAN <21>
1 2 CG_XOUT 46 8 CLK_PCIE_LAN#
GNDCPU SRC4C CLK_PCIE_LAN# <21>
52
GNDHTT
60
+3V GNDREF
42 T58
SRC6T/SATAT
41 T56
CG_XIN SRC6C/SATAC
61 6 T73
CG_XOUT X1 SRC7T/27M_SS
62 5 T75
X2 SRC7C/27M_NS
R166 CGCLK_SMB 2 54 NBHT_REFCLKP
SMBCLK HTT0T/66M NBHT_REFCLKP <11>
CGDAT_SMB 3 53 NBHT_REFCLKN
NBHT_REFCLKN <11> To NB for HT_REF
2
10K_4 SMBDAT HTT0C/66M
NB CLOCK INPUT TABLE
R208 22_4
CLK_Card48 <23>
3 1 CLKREQ4# CLK_PD# 51 64 CLK_48M_USB_R R209 22_4 CLK_48M_USB NB CLOCKS RX780 RS780
<21> LAN_CLKREQ# PD# 48MHz_0 CLK_48M_USB <14> To SB for USBCLK
Q18 HT_REFCLKP 100M DIFF 100M DIFF
RHU002N06 T70 CLKREQ0# 23 59 SEL_HTT66
B CLKREQ1# CLKREQ0# REF0/SEL_HTT66 SEL_SATA HT_REFCLKN 100M DIFF 100M DIFF B
T57 45 58
CLKREQ1# REF1/SEL_SATA
+3V CLKREQ2#
CLKREQ3#
44
CLKREQ2# REF2/SEL_27
57 SEL_27 R185
R183
158/F_4
90.9/F_4
EXT_NB_OSC
EXT_NB_OSC <11> To NB for REFCLK REFCLK_P 14M SE (1.8V) 14M SE (1.1V)
T55 39
CLKREQ4# CLKREQ3#
38
CLKREQ4# REFCLK_N NC vref
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6