Text preview for : 08_WD7910.pdf part of Western Digital 08 WD7910 Western Digital _dataBooks 1992_SystemLogic_Imaging_Storage 08_WD7910.pdf



Back to : 08_WD7910.pdf | Home

WD7910IWD7910LP


TABLE OF CONTENTS
Section Title Page

1.0 INTRODUCTION 8-1
1.1 Document Scope 8-1
1.2 Features 8-1
1.3 General Description 8-2
1.3.1 WD791 0 8-2
1.3.2 WD7910lP 8-2

2.0 ARCHITECTURE 8-4
2.1 Initialization And Clocking 8-4
2.2 AT Bus . . . . . . . 8-4
2.3 Main Processor Control 8-4
2.4 Numeric Processor Control 8-4
2.5 Data Bus . . . . . . . 8-4
2.6 Memory and EMS Control 8-4
2.7 Power Management Control 8-5
2.8 Register File . . . . . . 8-5
2.8.1 lock Status Register 8-5
2.8.2 lock/Unlock Register 8-6
2.9 VlBI Control . 8-6
2.10 Cache Control 8-6

3.0 SIGNAL DESCRIPTION 8-10

4.0 INITIALIZATION AND CLOCKING 8-19
4.1 Power-up Reset 8-19
4.2 Clocking 8-19
4.2.1 Internal Clock (ClK14) 8-19
4.2.2 System Bus Clock (SYSClK) 8-19
4.2.3 Processor Clock (CPUClK) . 8-19
4.2.4 CPU Clock (CPUClK) Control Register 8-21

5.0 AT BUS 8-24
5.1 Interrupt Multiplexing ....... . 8-24
5.1.1 Data Acknowledge DACK7-5, 3-0 8-24
5.1.2 Data Request DRQIN 8-24
5.1.3