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A B C D E
1 1
Compal confidential
2
Bradford 10AT 2
NSKAE LA-5381P REV 0.2 Schematics Document
Mobile AMD SIG3/RS880M&RS880MC/SB710
2009-04-10 Rev. 0.2
3 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2008/04/14 2009/04/14 Title
Issued Date Deciphered Date Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
http://hobi-elektronika.net
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5381P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 1 of 46
A B C D E
A B C D E
Thermal Sensor Clock Generator
Compal Confidential Fan Control AMD S1G3 CPU
Memory BUS(DDRII) ADM1032ARMZ page 6 SLG8SP626 page 15
page 4 Dual Channel
Model Name : NSKAE uFCPGA-638 Package 1.8V DDRII 667/800MHZ
200pin DDRII-SO-DIMM X2
File Name : LA-5381P page 4,5,6,7
page 8,9
BANK 0, 1, 2, 3
1 1
Hyper Transport Link 2.6GHz
16X16
NEW Card PCIe port 0
Display Port USB Port 11 page 25
page 16
5IN1
CRT ATI JMB380
5IN1
page 31
page 16
PCIeMini Card PCIe port 1 page 31 1394
page 31
LCD Conn. WLAN (Slot 1)
page 17 RS880M PCIe 4x PCIe Port 2
1.5V 2.5GHz(250MB/s)
USB Port 8 page 27
RS880MC
RTL8111D/8103E RJ45
EC HDMI CEC Controller HDMI Conn. LAN 1G/10/100M page 28
SMBUS R5F211A4SP
page 18 page 18 PCIe port 3 page 28
page 10,11,12,13,14 PCIeMini Card
2 2
WUSB (Slot 3)
PCIe Port 4
PCIeMini Card page 28
A-Link Express II GPS/TV Tuner (Slot2)
4X PCI-E PCIe Port 5
USB Port 10 page 27 BCAS
USB Port 5 page 25
USB USB/B Right USB/B Left FP conn
ATI 5V 480MHz
USB port 0,1
page 26
USB port 4
page 24
USB port 7
page 26
SATA port 1 SATA HDD0
5V 1.5GHz(150MB/s) page 24
SB710 BT conn Felica Int. Camera
FM Tuner/B USB port 6 USB port 3 USB port 9
SATA port 0 SSD page 26 page 26 page 26
LS-430GP page 26 5V 1.5GHz(150MB/s) page 24
3 Touch Pad BTN/B SATA port 3 SATA ODD Touch Screen conn 3
5V 1.5GHz(150MB/s) page 24 USB port 13
LS-5003P page 34 page 20,21,22,23,24 SATA port 2
page 26
5V 1.5GHz(150MB/s)
Light Pipe/B eSATA
USB port 2
LS-4991P page 34
5V 480MHz
page 24
HD Audio 3.3V 24.576MHz/48Mhz
Right USB/B
I2C from SB
LS-5006P page 26 FM tuner Conn LPC BUS
3.3V 33 MHz
RTC CKT. Finger Printer/B page 26 MDC 1.5 Conn HDA Codec
page 19 ALC272
LS-5004P page 26 Debug Port ENE KB926 D3 page 26 page 29
page 33 page 32
Power On/Off CKT. Power/B
page 34 LS-4992P page 34
AMP.
SPI ROM CIR GSENSOR Int. TPA6017
DC/DC Interface CKT. Cap Sensor/B Int.KBD MIC CONN MIC CONN HP CONN
page 33 page 33 page 32 page 33 page 30 page 30 page 30 page 30
4
LS-4993P page 34 4
page 35
LED/B SPK CONN
page 30
Power Circuit DC/DC LS-4994P page 34
Security Classification Compal Secret Data Compal Electronics, Inc.
page 36,37,38,39 2008/04/14 2009/04/14 Title
40,41,42,43 Left USB/B Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LS-4995P page 24 Size Document Number Rev
http://hobi-elektronika.net
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5381P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 2 of 46
A B C D E
A B C D E
O MEANS ON X MEANS OFF
Voltage Rails Symbol Note :
: means Digital Ground
Item CPU NB VGA SB
+5VS
1
+3VS
S1G3 RS880MC NA SB710 1
power
plane +2.5VS : means Analog Ground S1G3 RS880M NA SB710
+1.8VS
+1.5VS @ : means just reserve , no build
+1.1VS
B+ +5VALW +1.8V
+VGA_CORE
+3VL +3VALW +0.9V BTO Option Table
+1.2V_HT
+5VL +1.2VALW
State +VDDNB
+RTCVCC +3V_LAN
+CPU_CORE_0 Function HDMI DIPLAY PORT Side Port
+CPU_CORE_1
description Memory
explain HDMI CEC DIPLAY PORT Side Port Samsung Hynix No Side Port
BTO HDMI@ H@ DP@ SIDE@ SAMSIDE@ HYNSIDE@ NOSIDE@
S0
O O O O
S1 Function MINI PCI-E SLOT LAN Felica BLUETOOTH CRT
2
O O O O 2
S3
description
O O O X
explain 3G B-CAS WIMAX 10/100M Giga FELICA BLUE TOOTH CRT
S5 S4/AC
O O X X BTO 3G@ TV@ WIMAX@ 8103EL@ 8111DL@ FEL@ BT@ CRT@
S5 S4/ Battery only
O X X X
Function G-SENSOR Modem FM TUNER Fingerprint SSD CIR
S5 S4/AC & Battery
don't exist X X X X description
explain HDD PROTECT Modem FM TUNER Fingerprint
BTO GSENSOR@ RJ11@ FM@ FP@ SSD@ CIR@
SB SM Bus1 Address SB SM Bus2 Address
SMBUS Control Table
THERMAL
Power Device HEX Address Power Device HEX Address SENSOR SODIMM Display
SOURCE New Card BATT CEC CPU & CLK 3G/TV LCD HDMI Port G-Sensor
3
ADM1032 I / II 3
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b +3VALW WLAN/WIMAX
SMB_EC_CK1
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b
SMB_EC_DA1
KB926 X V V X X X X X X X X
+3VS Clock Generator D2 H 1101 0010 b
Power Device HEX Address SMB_EC_CK2
+3VS New Card
SMB_EC_DA2
KB926 X X X V X X X X X X V
+3VS FM Tuner Virtual I2C
I2C_CLK
I2C_DATA
RS780M
X X X X X X X V X X X
DDC_CLK0
DDC_DATA0
RS780M X X X X X X X X V X X
DDC_CLK1
EC SM Bus1 Address EC SM Bus2 Address DDC_DATA1
RS780M X X X X X X X X X V X
SCL0
SDA0
SB700
V X X X V V X X X X X
Power Device HEX Address Power Device HEX Address SCL1
+5VL Smart Battery 16 H 0001 011X b +3VS CPU_ADM1032-1 98 H 1001 100X b SDA1
SB700 X X X X X X V X X X X
+5VL HDMI-CEC 34 H 0011 010X b +3VS VGA_ADM1032-2 9A H 1001 101X b SCL2
4
+3VS G-Sensor SDA2
SB700 X X X X X X X X X X X 4
+3VS Light Sensor SCL3
Power Device HEX Address SDA3
SB700 X X X X X X X X X X X
+3VL Cap. Sensor Virtual I2C
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
http://hobi-elektronika.net
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5381P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 10, 2009 Sheet 3 of 46
A B C D E
A B C D E
1 1
+1.2V_HT
H_CADIP[0..15] H_CADOP[0..15]
<10> H_CADIP[0..15] H_CADOP[0..15] <10>
250 mil
H_CADIN[0..15] H_CADON[0..15]
<10> H_CADIN[0..15] H_CADON[0..15] <10>
1 1 1 1 1 1
C1 C2 C3 C4 C5 C6
10U_0805_10V6K 10U_0805_10V6K 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
+1.2V_HT 2 2 2 2 2 2
JCPUA
C7
2 2
D1 VLDT_A0 HT LINK VLDT_B0 AE2 +VLDT_B 1 2 10U_0805_10V6K Near CPU Socket
D2 VLDT_A1 VLDT_B1 AE3
VLDT=500mA D3 VLDT_A2 VLDT_B2 AE4
D4 VLDT_A3 VLDT_B3 AE5
H_CADIP0 E3 AD1 H_CADOP0
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1
H_CADIP1 E1 AC2 H_CADOP1
H_CADIN1 L0_CADIN_H1 L0_CADOUT_H1 H_CADON1
F1 AC3
H_CADIP2 L0_CADIN_L1 L0_CADOUT_L1 H_CADOP2
G3 AB1
H_CADIN2 L0_CADIN_H2 L0_CADOUT_H2 H_CADON2
G2 AA1
H_CADIP3 L0_CADIN_L2 L0_CADOUT_L2 H_CADOP3
G1 AA2
H_CADIN3 L0_CADIN_H3 L0_CADOUT_H3 H_CADON3
H1 AA3
H_CADIP4 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP4
J1 W2
H_CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4
K1 W3
H_CADIP5 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP5
L3 V1
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5
L2 U1
H_CADIP6 L0_CADIN_L5 L0_CADOUT_L5 H_CADOP6
L1 U2
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6
M1 U3
H_CADIP7 L0_CADIN_L6 L0_CADOUT_L6 H_CADOP7
N3 T1
H_CADIN7 L0_CADIN_H7 L0_CADOUT_H7 H_CADON7
N2 R1
H_CADIP8 L0_CADIN_L7 L0_CADOUT_L7 H_CADOP8
E5 AD4
H_CADIN8 L0_CADIN_H8 L0_CADOUT_H8 H_CADON8
F5 AD3
H_CADIP9 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP9
F3 AD5
H_CADIN9 L0_CADIN_H9 L0_CADOUT_H9 H_CADON9
F4 AC5
H_CADIP10
H_CADIN10
G5
H5
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
AB4
AB3
H_CADOP10
H_CADON10
FAN Control Circuit
H_CADIP11 H3 AB5 H_CADOP11
H_CADIN11 L0_CADIN_H11 L0_CADOUT_H11 H_CADON11
H4 AA5
H_CADIP12 L0_CADIN_L11 L0_CADOUT_L11 H_CADOP12 +5VS
K3 Y5
H_CADIN12 L0_CADIN_H12 L0_CADOUT_H12 H_CADON12
K4 W5
H_CADIP13 L0_CADIN_L12 L0_CADOUT_L12 H_CADOP13
L5
L0_CADIN_H13 L0_CADOUT_H13
V4 1A
3 H_CADIN13 H_CADON13 3
M5 V3
H_CADIP14 L0_CADIN_L13 L0_CADOUT_L13 H_CADOP14
M3 V5
L0_CADIN_H14 L0_CADOUT_H14
1
H_CADIN14 M4 U5 H_CADON14 @
H_CADIP15 L0_CADIN_L14 L0_CADOUT_L14 H_CADOP15
N5 T4
H_CADIN15 L0_CADIN_H15 L0_CADOUT_H15 H_CADON15 1SS355_SOD323-2
P5 T3 2
L0_CADIN_L15 L0_CADOUT_L15 D1
H_CLKIP0 J3 Y1 H_CLKOP0 C183 JFAN @
2
<10> H_CLKIP0 H_CLKIN0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKON0 H_CLKOP0 <10> +FAN1
J2 W1 10U_0805_10V6K 1
<10> H_CLKIN0 H_CLKIP1 L0_CLKIN_L0 L0_CLKOUT_L0 H_CLKOP1 H_CLKON0 <10> 1 1
<10> H_CLKIP1 J5 Y4 H_CLKOP1 <10> 2
L0_CLKIN_H1 L0_CLKOUT_H1 2
1
H_CLKIN1 K5 Y3 H_CLKON1 2 3
<10> H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 <10> 3
U6 @ C9
H_CTLIP0 N1 R2 H_CTLOP0 1 8 1000P_0402_50V7K 4
<10> H_CTLIP0 H_CTLIN0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLON0 H_CTLOP0 <10> EN GND D2 GND
P1 R3 2 7 @ 5
<10> H_CTLIN0 H_CTLIP1 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLOP1 H_CTLON0 <10> +FAN1 VIN GND 1 GND
P3 T5 3 6 1SS355_SOD323-2
2
<10> H_CTLIP1 L0_CTLIN_H1 L0_CTLOUT_H1 H_CTLOP1 <10> VOUT GND
H_CTLIN1 P4 R5 H_CTLON1 4 5
<10> H_CTLIN1 L0_CTLIN_L1 L0_CTLOUT_L1 H_CTLON1 <10> <32> EN_DFAN1 VSET GND ACES_85204-0300N
1
APL5607KI-TRG_SO8
6090022100G_B @ C192 R12
10U_0805_10V6K 2 1 +3VS
2 10K_0402_5%
FAN_SPEED1 <32>
2
@ C8
0.01U_0402_25V7K
1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMD CPU S1G2 HT I/F
Size Document Number Rev
http://hobi-elektronika.net
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A