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5 4 3 2 1
PCB STACK UP
LAYER 1 : TOP CH3 BLOCK DIAGRAM 01
LAYER 2 : SGND1 PCI DEVICES IRQ ROUTING
LAYER 3 : IN1 CPU THERMAL
LAYER 4 : IN2 PCI DEVICE IDSEL# REQ# / GNT# Interrupts
CPU SENSOR
LAYER 5 : SVCC PCI8402 AD25 REQ0# / GNT0# INT A/B/E#
Merom 14.318MHz
D LAYER 6 : IN3 PAG 5 D
LAYER 7 : SGND2 479P (uPGA)/35W
PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
LAYER 8 : BOT CLOCK GEN
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK# ICS9LPRS363AGLFT
CPU CORE SC452 DREFSSCLK,DREFSSCLK# 64pinsTSSOP
PAG 38 PAG 2
VGACORE(1.025V)MAX1993 DDR3 X 4
PAG 39 NVDIA NB8P PAG 18,19
NORTH BRIDGE PCI-Express 16X
PAG 14,15,16,17,18,19,20
INT-VGACORE MAX8776 DDRII 533,667 MHz LCD CON
PAG 40 DDRII-SODIMM1 PAG 25
Crestline
PAG 12,13
VCCP +1.5V AND GMCH CRT PORT
1.05V(TPS51124) DDRII-SODIMM2 DDRII 533,667 MHz Santa Rosa PAG 24
PAG 41
PAG 12,13
HDMI CON
C C
SYSTEM POWER MAX8734 PAG 5,6,7,8,9,10,11
PAG 36
SATA0 150MB
PAG 42 SATA - HDD NBSRCCLK, NBSRCCLK#
PAG 33 DMI LINK
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116) 43
PAG PATA (66/100/133)
PATA- CD-ROM PCI BUS / 33MHz IEEE1394
PAG 33 PCI8402 PAG 26
SYSTEM CHARGER(MAX8724) 0,1,2,3 PAG 26~28
PAG 45,46 USB2.0 Mem ory
USB2.0 I/O Ports X4 SOUTH BRIDGE CardReader
PAG 27
4
Bluetooth
6 ICH-8M PCI-E
Voltage Rails Camera
7
Azalia
Mini_PCI_E PAG 20,21,22,23 1 4 6 2
ON S0~S2 ON S3 ON S4 ON S5 Ctl Signal 9
Voltage Rails Express Card
Mini PCI-E Mini PCI-E LAN Express
B B
VCC_CORE X VR_ON
ALC262
VCCP X MAINON LPC Card Card Marvell Card
SMDDR_VTERM X MAINON PCIE-LAN
PAG 34,35
WLAN Robson M8055 PAG 28
VGACORE X MAINON PAG 31 PAG 31 PAG 32
VGA1.2 X MAINON Keyboard
Touch Pad PC87541 Audio Jack
RVCC3 X X X RVCCD
PAG 35 RJ45
PAG 29 PAGE 37 PAG 32
VCC1.25 X MAINON
VCC1.5 X MAINON Audio MDC
VCC1.8 X MAIND Amplifier
VCC2.5 X MAINON PAG 35 PAG 34
VCC3 X MAIND FAN BIOS
VCC5 X MAIND
PAG 30 PAG 37 SPEAKER MODEM RJ 11
[email protected]
A A
1.8VSUS X X SUSON
PAG 35 PAG 35
3VSUS X X SUSD
5VSUS X X SUSD
PROJECT : CH3
3VPCU X X X X 8734LDO5 Quanta Computer Inc.
5VPCU X X X X 8734LDO5
15VPCU 5VPCU Size Document Number R ev
X X X X BLOCK DIAGRAM 1A
Date: Tuesday, February 06, 2007 Sheet 1 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8
VCC3
L16
1 2
BLM21PG600SN1D
CLK_3.3V
CLK_3.3V
14.318MHz
BG614318F84
XTL-5_3X3_2-3_8-1_2H
02
1
1
1
1
1
1
1
1
1
C895 C96
C132 C159 C157 C156 C154 C158 C160 C133 C662 30P CLK_XIN
3.3N/50V 10U_0805 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
2
2
2
2
2
2
2
2
2
2
Y3
14.318MHZ/20P
A A
1
Add 3.3N CAP for EMI suggestion CLK_XOUT
Nicole 12/11 C664 30P
internal build-in 33ohm PN change from B version to D version
VCC3 damping resisteor nicole 12/01
U19
VCC3 VDDCPU CLK_XIN 58 X1
L17
CPUT_L0 52 RHCLK_CPU RP1 4 3 4P2R-S-33 CLK_CPU_BCLK 3
VDDCPU RHCLK_CPU#
1 2
BLM21PG600SN1D R459 R460 ICS9PR363DGLF CPUC_L0 51 2 1 CLK_CPU_BCLK# 3
49 RHCLK_MCH RP2 4 3 4P2R-S-33
CPUT_L1F CLK_MCH_BCLK 5
1
1
C97 *10K/F *10K/F CLK_XOUT 57 48 RHCLK_MCH# 2 1
X2 CPUC_L1F CLK_MCH_BCLK# 5
C113
10U_0805 0.1U/10V 62 44 RSRC_RB RP5 4 3 4P2R-S-33
22 PM_STPCPU# CLK_PCIE_MINI_RB 31
2
2 CPU_STOP# CPUITPT_L2/PCIET_L8
63 43 RSRC_RB# 2 1
22 PM_STPPCI# PCI/PCIEX_STOP# CPUITPC_L2/PCIEC_L8 CLK_PCIE_MINI_RB# 31
CGCLK_SMB 54
VCC3 VDDA CGDAT_SMB SCLK
55 SDATA
L19 17 R_DREFSSCLK RP45 2 1 *I@4P2R-S-33
27FIX/LCD_SSCGT/PCIET_L0 DREFSSCLK 6
1 2 VDDA 18 R_DREFSSCLK# 4 3
27SS/LCD_SSCGC/PCIEC_L0 DREFSSCLK# 6
BLM21PG600SN1D
CLKUSB_48 R107 33_4
22 CLKUSB_48
1
1
C896 C101 CLK_BSEL0 R106 2.2K/F_4 12
C134 R95 10K/F_4 CLK_BSEL1 FSA/USB_48MHZ RSRC_SATA RP42
VCC3 16 FSB/TEST_MODE SATACLKT_L 26 2 1 4P2R-S-33 CLK_PCIE_SATA 20
3.3N/50V 10U_0805 0.1U/10V R461 10K/F_4 CLK_BSEL2 61 27 RSRC_SATA# 4 3 CLK_PCIE_SATA# 20
2
2
FSC/REF1/TEST_SEL SATACLKC_L
14M_ICH R462 33_4 60 19 RP44
R_CLK_PCIE_VGA 2 1 4P2R-S-33
22 14M_ICH REF0 PCIET_L1 CLK_PCIE_VGA 14
20 R_CLK_PCIE_VGA# 4 3
PCIEC_L1 CLK_PCIE_VGA# 14
Add 3.3N CAP for EMI suggestion VCC3 22 CLK_PCIE_NEW RP40 2 1 4P2R-S-33
B PCIET_L2 CLK_PCIE_NEW_C 28 B
Nicole 12/11 CLK_3.3V 1 23 CLK_PCIE_NEW# 4 3
VDDPCI PCIEC_L2 CLK_PCIE_NEW_C# 28
7 VDDPC1
11 24 RS RC_ICH RP43 2 1 4P2R-S-33
VDD48 PCIET_L3 CLK_PCIE_ICH 21
25 RSRC_ICH# 4 3
PCIEC_L3 CLK_PCIE_ICH# 21
Q6 R59 R57 56 30 CLK_PCIE_MINI_ RP41 2 1 4P2R-S-33
VDDREF PCIET_L4 CLK_PCIE_MINI_WLAN 31
2
10K 10K 21 31 CLK_PCIE_MINI_# 4 3
VDDPCIEX PCIEC_L4 CLK_PCIE_MINI_WLAN# 31
2N7002E 28
CGDAT_SMB VDDPCIEX RSRC_MCH RP3
13,22,28,31 PDAT_SMB 3 1 42 VDDPCIEX PCIET_L5 36 4 3 4P2R-S-33 CLK_PCIE_3GPLL 6
VDDCPU 50 35 RSRC_MCH# 2 1
VDDCPU PCIEC_L5 CLK_PCIE_3GPLL# 6
VCC3 R60 1K/F_4 47 39 RSRC1_LAN RP4 4 3 4P2R-S-33
VREF PCIET_L6 CLK_PCIE_LAN 32
VDDA 45 38 RSRC1_LAN# 2 1
VCC3 VDDA PCIEC_L6 CLK_PCIE_LAN# 32
R58 348_6
PEREQ1#/PCIET_L7 41
Q5 40 R_PCIE_REQ2#R68 475/F_4
PEREQ2#/PCIEC_L7 PCIE_REQ2# 31
2
10 32 R_PCIE_REQ3#R474 475/F_4
22 CK_PWG VTTPWR_GD/PD# *PEREQ3# PCIE_REQ3# 28
2N7002E 33 R_PCIE_REQ4#R65 475/F_4
*PEREQ4# PCIE_REQ4# 6
3 1 CGCLK_SMB RP46 1 2 *I@4P2R-S-33 R_DREFCLK 14
13,22,28,31 PCLK_SMB 6 DREFCLK PCIET_L9/DOTT_96MHZ
3 4 R_DREFCLK# 15
6 DREFCLK# PCIEC_L9/DOTC_96MHZL
PWRSAVE# 34 64 R_PCLK_DEBUG R66 33_4 PCLK_DEBUG
*PWRSAVE# **REQ_SEL/PCICLK0 PCLK_DEBUG 31
(96MHz)
37 3 R_PCI_CLK_8402 R475 33_4 PCI_CLK_8402
GND PCICLK1 PCI_CLK_8402 26
2 GND PCICLK2 4
6 GND
13 5 SELPCIEX0_LCD#
GND *SELPCIEX0_LCD#/PCICLK3
29 GND R_PCLK_ICH R94 33_4 PCLK_ICH
CPU Clock select 53
59
GND ITP_EN/PCICLK_F4 8
9 R_PCLK_541 R103 33_4 PCLK_541
PCLK_ICH 21
GND *SELLCD_27#/PCICLK_F5 PCLK_541 36
46 GNDA
CPU_BSEL0 R109 0 CLK_BSEL0 R110 0
3 CPU_BSEL0 MCH_BSEL0 6
C R108 *56 * Internal pull up to VDD C
VCC3
**Internal pull down to GND
R105 *1K R_PCLK_DEBUG R67 10K_4 VCC3 14M_ICH C657 15P
VCC3
R_PCLK_541 R96 10K_4 PCLK_DEBUG C115 15P
Update for Robson CLKREQ# CLKUSB_48 C689 15P
PWRSAVE# R71 *10K_4
nicole 9/20 PCLK_541 C192 15P
PCIE_REQ2# R457 10K_4
FSC FSB FSA Spread R_PCLK_ICH R476 10K_4 PCLK_ICH C193 15P
BSEL2 BSEL1 BSEL0 CPU SRC PCI REF USB DOT PCIE_REQ3# R92 10K_4
% SELPCIEX0_LCD# R477 *10K_4 PCI_CLK_8402 C688 15P
PCIE_REQ4# R69 10K_4
0 0 0 266.66 100 33.33 14.318 48 96 0.5 Down 96/100M
0 0 1 133.33 100 33.33 14.318 48 96 0.5 Down
* 0 1 0 200.00 100 33.33 14.318 48 96 0.5 Down Pin64 Pin8 LATCH SELECT TABLE
0 1 1 0.5 Down 0 PCIEXCLK REQ2# used for ROBSON
166.66 100 33.33 14.318 48 96 * 0 SRC Pair
1 0 0 333.33 100 33.33 14.318 48 96 0.5 Down * 1 PEREQ# 1 CPUITP Pair Pin5 Pin9 Pin14/15 Pin17/18
REQ3# used for NEWCARD
1 0 1 100.00 100 33.33 14.318 48 96 0.5 Down 0 0 PCIEX9 27MHz
PCIE_REQ1# PCIE_L0 PCIE_L6
1 1 0 400.00 100 33.33 14.318 48 96 0.5 Down 0 1 PCIEX9 LCD REQ4# used for GMCH
PCIE_REQ2# PCIE_L1 PCIE_L8
1 1 1 200.00 100 33.33 14.318 48 96 0.5 Down * 1 x DOT96 PCIEX0
PCIE_REQ3# PCIE_L2 PCIE_L4
D
PCIE_REQ4# PCIE_L3 PCIE_L5 PCIE_L7 D
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
PROJECT : CH3
Quanta Computer Inc.
Size Document Number R ev