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5 4 3 2 1
D
First International Computer,Inc D
Portable Computer Group HW Department
Board name : MotherBoard Schematic
Project : AMD S1 + Nvidia C51D + MCP51
C C
Version : 0.6(PTB51)
Initial Date : 05/13/2006
Confidential
B B
Manager Sign by : Avery Lee
Drawing by : Jason Lee
Total confirm by :Adam Cho
A A
First International Computer, Inc.
3FL.,NO.300,Yang Guang St.,NeiHu
114 TAIPEI, TAIWAN ,ROC
(883-2)8751-8751 Confidential
Title
PTB51
Size Document Number Rev
C TITLE 0.6
Date: Monday, December 04, 2006 Sheet 1 of 46
5 4 3 2 1
8 7 6 5 4 3 2 1
1. Schematic Page Description :
FIC Schematic Ver : 0.1
D
1. Title 21. G7X PCI-EXPRESS 41. Azalia ALC883GR- Codec D
2. Schematic Page Description 22. G7X VIDEO_1 42. AMP (G1432&G1410)/AD CN
3. Block Diagram 23. G7X VIDEO_2 43. SPDIF HP/MIC JACK
4. ANNOTATIONS 24. G7X MEM CHANEL 44. MDC / Audio CNN
5. Schematic History 25. VGA DDR2_A CHANNEL 45. KBC / GP CNN
6. AMD S1 HT(1/3) 26. VGA DDR2_C CHANNEL 46. DIP/LID SW; SCREW
7. AMD S1 DDR(2/3) 27. DVI Port
8. AMD S1 POWER(3/3) 28. LCD CNN
9. CPU Thermal/Fan CNN 29. TV Port
10. C51D_HT (1/3) 30. 1394 VIA VT6311S
11. C51D_PCIE (2/3) 31. Cardreader AU6366
12. C51D_POWER(3/3) 32. New Card(express card)
13. DDRII SO-DIMM 0 RSV 33. PCIE Mini Card
C C
14. DDRII SO-DIMM 1 STD 34. GIGA PHY 88E1116
15. MCP51 HT(1/6) 35. GIGA TRANSFORMER
16. MCP51 PCI(E)/LPC (2/6) 36. FirmWare Hub
17. MCP51 SATA/PATA(3/6) 37. USB CNN
18. MCP51 AC97/USB(4/6) 38. LED / SW
19. MCP51 RGMII(5/6) 39. RTC/ BLUETOOTH CNN
20. MCP51 POWER(6/6) 40. SATA HD / CD-ROM CNN
B
2. PCI BUS Description : BUSMASTER
B
IDSEL CHIP REQ CHIP
PCIINT CHIP
REQ0 / GNT0
IRQA 1394 VIA VT6311S REQ1 / GNT1 1394 VIA VT6311S
AD22 1394 VIA VT6311S
IRQB REQ2 / GNT2
IRQC REQ3 / GNT3
IRQD REQ4 / GNT4
A A
First International Computer, Inc.
3FL.,NO.300,Yang Guang St.,NeiHu
114 TAIPEI, TAIWAN ,ROC
(883-2)8751-8751 Confidential
Title
PTB51
Size Document Number Rev
C Schematic Page DESCR 0.6
Date: Monday, December 04, 2006 Sheet 2 of 46
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Reset Circuit
DDRII VRAM
DDRII SODIMM LID/DIP SW
400Mhz 16M * 16 4 PICS Mem Bus Thermal Sensor
D
DDRII 533/667Mhz
AMD S1 G796
LED,PWR SW D
(638 uPGA)
TMDS signal Volume Control
DVI
Hyper Transport AUDIO AMP Headphone / SPDIF
GMT G1432
Xa : G73M AUDIO AMP
LCD LVDS Signal HD Audio Codec Int. SPK
Pa : G72M PCIe x 16 GMT G1410
PCIe x 1
C51D Xa : ALC885-GR woofer AMP Woofer
533 Pin BGA Pa : ALC883-GR GMT G1433
S-VIDEO Ext. MIC IN
PCIe x 1
468 Pin PBGA
Int. Array MIC IN
C C
ExpressCard Power Express Card LINE IN
USB 2.0 Hyper Transport
P2231 Ver:C
RJ-11
High Defination Audio MDC CONN
Mini Card
USB 2.0
MCP51 10/100/1000M
RGMII Xa : 88E1116 LAN 1G
IDE BUS 508 Pin BGA TRANSFORMER
CDROM Pa : 88E3016
LAN 10/100
Xa: Dual HDD HDD
Port 0 TRANSFORMER RJ-45
SATA BUS
DCIN HDD
Port 1
B B
USB 2.0 PCI BUS
VT6311S 1394 CNN
1.5VDDA
PMU3V/5V
3VDDS/5VDDS
AU6366
5VDDA/3VDDA
3VDDM/5VDDM LPC BUS
1.8VDDS / 0.9VDDM Bluetooth CNN Pa:USB(4 PORTS)
1.8VDDM
FB_VTT Xa:USB(3 PORTS)
CPU VCORE 1.2VDDM_HT 2.5VDDM CardReader CNN FLASH ROM KBC
4 IN 1 EC Controller
PMU08A M38827
VGA CORE 1.5VDDM USB to Parallel Bus
PDIUSBD12 INT K/B GP
1.2VDDM
A A
Microcontroller
Battery charger Battery CNN PIC18F4320
First International Computer, Inc.
3FL.,NO.300,Yang Guang St.,NeiHu
114 TAIPEI, TAIWAN ,ROC
Confidential
IR Receiver (883-2)8751-8751
Title
IRM6838
For Xa Size
C
PTB51
Document Number
Block Diagram
Rev
0.6
Date: Monday, December 04, 2006 Sheet 3 of 46
8 7 6 5 4 3 2 1
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4. Net name Description : 5.Board Stack up Description
Voltage Rails PCB Layers
DCIN Primary DC system power supply Layer 1 TOP
D
PMU5V 5.0V always on power rail by LATCH or ACIN Layer 2 GND
D
PMU3V 3.3V always on power rail by LATCH or ACIN
5VDDA 5.0V always on power rail by DCON or PSUSC0 Layer 3 IN1/Mixer
3VDDA 3.3V always on power rail by DCON or PSUSC0 Layer 4 GND
1.5VDDA 1.5V always on power rail by DCON or PSUSC0
5VDDS 5.0V power rail Layer 5 VCC
3VDDS 3.3V power rail Layer 6 IN2/Mixer
1.8VDDS 1.8V power rail Layer 7 GND
FB_VTT 0.9V power rail for VGA
0.9VDDM 0.9V DDR Termination Voltage Layer 8 BOTTON
5VDDM 5.0V suspend power rail
3VDDM 3.3V suspend power rail
2.5VDDM 2.5V suspend power rail
1.5VDDM 1.5V suspend power rail
VDD_CORE Core Voltage for VGA
VCPU_CORE Core Voltage for CPU
C 1.2VDDM VCC For CPU & NB C
+1.2VHT VCC For CPU & NB Hyper Transport
Part Naming Conventions
C = Capacitor
CN = Connector
D = Diode
F = Fuse
L = Inductor
Q = Transistor
B
R = Resistor B
RP = Resistor Pack
U = Arbitrary Logic Device
Y = Crystal and Osc
Net Name Suffix
0 = Active Low signal
Signal Conditioning
_D_ = Damped (by a resistor)
_Q_ = Isolated (by a Q-switch)
_L_ = Filtered (by an inductor or bead)
A A
First International Computer, Inc.
3FL.,NO.300,Yang Guang St.,NeiHu
114 TAIPEI, TAIWAN ,ROC
(883-2)8751-8751 Confidential
Title
PTB51
Size Document Number Rev
C ANNOTATIONS 0.6
Date: Monday, December 04, 2006 Sheet 4 of 46
8 7 6 5 4 3 2 1
5 4 3 2 1
6.Schematic modify Item and History :
V0.1 --> V0.2
PTB50V0.5 --> XTB70V0.1
1.Modify LED circuit for Pa and Xa co-layout.
D 2.Change Card Reader from AU6333 to AU6366. 1.Add internal MIC OP-AMP circuit D
3.R38,R41 change to 56k ohm,C670 change to2200pF,C658 change to 1500pF,Del R385,Add C47 2.Del L39,L40,C778,C755
0.1uF (tune power sequence) 3.JP15 change to 0 ohm short
4.CLK_PMU08 change connect point from R451 to R592 4.C15 stuff
5.Add D51,R589 47k ohm (Solve HTMCP_RST# Glitch) 5.For EMI solution
6.Revise CN21 Anolog connection. C5, C6 change to 33pF
7.Change Q11 from 06-20726-01 to 06-23930-01 R272,R273,R276,R277,R278,R279 change to 18nH
8.Add 0.1uF between U5 pin1,pin2 ,Remove D14. R274,R275 change to 15nH
9.Change Headphone AMP from M441 to G1410 R258,R329,R622 0 ohm stuff
10.R236 change to NU C551 change to 220pF
V0.2 --> V0.3
V0.1 --> V0.2
1.Change JP1, JP2, JP3, JP9, JP15, JP19, JP23 to 0 ohm 11-14214-00
1.Modify USB port power from 5VDDM to 5VDDA
2.Change C16, C17 from 10-40729-02 to 10-60092-01
3.Add C883 10-52810-02 on Vcpu_core plane
4.L77, L79 changed from 12-01986-01 to 12-01955-01
5.C686 changed from NU to stuff.
6.CPU VDDIO_FB_L change to NC (FSC recommend) XTB70 V0.2 --> PTB50V0.6
7.Add PCIE CLK serial 0 hm resister R603,R604,R605,R606,R607,R608 (FSC recommend)
1.Change USB power: 5VDDM to 5VDDA
C
8.C647,C652 change from 18pf to 27pf, C630,C633 change from 12pf to 18pf(tune crystal timing) C
2.Change KBC power: from M power plane to A power plane
9.D13,R201,C379,R205 change to NU,R205 stuff, Add R600 10k ohm pull down (solve KBC issue)
3.Modift Bluetooth circuit.
10.For EMI solution
R457 change to 1K ohm
Add R272,R273,R274,R275,R276,R277,R278,R279 22 ohm
U31.1 change 3VDDA
Add C870,C871,C872,C873,C874,C875,C876,C877,C6,C5,C518,C520 5pF
Add C551,C548,C546,C880,C881 10pF
Add C878,C568,C569 100pF,C571 150pF, C480 1000pF
Del L41,L42, Add R238,R239,R385,R521 10ohm
V0.3 --> V0.4
1.Del R571, Change R572 from 910 to 1K, change D17 to one lens LED for behavior issue.
2.Del Q65, Change Q70 to P-MOS (06-20593-01) for behavior issue.
3.Add C884, C885, C886, C887 location but no stuff to prevent noise issue.
4.Del JP7, JP18, JP25, JP13, JP24, JP11, JP10, JP8, JP12, JP14, JP29, JP4, JP22, JP6,
JP21, JP5, JP17 to short.
5.C45(47pF), C55(33pF) change to 150pF, R31 change from 12k to 18k.
6.Add R613 between R531 to GND.
7.C1, C2, C535, C597 from NU to stuff .
8.Change L81, L82 to 0 ohm, add C891, C892, C893 for L1 enable function.
B B
9.Add Card control power solution
10.R375 0 ohm change to NU, R595 10K ohm stuff
11.Add Lan PHY power control circuit.
12.Modify RF LED circuit.
13.Modify DVI circuit.
14.Modify Audio Mute circuit.
15.For EMI solution
Add C494 200pF
Add R189 0 ohm
Add C898,C899,C900,C901,C902,C903,C904,C905 5pF (NU)
Add one spring
Add R258,R329,R436 0 ohm (NU)
16.R337 2K ohm change to NU, R335 10K ohm stuff
17.U58 change to NU, R550 4.7K ohm stuff
18.L55, L56 change to 300 bead, C523,C526 change to NU( Modify for Microvision issue)
19.R264 change from220 ohm to 82 ohm, R573 change from220 ohm to 470 ohm.
V0.4 --> V0.5
A
1.Add R620, R621 0 ohm (NU) A
2.Add R622 for EMI solution
3.Del R451, C707
First International Computer, Inc.
3FL.,NO.300,Yang Guang St.,NeiHu
114 TAIPEI, TAIWAN ,ROC
(883-2)8751-8751 Confidential
Title
PTB51
Size Document Number Rev
C Schematic History 0.6
Date: Monday, December 04, 2006 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1
ClawHammer HT Interface LAYOUT: Route 2.5VCCA approx. 50mil wide and 500mils
long.(Reference to ground) 300
R121
5% 1/16W SMT0402 LR
R122
1.8VDDS
300 5% 1/16W SMT0402 LR
(7,8,13,14)
2.5VCCA_CPU
U49D
F8 AF6 CPU_THERMTRIP#
VDDA2 THERMTRIP_L CPU_PROCHOT#
F9 AC7
VDDA1 PROCHOT_L
Close to SOCKET754 Close to SOCKET754 HTCPU_RST# B7
HTCPU_PWRGD RESET_L R455
A7 1.8VDDS (7,8,13,14)
(10,12) 1.2VDDM_HT (10,12) 1.2VDDM_HT LDTSTOP# PWROK 300 5% 1/16W SMT0402 LR
200 mils 200 mils F10
LDTSTOP_L
A5
VID5 CPU_VID5
R370 300 5% 1/16W SMT0402 LR AF4 C6
(7,8,13,14) 1.8VDDS SIC VID4 CPU_VID4
10uF 6.3V 10% SMT0805 X5R TDK LR C243 C232 10uF 6.3V 10% SMT0805 X5R TDK LR R369 300 5% 1/16W SMT0402 LR(NU)
AF5 A6
SID VID3 CPU_VID3
A4 CPU_VID2
D
0.22uF 10V 10% 0603 X7R LR C241 U49A C242 0.22uF 10V 10% 0603 X7R LR R148 44.2 1% 1/10W SMT0603 LR P6 VID2 D
C5 CPU_VID1
(10,12) 1.2VDDM_HT R149 44.2 1% 1/10W SMT0603 LR R6 HT_REF1 VID1
D4 AE5 B5 CPU_VID0
180pF 50V 5% 0402 NPO LR C231 VLDT_A3 VLDT_B3 C245 180pF 50V 5% 0402 NPO LR HT_REF0 VID0
D3 AE4
VLDT_A2 VLDT_B2
D2 AE3 AC6 R371 1K 5% 1/16W SMT0402 LR 1.8VDDS (7,8,13,14)
VLDT_A1 VLDT_B1 R151 0 5% 1/16W SMT0402 LR F6 CPU_PRESENT_L
D1 AE2
VLDT_A0 VLDT_B0 CPU_COREFB R150 0 5% 1/16W SMT0402 LR E6 VDD_FB_H
FROM C51 TO C51 Route as Diff 5/5/5/20 CPU_COREFB0 VDD_FB_L PSI_L
A3
CPU_PSI0
H_CADIP15 N5 T4 H_CADOP15 1 W9
(10) H_CADIP[15..0] L0_CADIN_H15 L0_CADOUT_H15 T25 VDDIO_FB_H
H_CADIN15 P5 T3 H_CADON15 3900pF 50V 10% SMT0603 X7R LR C681 Y9
(10) H_CADIN[15..0] L0_CADIN_L15 L0_CADOUT_L15 H_CADOP[15..0] (10) (10) CPUCLK VDDIO_FB_L
H_CADIP14 M3 V5 H_CADOP14 R417 R609 0 5% 1/16W SMT0402 LR(NU)
H_CADIN14 L0_CADIN_H14 L0_CADOUT_H14 H_CADON14 H_CADON[15..0] (10)
M4
L0_CADIN_L14 L0_CADOUT_L14
U5 Close CPU A9
CLKIN_H
H_CADIP13 L5 V4 H_CADOP13 Route as Diff 5/5/5/20 169 1% 1/10W SMT0603 LR A8
H_CADIN13 L0_CADIN_H13 L0_CADOUT_H13 H_CADON13 CLKIN_L
H_CADIP12
M5
K3
L0_CADIN_L13 L0_CADOUT_L13
V3
Y5 H_CADOP12
<500 mils 1 G10 E10 1
L0_CADIN_H12 L0_CADOUT_H12 T10 DBRDY DBREQ_L T9
H_CADIN12 K4 W5 H_CADON12
H_CADIP11 L0_CADIN_L12 L0_CADOUT_L12 H_CADOP11 3900pF 50V 10% SMT0603 X7R LR C680
H3 AB5 (10) CPUCLK0 T6 1 AA9
L0_CADIN_H11 L0_CADOUT_H11 TMS
H_CADIN11 H4
L0_CADIN_L11 L0_CADOUT_L11
AA5 H_CADON11
T7 1 AC9
TCK TDO
AE9 1
T23
Routing 80 ohm differential impedance
H_CADIP10 G5 AB4 H_CADOP10 1 AD9
L0_CADIN_H10 L0_CADOUT_H10 T8 TRST_L
H_CADIN10 H5 AB3 H_CADON10 (7,8,13,14) 1.8VDDS 1 AF9
L0_CADIN_L10 L0_CADOUT_L10 T24 TDI
H_CADIP9 F3 AD5 H_CADOP9 RP 510 5% SMT1010 4P2R 1/16W LR
H_CADIN9 L0_CADIN_H9 L0_CADOUT_H9 H_CADON9 RP25 1 R155 80.6 1% 1/10W SMT0603 LR
F4 AC5 4 E9 C9
H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 TEST25_H TEST29_H
E5 AD4 2 3 E8 C8
H_CADIN8 L0_CADIN_H8 L0_CADOUT_H8 H_CADON8 R169 300 1% 1/16W SMT0402 LR G9 TEST25_L TEST29_L
F5
L0_CADIN_L8 L0_CADOUT_L8
AD3
TEST19 LAYOUT: Route differentially
H_CADIP7 N3
L0_CADIN_H7 L0_CADOUT_H7
T1 H_CADOP7 R170 300 1% 1/16W SMT0402 LR H10
TEST18
Trace less than 0.5" from process with 20/8/5/8/20
H_CADIN7 N2 R1 H_CADON7 AA7
H_CADIP6 L0_CADIN_L7 L0_CADOUT_L7 H_CADOP6 TEST13
L1 U2 C2
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6 TEST9
M1 U3 T5 1 D7 AE7 1
H_CADIP5 L0_CADIN_L6 L0_CADOUT_L6 H_CADOP5 TEST17 TEST24 T18
L3 V1 T4 1 E7 AD7 1
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5 TEST16 TEST23 T17
L2 U1 T2 1 F7 AE8 1
H_CADIP4 L0_CADIN_L5 L0_CADOUT_L5 H_CADOP4 TEST15 TEST22 R152 T21300 1% 1/16W SMT0402 LR
J1 W2 T3 1 C7 AB8
H_CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4 TEST14 TEST21
K1 W3 T20 1 AC8 AF7 1
H_CADIP3 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP3 TEST12 TEST20 T19
G1 AA2
H_CADIN3 L0_CADIN_H3 L0_CADOUT_H3 H_CADON3
H1