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A B C D E
1 1
Compal Confidential
2 2
NEW70 / 80 / 90 / 50 M/B Schematics Document
PEW51 M/B Schematics Document
Intel Arrandale Processor with DDRIII + Ibex Peak-M
3
2010-06-09 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/5/12 Deciphered Date 2010/04/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5892
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401826
Date: Tuesday, June 22, 2010 Sheet 1 of 49
A B C D E
A B C D E
Compal Confidential ZZZ
DAZ0C900200
PCB NEW70 LA-5892P
Model Name NEW70 / 80 / 90 / 50
ZZZ1
File Name : LA-5892P 46@ RO0000003HM
HDMI+HDCP LOGO
1 1
Fan Control Intel Memory BUS(DDRIII)
page 26
Dual Channel 204pin DDRIII-SO-DIMM X2
Arrandale (UMA) BANK 0, 1, 2, 3 page 10,11
1.5V DDRIII 800/1066/1333
Processor 6.4G/8.5G/10.6G
100M/133M/166M(CFD)
rPGA988A
page 4,5,6,7,8,9
USB conn x3 Bluetooth CMOS Mini card Card
FDI x8 DMI x4 USB port 0 (sub board) Reader
(UMA) USB Port 1 Left side
Conn Camera USB port 12
USB port 11 USB port 8 USB port 13 USB port 9
100MHz 100MHz USB port 2 (sub board)
page 39 page 29 page 22 page 39 page 39
2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
LVDS Conn. LVDS(UMA)
page 22
CRT(UMA)
Intel 3.3V 24MHz
CRT Conn. HD Audio
page 23 Ibex Peak-M
HDMI Conn. Level Shift HDMI(UMA) SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz
page 24 page 24 PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz PCH HDA Codec
page 13,14,15,16,17
18,19,20,21 ALC888
port 2,4 port 1 SPI page 33
MINI Card x2 LAN(GbE) port 0 port 1
WLAN, 3G BCM57780 SATA HDD SATA ODD
SPI ROM x2 Audio AMP
page 26 page 27 Conn. Conn.
page 13 APA2051
page 25 page 25
page 34
3
RJ45 LPC BUS 3
page 28
33MHz
Int. Speaker
RTC CKT. LS-5891P ENE KB926 page 34
page 30
Power ON/Off CKT. LS-5892P
Touch Pad Int.KBD Clock Generator
page 31 page 31
DC/DC Interface CKT. LS-5893P IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587
133/120/100/96/14.318MHZ to PCH
BIOS ROM
48MHZ to CardReader
Power Circuit DC/DC CKT. LS-5894P page 31 page 12
4
LS-5895P 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/5/12 Deciphered Date 2010/04/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5892
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401826
Date: Tuesday, June 22, 2010 Sheet 2 of 49
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON ON OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail for PCH ON OFF OFF
+1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF
+1.5V 1.5V power rail for DDRIII ON ON OFF Project ID / Board ID Table for EC-AD channel
+1.5VS 1.5V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc 100K +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Rb / Rd V AD_BID min VAD_BID typ V AD_BID max Board ID Project ID
0 0 0 V 0 V 0 V 0.1 NEWX0
+3V_LAN 3.3V power rail for LAN ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 0.2 PEW51
+3VS 3.3V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V 0.3
+5VALW 5V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V 1.0
+5VS 5V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5V 5V power rail for PCH ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+VSB VSB always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BTO Option Table BOM Config
BTO Item BOM Structure
HDMI HDMI@
External PCI Devices 3G 3G@
Device IDSEL# REQ#/GNT# Interrupts 9050@ NEW90 / NEW50
7080@ NEW70 / NEW80
For NEWX0 ID NEWX0@
EC SM Bus1 address EC SM Bus2 address For PEW51 ID PEW51@
Device Address Device Address
Smart Battery 0001 011X b
Ibex SM Bus address USB Port Table
Device Address 4 External 3 External
3
USB 2.0 USB 1.1 Port 3
Clock Generator 1101 0010b USB Port USB Port
(9LRS3199AKLFT, SLG8SP587)
0 Ext1 USB Ext1 USB
DDR DIMM0 1001 000Xb UHCI0
DDR DIMM2 1001 010Xb
1 Ext3 HS USB Ext3 HS USB
2 Ext2 USB Ext2 USB
UHCI1
3
EHCI1
4
UHCI2
5
6
UHCI3
7
8 Camera Camera
UHCI4
9 Card Reader Card Reader
10 SIM CARD SIM CARD
EHCI2 UHCI5
11 Blue Tooth Blue Tooth
12 1st Min-Card 1st Min-Card
4
UHCI6 4
13 2st Min-Card 2st Min-Card
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A5892
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401826
Date: Tuesday, June 22, 2010 Sheet 3 of 49
A B C D E
5 4 3 2 1
JCPU1E
JCPU1A AJ13
PEG_IRCOMP RSVD32
PEG_ICOMPI B26 1 2 RSVD33 AJ12
A26 R1 49.9_0402_1%
DMI_PTX_HRX_N0 PEG_ICOMPO
A24 DMI_RX#[0] PEG_RCOMPO B27 AP25 RSVD1
DMI_PTX_HRX_N1 C23 A25 EXP_RBIAS 1 2 AL25 AH25
DMI_PTX_HRX_N2 DMI_RX#[1] PEG_RBIAS R3 750_0402_1% RSVD2 RSVD34
B22 DMI_RX#[2] AL24 RSVD3 RSVD35 AK26
DMI_PTX_HRX_N3 A21 K35 AL22
DMI_RX#[3] PEG_RX#[0] RSVD4
PEG_RX#[1] J34 AJ33 RSVD5 RSVD36 AL26
DMI_PTX_HRX_P0 B24 J33 AG9 AR2
DMI_PTX_HRX_P1 DMI_RX[0] PEG_RX#[2] RSVD6 RSVD_NCTF_37
D23 DMI_RX[1] PEG_RX#[3] G35 M27 RSVD7
DMI
DMI_PTX_HRX_P2 B23 G32 L28 AJ26
DMI_PTX_HRX_P3 DMI_RX[2] PEG_RX#[4] RSVD8 RSVD38
D A22 DMI_RX[3] PEG_RX#[5] F34 J17 SA_DIMM_VREF (CFD Only) RSVD39 AJ27 D
PEG_RX#[6] F31 H17 SB_DIMM_VREF (CFD Only)
DMI_HTX_PRX_N0 D24 D35 G25
DMI_HTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] RSVD11
G24 DMI_TX#[1] PEG_RX#[8] E33 G17 RSVD12
DMI_HTX_PRX_N2 F23 C33 E31 AP1
DMI_HTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] RSVD13 RSVD_NCTF_40
H23 DMI_TX#[3] PEG_RX#[10] D32 E30 RSVD14 RSVD_NCTF_41 AT2
PEG_RX#[11] B32
DMI_HTX_PRX_P0 D25 C31 AT3
DMI_HTX_PRX_P1 DMI_TX[0] PEG_RX#[12] RSVD_NCTF_42
F24 DMI_TX[1] PEG_RX#[13] B28 RSVD_NCTF_43 AR1
DMI_HTX_PRX_P2 E23 B30
DMI_HTX_PRX_P3 DMI_TX[2] PEG_RX#[14]
G23 DMI_TX[3] PEG_RX#[15] A31
J35 R5 AL28
PEG_RX[0] 3.01K_0402_1% RSVD45
PEG_RX[1] H34 1 @ 2 CFG0 AM30 CFG[0] RSVD46 AL29
PEG_RX[2] H33 AM28 CFG[1] RSVD47 AP30
H_FDI_TXN0 E22 F35 R6 AP31 AP32
H_FDI_TXN1 FDI_TX#[0] PEG_RX[3] 3.01K_0402_1% CFG[2] RSVD48
D21 FDI_TX#[1] PEG_RX[4] G33 1 @ 2 CFG3 AL32 CFG[3] RSVD49 AL27
H_FDI_TXN2 D19 E34 R7 1 @ 2 CFG4 AL30 AT31
H_FDI_TXN3 FDI_TX#[2] PEG_RX[5] 3.01K_0402_1% CFG[4] RSVD50
D18 FDI_TX#[3] PEG_RX[6] F32 AM31 CFG[5] RSVD51 AT32
H_FDI_TXN4 G21 D34 AN29 AP33
H_FDI_TXN5 FDI_TX#[4] PEG_RX[7] R8 CFG[6] RSVD52
1 @ CFG7
H_FDI_TXN6
E19
F21
FDI_TX#[5]
FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[8]
PEG_RX[9]
F33
B33 3.01K_0402_1%
2 AM32
AK32
CFG[7]
CFG[8]
RSVD53
RSVD_NCTF_54
AR33
AT33
Intel(R) FDI
H_FDI_TXN7 G18 D31 AK31 AT34
RESERVED
FDI_TX#[7] PEG_RX[10] CFG[9] RSVD_NCTF_55
PEG_RX[11] A32 AK28 CFG[10] RSVD_NCTF_56 AP35
PEG_RX[12] C30 WW41 Recommend not pull down AJ28 CFG[11] RSVD_NCTF_57 AR35
H_FDI_TXP0 D22 A28 AN30 AR32
H_FDI_TXP1 FDI_TX[0] PEG_RX[13] PCIE2.0 Jitter is over on ES1 CFG[12] RSVD58
C21 FDI_TX[1] PEG_RX[14] B29 AN32 CFG[13]
H_FDI_TXP2 D20 A30 AJ32
H_FDI_TXP3 FDI_TX[2] PEG_RX[15] CFG[14]
C18 FDI_TX[3] AJ29 CFG[15] RSVD_TP_59 E15
C H_FDI_TXP4 G22 L33 AJ30 F15 C
H_FDI_TXP5 FDI_TX[4] PEG_TX#[0] CFG[16] RSVD_TP_60
E20 FDI_TX[5] PEG_TX#[1] M35 AK30 CFG[17] KEY A2
H_FDI_TXP6 F20 M33 H16 D15 R9
H_FDI_TXP7 FDI_TX[6] PEG_TX#[2] RSVD_TP_86 RSVD62 0_0402_5%
G19 FDI_TX[7] PEG_TX#[3] M30 RSVD63 C15
L31 AJ15 RSVD64_R 2 @ 1
PEG_TX#[4] RSVD64 RSVD65_R 2 @
<15> H_FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32 RSVD65 AH15 1
E17 M29 R10
<15> H_FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 B19 0_0402_5%
PEG_TX#[7] R11 RSVD15
<15> H_FDI_INT C17 FDI_INT PEG_TX#[8] K29 A19 RSVD16
H30 0_0402_5%
PEG_TX#[9] @ H_RSVD17_R
<15> H_FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29 1 2 A20 RSVD17
D17 F29 1 @ 2 H_RSVD18_R B20
<15> H_FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] RSVD18
PEG_TX#[12] E28 RSVD_TP_66 AA5
D29 R12 U9 AA4
PEG_TX#[13] 0_0402_5% RSVD19 RSVD_TP_67
PEG_TX#[14] D27 T9 RSVD20 RSVD_TP_68 R8
PEG_TX#[15] C26 RSVD_TP_69 AD3
AC9 RSVD21 RSVD_TP_70 AD2
PEG_TX[0] L34 AB9 RSVD22 RSVD_TP_71 AA2
PEG_TX[1] M34 RSVD_TP_72 AA1
PEG_TX[2] M32 DMI_PTX_HRX_N[0..3] <15> RSVD_TP_73 R9
PEG_TX[3] L30 DMI_PTX_HRX_P[0..3] <15> RSVD_TP_74 AG7
PEG_TX[4] M31 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
PEG_TX[5] K31 DMI_HTX_PRX_N[0..3] <15> A3 RSVD_NCTF_24
PEG_TX[6] M28 DMI_HTX_PRX_P[0..3] <15>
PEG_TX[7] H31 RSVD_TP_76 V4
PEG_TX[8] K28 H_FDI_TXN[0..7] <15> RSVD_TP_77 V5
PEG_TX[9] G30 H_FDI_TXP[0..7] <15> RSVD_TP_78 N2
PEG_TX[10] G29 J29 RSVD26 RSVD_TP_79 AD5
PEG_TX[11] F28 J28 RSVD27 RSVD_TP_80 AD7
B B
PEG_TX[12] E27 RSVD_TP_81 W3
PEG_TX[13] D28 A34 RSVD_NCTF_28 RSVD_TP_82 W2
PEG_TX[14] C27 A33 RSVD_NCTF_29 RSVD_TP_83 N3
PEG_TX[15] C25 RSVD_TP_84 AE5
C35 RSVD_NCTF_30 RSVD_TP_85 AD9