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A B C D E
ZZZ1 ZZZ2 ZZZ3 ZZZ4 ZZZ5 ZZZ6 ZZZ7
DAZ DC-IN Cable LA-5501P LS-5501P LS-5502P LS-5503P LS-5504P
45@ DA@ DA@ DA@ DA@ DA@
04/13 Add DC-IN Cable DC301008200 (45@)
1 1
07/21 Add DAZ P/N and other small board PCB P/N
Compal Confidential
2
NTUC0 LA-5501P Schematics Document 2
Intel Penryn uFCBGA with Intel Cantiga GS40+ICH9M SFF
SFF ULV I/O Board
3 3
2009-07-30
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/03/20 Deciphered Date 2010/03/20 Title
Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTUC0 IO/B LA-5501P Schematic
Date: Thursday, July 30, 2009 Sheet 1 of 24
A B C D E
A B C D E
Compal Confidential
File Name : NTUC0_LA-5501P
1 1
LVDS Amplifier & Speaker
LCD Conn.
Single Channel HDA Audio Codec
Realtek ALC272
TMDS
HDMI Conn. Headphone & MIC Jack
Golden Finger
USB * 8 ports
RGB HDI to I/O board
CRT Conn.
2 2
USB Port X3
PCI-Express x1 SATA
MINI Card x2
Ethernet WLAN Card SATA HDD ESATA Conn.
10/100/1000 LAN BlueTooth
AR8131
LPC
WWAN Card CMOS Camera
Transformer
3 ENE KBC 3
KB926
Card Reader SD/MMC/MS/XD
RJ45 Conn. RTS5159 Conn.
INT KB SPI ROM
Touch Pad
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/03/20 Deciphered Date 2010/03/20 Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTUC0 IO/B LA-5501P Schematic
Date: Thursday, July 30, 2009 Sheet 2 of 24
A B C D E
A
Symbol Note : @ : means just reserve , no build
CONN@ : means ME part.
45@ : means install after SMT.
: means Digital Ground
: means Analog Ground
I2C / SMBUS ADDRESSING
DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010
SMBUS Control Table
1 1
SERIAL THERMAL
SOURCE INVERTER BATT EEPROM SENSOR SODIMM CLK CHIP MINI CARD LCD
(CPU)
SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
SMB_CK_CLK1
SMB_CK_DAT1 ICH9 X X X X V V V X
LCD_CLK
LCD_DAT Cantiga
X X X X X X X V
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/03/20 Deciphered Date 2010/03/20 Title
Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTUC0 IO/B LA-5501P Schematic
Date: Tuesday, July 21, 2009 Sheet 3 of 24
A
5 4 3 2 1
B+
JP1
1 B+ +5VS 2 +5VS
1 3 B+ +5VALW 4 +5VALW
C1 5
7
B+ +VL 6
8
VL
+3VALW
04/23 Add VL (PWR Recommend)
0.1U_0603_50V4Z B+ +3VALW
9 B+ +3VS 10 +3VS
2
11 B+ +3VS 12
13 B+ +3VS 14
15 16 VR_ON <13>
RESERVED VR_ON
17 18 1 2 HDI_B_DET <13>
GND HDI_B_DET/GND R184 0_0402_5%
D 04/02 Change JP1.23 from PH to MAINPWON 19
21
GND GND
20
22 D
GND GND
<22> MAINPWON 23 24
B+_BIAS GND ICH_HDA_RST#
+RTCBATT 25 26 SB_SPKR <10> 1 2 HDA_RST# <10>
+RTCVCC PC Beep ICH_HDA_RST# R2 33_0402_5%
27 28
ICH_RTCRST# HDA_RST ICH_HDA_SDOUT ICH_HDA_SDOUT
29 30 1 2 HDA_SDOUT <10>
GPIO1 HDA_SDOUT ICH_HDA_SYNC R3 33_0402_5%
<13> EC_SMB_DA2 31 32
EC_SMB_DA2 HDA_SYNC ICH_HDA_BIT_CLK ICH_HDA_SYNC
<13> EC_SMB_CK2 33 34 1 2 HDA_SYNC <10>
EC_SMB_CK2 HDA_BIT_CLK R4 33_0402_5%
35 36 HDA_SDIN0 <10>
GPIO6 HDA_SDIN0 ICH_HDA_BIT_CLK
05/11 Co-lay backlight control signal 37
39
GPIO48 HDA_SDIN1
38
40 HDD_LED# <15>
1
R5
2
33_0402_5%
HDA_BIT_CLK <10>
<13> EC_SMI# EC_SMI# SATA_ACT#
(L_BKLT_CTRL) from NB <5> L_BKLT_CTRL 41
43
NC PSATA_ITX_DRX_P0
42
44
SATA_ITX_DRX_P0_C <9>
PCIE_ITX_EXPRX_P2 PSATA_ITX_DRX_N0 SATA_ITX_DRX_N0_C <9>
45 PCIE_ITX_EXPRX_N2 GND 46
WWAN 47 GND EC_THERM# 48 EC_THERM# <13>
06/23 Delete PCIE_IRX_DTX_N4,PCIE_IRX_DTX_P4 49
51
PCIE_IRX_EXPTX_P2 GPIO42 50
52
PCIE_IRX_EXPTX_N2 GND
PCIE_ITX_DRX_N4_C,PCIE_ITX_DRX_P4_C 53
55
GND PSATA_ITX_DRX_P1 54
56
<8> PCIE_ITX_DRX_P2_C PCIE_ITX_WLANRX_P1 PSATA_ITX_DRX_N1
<8> PCIE_ITX_DRX_N2_C 57 PCIE_ITX_WLANRX_N1 GND 58
WLAN 59 GND 1.5VS 60 +1.5VS
<8> PCIE_IRX_DTX_P2 61 PCIE_IRX_WLANTX_P1 1.5VS 62
<8> PCIE_IRX_DTX_N2 63 PCIE_IRX_WLANTX_N1 GND 64
65 GND PSATA_ITX_DRX_P2 66 SATA_ITX_DRX_P2_C <16>
<11> PCIE_ITX_DRX_N6_C 67 PCIE_ITX_LANRX_N0 PSATA_ITX_DRX_N2 68 SATA_ITX_DRX_N2_C <16>
<11> PCIE_ITX_DRX_P6_C 69 PCIE_ITX_LANRX_P0 GND 70
LAN 71 GND PSATA_IRX_DTX_P2_C 72 SATA_IRX_DTX_P2_C <16>
<11> PCIE_IRX_DTX_N6 73 PCIE_IRX_LANTX_N0 PSATA_IRX_DTX_N2_C 74 SATA_IRX_DTX_N2_C <16>
<11> PCIE_IRX_DTX_P6 75 PCIE_IRX_LANTX_P0 GND 76
77 GND PSATA_IRX_DTX_P0_C 78 SATA_IRX_DTX_P0_C <9>
<13> SLP_S4# 79 PM_SLP_S4# PSATA_IRX_DTX_N0_C 80 SATA_IRX_DTX_N0_C <9>
81 VGATE GND 82
<13> EC_RSMRST# 83 EC_RSMRST# USB20_P7 84
C C
<13> EC_LID_OUT# 85 GPIO24 USB20_N7 86
87 EC_LID_OUT# GND 88
<13> ICH_POK 89 PWRGD PSATA_IRX_DTX_P1_C 90
91
93
EC_SWI# PSATA_IRX_DTX_N1_C 92
94
06/23 Delete USB20_N5,USB20_P5
<13,17,21> SUSP# SUSP# GND
<13,19> AC_IN 95 AC_IN USB20_P5 96
<16> USB_OC#2 97 EC_USB_OC3# USB20_N5 98
<16> USB_OC#1 99 100
EC_USB_OC2# GND
<16> USB_OC#0 101 102 USB20_P4 <8>
EC_USB_OC1# USB20_P4
<13> PBTN_OUT# 103 104 USB20_N4 <8>
PWRBTN# USB20_N4
<13> SLP_S5# 105 106
PM_SLP_S5# GND
<13> SLP_S3# 107 108 USB20_P3 <9>
PM_SLP_S3# USB20_P3
<13> EC_SCI# 109 110 USB20_N3 <9>
EC_SCI# USB20_N3
<8,11,13> PLT_RST# 111 112
PLT_RST# GND
<13> SYSON 113 114
SYSON GPIO44
<13> LPC_AD0 115 116
LPC_AD0 GND
<13> LPC_AD1 117 118 USB20_P8 <5>
LPC_AD1 USB20_P8
<13> LPC_AD2 119 120 USB20_N8 <5>
LPC_AD2 USB20_N8
<13> LPC_AD3 121 122
LPC_AD3 GND
<13> LPC_FRAME# 123 124 USB20_P6 <15>
LPC_FRAME# USB20_P6
<13> SERIRQ 125 126 USB20_N6 <15>
SIRQ USB20_N6
<13> KB_RST# 127 128
EC_KBRST# GND
<13> GATEA20 129 130 USB20_P1 <16>
EC_GA20 USB20_P1
<8> WWAN_CLKREQ# 131 132 USB20_N1 <16>
EXP_REQ# USB20_N1
133 134
RESERVED GND
<7> HDMI_HPD# 135 136 USB20_P2 <16>
HDMI_HP USB20_P2
<13> CLK_PCI_LPC 137 138 USB20_N2 <16>
LPC_CLK0 USB20_N2
139 140
GND GND
<7> HDMI_DATA 141 142 USB20_P0 <15>
HDMI_SDA USB20_P0
<7> HDMI_CLK 143 144 USB20_N0 <15>
HDMI_SCL USB20_N0
145 146
GND GND
<7> TMDS_B_TX2 147 148 H_ENBKL <5>
B TX2D+ PANEL_BKEN_MCH B
<7> TMDS_B_TX2# 149 150 ENVDD <5>
TX2D- ENVDD
151 152 LDDC_DATA <5>
GND LDDC_DATA_MCH
<7> TMDS_B_TX1 153 154 LDDC_CLK <5>
TX1D+ LDDC_CLK_MCH
<7> TMDS_B_TX1# 155 156 CRT_VSYNC <6>
TX1D- CRT_VSYNC
157 158 CRT_HSYNC <6>
GND CRT_HSYNC
<7> TMDS_B_TX0 159 160
TX0D+ GND
<7> TMDS_B_TX0# 161 162 CRT_DDC_DATA <6>
TX0D- G_DAT_DDC2
163 164 CRT_DDC_CLK <6>
GND G_CLK_DDC2
<7> TMDS_B_CLK 165 166
TXCD+ GND
<7> TMDS_B_CLK# 167 168 CRT_RED <6>
TXCD- CRT_RED
169 170
GND GND
<8> WLAN_CLKREQ# 171 172 CRT_GREEN <6>
WLAN_REQ# CRT_GRN
T3 PAD 173 174
WLAN_SMDATA GND
T4 PAD 175 176 CRT_BLUE <6>
WLAN_SMCLK CRT_BLU
<8,11> PCIE_WAKE# 177 178
PCIE_WAKE# GND
<13> PCI_PME# 179 180 LVDS_A1 <5>
PCIE_PME LCD_A2+_MCH
<15> CLK_48M_CR 1 2 181 182 LVDS_A1# <5>
R190 0_0402_5% CLK_48M_CR LCD_A2-_MCH
<11> LAN_CLKREQ# 183 184
LAN_REQ# GND
<8> CLK_PCIE_WWAN# 185 186 LVDS_A0 <5>
CLK_PCIE_EXP LCD_A1+_MCH
<8> CLK_PCIE_WWAN 187 188 LVDS_A0# <5>
CLK_PCIE_EXP# LCD_A1-_MCH
189 190
GND GND
<8> CLK_PCIE_WLAN# 191 192 LVDS_A2 <5>
CLK_PCIE_MINI LCD_A0+_MCH
<8> CLK_PCIE_WLAN 193 194 LVDS_A2# <5>
CLK_PCIE_MINI# LCD_A0-_MCH
195 196
HDI_B_DET/GND GND
<11> CLK_PCIE_LAN# 197 198 LVDS_ACLK <5>
CLK_PCIE_LAN# LCD_ACLK+_MCH
<11> CLK_PCIE_LAN 199 200 LVDS_ACLK# <5>
CLK_PCIE_LAN LCD_ACLK-_MCH
A A
FPC_O0P45X2P35
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/03/20 Deciphered Date 2010/03/20 Title
HDI to I/O Golden Finger
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTUC0 IO/B LA-5501P Schematic
Date: Thursday, July 30, 2009 Sheet 4 of 24
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT
+LCDVDD_CONN +5VALW +3VS
1
R8 R9 W=60mils 1
D 150_0603_1% 100K_0402_5% C2 D
05/12 Change Q1 from 4.7U_0805_10V4Z +3VS
06/04 Change R235 from @ to mount
SB000008J00 to
2
1
3
D R10
S
2
Change D1 from mount to @
1
G
G
SB000009610 G
2 1 2 2
R7
INVT_PWM
05/13 Reserve R235
470P_0402_50V7K
470P_0402_50V7K
470P_0402_50V7K
Q1 S 220K_0402_5% SI2301BDS-T1-E3_SOT23-3
3
SSM3K7002FU_SC70-3 R235 1 2 0_0402_5% 4.7K_0402_5% DAC_BRIG
1
Q2 D 05/13 Change bead (L1) to 0ohm (R234)
1
2
C6 DISPOFF#
05/14 Delete R234 <13> BKOFF# 1 2
1
D 0.1U_0402_16V4Z D1 @ CH751H-40PT_SOD323-2 DISPOFF#
2 2 +LCDVDD_CONN
<4> ENVDD ENBKL
G <4> H_ENBKL R202 1 2 0_0402_5% ENBKL <13>
S Q3 1 1 1
3
1
SSM3K7002FU_SC70-3 C3 C4 C5
1
W=60mils @ @ @
R13 1 1
100K_0402_5% C7 C8 R12 2 2 2
05/12 Change Q3 from SBX01240010 to SB000009610