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1 2 3 4 5 6 7 8




PCB STACK UP
8L
UT6 BLOCK DIAGRAM 01
CPU CPU THERMAL
LAYER 1 : TOP SENSOR
Penryn 14.318MHz
A LAYER 2 : SGND PAGE 4 A

478P (uPGA)/35W
LAYER 3 : IN1 PAGE 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 4 : SVCC
DREFCLK,DREFCLK# ALPRS355B MLF64PIN
FSB 667/800/1066
LAYER 5 : IN2 DREFSSCLK,DREFSSCLK#
PAGE 2
LAYER 6 : IN3
LAYER 7 : SGND1 UMA only PS8101

PAGE 20 27MHz
LAYER 8 : BOT
NORTH BRIDGE
DDRIII 667/800 MHz HDMI CON
DDRII-SODIMM0
PAGE 20
VGA PAGE 10,11 Cantiga nVIDIA
Cable PCI-Express
RJ-45 16X
Docking DDRIII 667/800 MHz PM45,GM45 CRT
B CIR/Pwr btn DDRII-SODIMM1 NB9P-GS 128 Bit B

SPDIF Out PAGE 20
PAGE 10,11 PAGE 5~9 PAGE 12~18
Stereo MIC Dual Link
969p
Headphone Jack LCD CONN
USB Port 32.768KHz PAGE 19
DMI LINK NBSRCCLK, NBSRCCLK#
PAGE 38 VOL Cntr

SATA - HDD
SATA0 150MB USB2.0
PAGE 34 0,1,8,9 5 3 2 4,7,10,11
SYSTEM CHARGER ISL6251AHAZ-T USB2.0 Ports BlueTooth Webcam Fingerprint Mini PCI-E Card x2
SATA1 150MB SOUTH BRIDGE Express Card x1
PAGE 39 SATA - CD-ROM X4 PAGE 31 PAGE 31 PAGE 31 PAGE 31
Cable Docking x1
PAGE 34
SYSTEM POWER ISL6237IRZ-T
SATA4 150MB ICH9-M 24.576Hz
PAGE 40 SATA - 2ndHDD PCI-E
PAGE 30
X3 X1 X1 X1
C DDR II SMDDR_VTERM Azalia C
1.8V/1.8VSUS(TPS51116REGR) E-SATA
SATA5 150MB PAGE 21,22,23,24 Mini PCI-e Card Express
PAGE 44 LAN JMICRO 380
PAGE 31 (Wireless LAN) Realtek Card
for Discrete
Analog (TV) PCIE-LAN (NEW CARD)
VCCP +1.5V AND GMCH Accelerometer RTL 8111C
SMBUS LPC (ROBSON)
1.05V(RT8204) PAGE 44 LIS302DL PAGE 28 32.768KHz IDT92HD71B7 (GagaLAN) PAGE 34 PAGE 26
PAGE 37
PAGE 32,33
PAGE 27
VGACORE(1.025V)Oz8118
PAGE 43 HDCP SPI IEEE1394 Memory
25MHz
Keyboard ENE KBC for UMA
connect for
Discrete
CardReader
AUDIO AUDIO only
CPU CORE ISL6266A Touch Pad PAGE 36 PAGE 22 Amplifier Amplifier
PAGE 42 KB3926 C0 RJ45 PAGE 26 PAGE 25
TPA6020A2 TPA3007D1
Capacitive Sense PAGE 35 PAGE 28 PAGE 29 PAGE 32
SW PAGE 36

D
microphone Audio Jacks Jack to D


(Phone/ MIC) Speaker
GMT G9931P1U
PAGE 27 PAGE 27 PAGE 28
BIOS SPI
PROJECT : UT6
FAN PAGE 35 Quanta Computer Inc.
PAGE 38 Jack to
Sub-Woofer Size Document Number Rev
Custom E3A
PAGE 29 Block Diagram
NB5 Date: Wednesday, August 06, 2008 Sheet 1 of 46
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8




[4,6,9,10,11,12,14,15,19,20,21,22,23,24,25,26,27,28,29,30,31,32,34,35,37,38,42,43,45] +3V



02
[3,4,5,6,8,9,21,24,36,41] +1.05V


+3V


L59 HCB1608KF-181T15_6 +3V_CK_MAIN
U12

C450 C396 C474 C397 C403 C421 +3V_CK_MAIN 23 61
VDDPLL3 CPUCLKT0 CLK_CPU_BCLK [3]
10U/6.3V_8 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 16 VDD48 CPUCLKC0 60 CLK_CPU_BCLK# [3] Delete RP49 for delete ITP conn.
A 9 A
4
VDDPCI
VDDREF
CK505 CPUCLKT1 58 CLK_MCH_BCLK [5]
46 VDDSRC CPUCLKC1 57 CLK_MCH_BCLK# [5]
L32 HCB1608KF-181T15_6 +3V_CK_CPU +3V_CK_CPU 62 VDDCPU SRC8
CPUT2_ITP/SRCT8 54 TP96
+3V_CK_MAIN2 19 53 SRC8# 07/09 (PV2) Del RP53, add TP96,TP97
VDD96I/O CPUC2_ITP/SRCC8 TP97
C418 C416 27
10U/6.3V_8 .1U/10V_4 VDDPLL3I/O SRC0
for no support ROBSON card.
33 20
R582 VDDSRCI/O DOTT_96/SRCT0 SRC0#
43 VDDSRCI/O DOTC_96/SRCC0 21
7/16 (PV2) Change FP for ICT. *0_4/S 52
short0402 VDDSRCI/O SRC1
27MHz_Nonss/SRCCLK1/SE1 24
For Vender suggest 56 25 SRC1#
L33 HCB1608KF-181T15_6 +3V_CK_MAIN2 VDDCPU_IO 27Mhz_ss/SRCCLC1/SE2
55
R267 *0_4 NC
+1.05V SRCCLKT2/SATACL 28 CLK_PCIE_NEW [34]
SRCCLKC2/SATACL
29 CLK_PCIE_NEW# [34] int
C463 C455 C458 C468 C465 C473 C411 CG_XIN 3 SRC0 RP60 4 3 *4P2R-S-0
X1 DREFCLK [6]
10U/6.3V_8 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 CG_XOUT 2 31 SRC0# 2 1
X2 SRCCLKT3/CR#_C CLK_PCIE_CARD [26] DREFCLK# [6]
32 CLK_PCIE_CARD# [26]
SRCCLKC3/CR#_D short-4p2r-0404
des
34 RP51 2 1 *0_4P2R/S
SRCCLKT4 CLK_PCIE_3GPLL [6] CLK_PCIE_VGA [12]
R254 *100K/F_4 35 4 3
SRCCLKC4 CLK_PCIE_3GPLL# [6] CLK_PCIE_VGA# [12]

[23] CK_PWG 63 CK_PWRGD/PD# PCI_STOP# 45 PM_STPPCI# [23] 07/14 (PV2) Change footprint for PE require.
+3V CPU_BSEL1 R248 2.2K_4 FSB 64 44
+3V FSLB/TEST_MODE CPU_STOP# PM_STPCPU# [23]

SRCCLKT6
48 CLK_PCIE_ICH [22] int
47 SRC1# RP61 2 1 *4P2R-S-0
SRCCLKC6 CLK_PCIE_ICH# [22] DREFSSCLK# [6]
SRC1 4 3 DREFSSCLK [6]
[10,11,28,34,37] CGCLK_SMB 7 51 CLK_PCIE_WLAN [37]
Q16 R224 R228 SCLK SRCCLKT7/CR#_F
[10,11,28,34,37] CGDAT_SMB 6 50 CLK_PCIE_WLAN# [37]
SDATA SRCCLKC7/CR#_E
2




B R236 ME2N7002E 10K/F_4 10K/F_4 RP52 4 3 4P2R-S-33 B
27M_SS [14]
10K/F_4 37 2 1
SRCCLKT9 CLK_PCIE_LAN [32] 27M_NONSS [14]
3 1 CGDAT_SMB 22 38
[23] PDAT_SMB GND SRCCLKC9 CLK_PCIE_LAN# [32]
26 GND
des
TME 18 41
GND48 SRCCLKT10 CLK_PCIE_SATA [21]
59 GNDCPU SRCCLKC10 42 CLK_PCIE_SATA# [21]
15
+3V GNDPCI
1 40 CLK_PCIE_TVC [37]
GNDREF SRCCLKT11/CR#_H
30 39 CLK_PCIE_TVC# [37]
Q17 GNDSRC SRCCLKC11/CR#_G
36
GNDSRC
2




ME2N7002E 49
GNDSRC R_CLK_NEWCARD_OE# R239 475/F_4
8 CLK_NEWCARD_OE# [34]
CGCLK_SMB PCICLK0/CR#_A R_CLK_MCH_OE# R229 475/F_4
[23] PCLK_SMB 3 1 10 CLK_MCH_OE# [6]
PCICLK1/CR#_B TME R235 33_4
PCICLK2/TME 11 PCLK_DEBUG [37]
12 R_PCLK_KBC R220 33_4
PCICLK3 PCLK_KBC [35]
13 27M_SEL
PCICLK4/27_SELECT
0=overclocking ITP_EN R237 33_4
65 PCLK_ICH [22]
of CPU and EPAD
Y2 05/14 (PV) FOR BOM modify
14 R247 22_4
SRC Allowed CG_XIN CG_XOUT PCI_F5/ITP_EN R245 *22_4
CLK_48M_USB [23]
1 2 CLK_48M_CR
1 = overclocking 17 FSA R253 2.2K_4 CPU_BSEL0
CGDAT_SMB CGCLK_SMB USB_48MHZ/FSLA FSC R240 10K/F_4 CPU_BSEL2
of CPU and SRC 14.318MHZ 5 R241 33_4
CLK_14M_ICH [23]
C400 C409 FSLC/TST_SL/REF
not Allowed 27P/50V_4 27P/50V_4 C926 C927 ICS9LPRS355BKLF
33P/50V_4 33P/50V_4

+3V

C +3V C
SI modified
C400,C409 change to 27p CK505 QFN64
CLK_MCH_OE# R221 10K/F_4
des R238 ICS ICS9LPRS355BKLF ALPRS355000
10K/F_4 27M_SEL
PIN20 PIN21 PIN24 PIN25 Silego SLG8SP513VTR AL8SP513000 CLK_NEWCARD_OE# R225 10K/F_4
27M_SEL PIN13
Realtek RTM875N-606-VD-GR AL000875000 PM_STPPCI# R288 *10K/F_4

R244
0=UMA DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
int
*10K/F_4 PM_STPCPU# R293 *10K/F_4
1 = External
SRCT0 SRCC0 27Mout-NSS 27Mout-SS For Vender suggest
VGA
0=UMA PCLK_KBC
1 = External VGA C393 *33P/50V_4
QT6 modified-0117
FSC FSB FSA CPU SRC PCI C395 *27P/50V_4 PCLK_ICH

+3V CPU Clock select 1 0 1 100 100 33 C388 *33P/50V_4 PCLK_DEBUG
[3,6] CPU_BSEL0 CPU_BSEL0 R255 *0_4/S MCH_BSEL0 [3,6]
short0402 0 0 1 133 100 33 C406 *10P/50V_4 CLK_48M_USB

7/16 (PV2) Change 0 1 1 166 100 33 C402 *10P/50V_4 CLK_48M_CR
R243 R257 *1K/F_4
FP for ICT. CLK_14M_ICH
*10K/F_4 0 1 0 200 100 33 C391 *33P/50V_4
R_PCLK_KBC [3,6] CPU_BSEL1 CPU_BSEL1 R251 *0_4/S MCH_BSEL1 [3,6]
D short0402 D
0 0 0 266 100 33 for EMI
ITP_EN

R250 *1K/F_4
1 0 0 333 100 33
+1.05V
R232 1 1 0 400 100 33
R234 *10K/F_4 CPU_BSEL2 R226 *0_4/S
[3,6] CPU_BSEL2 MCH_BSEL2 [3,6]
10K/F_4 short0402
1K to NB only when
1 1 1 RSVD 100 33 PROJECT : UT6
R227 *1K/F_4
XDP is implement.No
XDP can use 0 ohm
Quanta Computer Inc.
+1.05V
Enable ITP CLK
Size Document Number Rev
Custom E3A
Clock Generator
NB5 Date: Wednesday, August 06, 2008 Sheet 2 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1


[2,4,5,6,8,9,21,24,36,41] +1.05V




03
[2,4,6,9,10,11,12,14,15,19,20,21,22,23,24,25,26,27,28,29,30,31,32,34,35,37,38,42,43,45] +3V




[5] H_A#[35:3] U31A [5] H_D#[63:0]
H_A#3 J4 H1 U31B H_D#[63:0]
A[3]# ADS# H_ADS# [5]
H_A#4 L5 E2 H_D#0 E22 Y22 H_D#32
A[4]# BNR# H_BNR# [5] D[0]# D[32]#




ADDR GROUP 0
H_A#5 L4 G5 H_D#1 F24 AB24 H_D#33
A[5]# BPRI# H_BPRI# [5] D[1]# D[33]#
H_A#6 K5 H_D#2 E26 V24 H_D#34
H_A#7 A[6]# H_D#3 D[2]# D[3