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BD-SP308

Ref. No. 4218
052010
SERVICE MANUAL


BLU-RAY DISC PLAYER
MODEL BD-SP308(B)/(S)




Black and Silver models RC-787DV /
RC-788DV
B WUP2P 200-240V AC, 50/60Hz
S WUP2P 200-240V AC, 50/60Hz
B WUL5P 200-240V AC, 50/60Hz
B WUF3N 110V AC, 60Hz
B WDC1N 120V AC, 60Hz
B WUQ3P 110-240V AC, 50/60Hz
B WUA4P 200-240V AC, 50/60Hz
B WUK3N 200-240V AC, 50/60Hz

SAFETY-RELATED COMPONENT
WARNING!!
COMPONENTS IDENTIFIED BY MARK ON THE
SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE
CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK.
REPLACE THESE COMPONENTS WITH ONKYO
PARTS WHOSE PART NUMBERS APPEAR AS SHOWN
IN THIS MANUAL.
MAKE LEAKAGE-CURRENT OR RESISTANCE
MEASUREMENTS TO DETERMINE THAT EXPOSED
PARTS ARE ACCEPTABLY INSULATED FROM THE
SUPPLY CIRCUIT BEFORE RETURNING THE
APPLIANCE TO THE CUSTOMER.
BD-SP308
A B C D E F G H
IMPORTANT SAFETY NOTE :
SCHEMATIC DIAGRAMS-1 WHEN SERVICING THIS CHASSIS, UNDER NO SCHEMATIC FOR EASY IDENTIFICATION. THIS 1. Shaded( ) parts are critical for safety. Replace only
1. SMPS - POWER CIRCUIT CIRCUMSTANCES SHOULD THE ORIGINAL DESIGN
BE MODIFIED OR ALTERED WITHOUT PERMISSION
CIRCUIT DIAGRAM MAY OCCASIONALLY DIFFER
FROM THE ACTUAL CIRCUIT USED. THIS WAY,
with specified part number.
2. Voltages are DC-measured with a digital voltmeter
FROM THE LG CORPORATION. ALL COMPONENTS IMPLEMENTATION OF THE LATEST SAFETY AND during Play mode.
SHOULD BE REPLACED ONLY WITH TYPES PERFORMANCE IMPROVEMENT CHANGES INTO
IDENTICAL TO THOSE IN THE ORIGINAL CIRCUIT. THE SET IS NOT DELAYED UNTIL THE NEW SERVICE
SPECIAL COMPONENTS ARE SHADED ON THE LITERATURE IS PRINTED.
1




No Power
2 D101,R101 are Defective



13VA No Power
D124 is Defective

S/W Error
IC101 is Defective




3




No Power 5.3VA No Power
D104 is Defective D126,D127 are Defective



4


No Power
F101 is Defective




CAUTION:
Danger if fuse is incorrectly replaced. Switching Error
5 Replace only with the type identical to fuse rating
and(or) model name described in main label. IC102,IC103 are Defective Warning
Parts that are shaded are critical with
respect to risk of fire or electrical shock.
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-2
2. MAIN - MAIN POWER CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-3
3. MAIN - CPU 1 CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-4
4. MAIN - CPU 2 CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-5
5. MAIN - CPU 3 CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-6
6. MAIN - DDR2, NAND, CP CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-7
7. MAIN - BCM7630 FRONT END CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-8
8. MAIN - AUDIO/VIDEO OUTPUT CIRCUIT


1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-9
9. FRONT - TIMER CIRCUIT
9-1. TOOL TIMER CIRCUIT
1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-10
9. FRONT - TIMER CIRCUIT
9-2. TOOL TIMER CIRCUIT
1




2




3




4




5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-11
10. WiFi - USB GPIO STRAP CIRCUIT
Vin5V

1
VDD5




1
C3
VDD3_3 22uF




2
BCM4323
U1A BCM4323 CRITICAL
H4 jtag_trst_l gpio0 F14
J4 D18 VDD3_3 F4 U1C E2 100MHZ
J1
tdi gpio1 avdd33 moncdr
J6 tdo gpio2 G13 VDD2_5 F6 avdd25 monpll E1 1 2 1 VCC
H1 tms gpio3 G14 VDD1_2A G7 avdd12 L4
J2 tck gpio4 D19 F2 vdd12pll dp D1 USB_P 3
USB_N D+
gpio5 E18 dm D2
J16 uart_rx gpio6 E19 J8 dgndpll rref F1 2 D-




1




1




1
K16 uart_tx gpio7 F16 C68 G6 agnd




1
gpio8 F18 C93 C90 4 GND




1
H6 sflash_c gpio9 G16 0.1uF 0.1uF 0.1uF B1 vmain_prsnt R21




2




2




2
G1 F19 C2 C4 HEADER 3
2 G4
sflash_q
extif_addr_21
gpio10
gpio11 G18 B3
pwr_ind
attn_bttn 100pF
4.02K




2
G2 extif_flash_cs_l gpio12 G19 C1 attn_ind




2
gpio13 H18
H2 ext_por_l gpio14 H16
L16 lv_testmode gpio15 H14
K6 test_se rf_disable_l L14




3

BCM4323
D4 U1G A4
pci_ad0 pci_cbe_l_0
A1 pci_ad1 pci_cbe_l_1 B8
A2 pci_ad2 pci_cbe_l_2 B12
B2 pci_ad3 pci_cbe_l_3 A16
D5 pci_ad4 pci_clk C19
A3 pci_ad5 pci_clkrun_l B10
D6 pci_ad6 pci_devsel_l D9
B4 pci_ad7 pci_frame_l A12
B5 pci_ad8 pci_gnt_l D14
A5 D13 VDD1_2A
pci_ad9 pci_idsel
B6 pci_ad10 pci_int_l D16
A6 pci_ad11 pci_irdy_l A10
B7 D10 VDD1_2A
pci_ad12 pci_par
4 D7 pci_ad13 pci_perr_l A8




1




1
A7 pci_ad14 pci_pme_l E4 C65
D8 pci_ad15 pci_req_l C18 C89




1
A11 pci_ad16 pci_rst_l D15 0.1uF 0.1uF



2




2
BCM4323 L3
B13 pci_ad17 pci_serr_l B9
A13 B11 T1 U1B 100MHZ
pci_ad18 pci_stop_l test_inip_1
A14 pci_ad19 pci_trdy_l A9 T2 test_inin_1 CRITICAL Pin name Netname Status
D11 pci_ad20 U1 test_inqp_1 vdd_iso_1p2 W18
B14 pci_ad21 cstschg E16 U2 test_inqn_1 vddpll N9




2
D12 pci_ad22 vdd_afe_1p2_0 R11 mimophy_core1_ant2_swctrl_1 VRXA1_1 ext PD
A15 pci_ad23 sprom_clk J18 V1 test_outip_1 vdd_afe_1p2_1 R6 mimophy_core1_ant1_swctrl_1 VRXA0_1 ext PU
B15 pci_ad24 sprom_cs H19 V2 test_outin_1 vdd_logen_1p2 R12
B17 pci_ad25 sprom_din K19 W1 test_outqp_1 vdd_logen_1p2 R7 mimophy_pa_cntrl_2g_1 PA_cntrl_2G_1 ext PU
B16 pci_ad26 sprom_dout J19 W2 test_outqn_1 vdd_lna_0_1p2 R13
A18 pci_ad27 vdd_lna_1_1p2 R8 mimophy_core0_ant1_swctrl_1 VRXA0_0 ext PU
1




1




1




1
A17 pci_ad28 R16 tssiin_0
B18 pci_ad29 R4 tssiin_1 vsspll L10 C79 C80 C81 C82 mimophy_ext_lna_2g_pu_0 xlna_cntl_2g_pu0 ext PU
A19 pci_ad30 0.1uF 0.1uF 0.1uF 1uF
2




2




2




2
B19 pci_ad31 V17 gpaio_a mimophy_core1_ant1_swctrl_2 VTXA0_1 ext PU
5
BD-SP308
A B C D E F G H
SCHEMATIC DIAGRAMS-12
11. WiFi - POWER & CONTROL CIRCUIT VDD3_3
CRITICAL
100MHZ
1 2
BCM4323
L1 VDD_RF_LDO U1E
R18 i_vdd3p3_rfl




1




1
VDD_RF_LDO P19 W14 RXG_0 5
1 C62 C83
o_vdd1p3_rf lna_p_g_0
lna_p_a_0 W13
RXG_0




1
0.1uF 1000pF/NI




2




2
C6 pa_p_g_0 W11 TXG_0 TXG_0 5
W10 VDD3_3
pa_p_a_0
4.7uF




2
VDD3_3 W8 RXG_1 5
lna_p_g_1 RXG_1




1
U13 env_det_g_0 lna_p_a_1 W7
U9 env_det_a_0 R15




1
U7 W5 TXG_1 5 VDD3_3
VDD3_3 VDD3_3
env_det_g_1 pa_p_g_1 TXG_1
R13 U3 env_det_a_1 pa_p_a_1 W4 4.7K
R57 VDD_RF_LDO 4.7K




2




1
1 2 VDD_RF_LDO P18 mimophy_core0_sharedant_ctrl mimophy_pa_cntrl_2g_0 K18




1




1
N2 mimophy_core1_sharedant_ctrl mimophy_pa_cntrl_5g_0 N18 R19




2
R12 R14 5 VRXA0_0 VRXA0_0 M19 mimophy_core0_ant1_swctrl1 mimophy_pa_cntrl_2g_1 J1 PA_CNTRL_2G_1
0
2




2




2 4.7K 4.7K 5 VTXA0_0 VTXA0_0 M18 mimophy_core0_ant1_swctrl2 mimophy_pa_cntrl_5g_1 K2 4.7K
R27 R26 R28 L19 mimophy_core0_ant2_swctrl1




2
10 49.9 10 L18 mimophy_core0_ant2_swctrl2 mimophy_ext_lna_2g_gain_0 P16




2




2
VRXA0_1 K1 mimophy_core1_ant1_swctrl1 mimophy_ext_lna_2g_pu_0 R15 XLNA_CNTL_2G_PU0
VTXA0_1 L2 mimophy_core1_ant1_swctrl2 mimophy_ext_lna_5g_gain_0 N16
1VDD_CP_1P2 1




1VDD_XTAL_1P21




1VDD_VCO_1P2 1




5 VRXA1_1 VRXA1_1 M2 mimophy_core1_ant2_swctrl1 mimophy_ext_lna_5g_pu_0 M16




1
5 VTXA1_1 VTXA1_1 L1 mimophy_core1_ant2_swctrl2 mimophy_ext_lna_2g_gain_1 K4
mimophy_ext_lna_2g_pu_1 L4
2 R24
4.7K
XTAL_IN
XTAL_OUT
T19
R19
xtal_in
xtal_out
mimophy_ext_lna_5g_gain_1
mimophy_ext_lna_5g_pu_1
M4
N4
T18 xtal_buf_out




2
C11 C7 C12 R32 BCM4323
4.7uF 4.7uF 4.7uF 1 2 U18 U1D
cal_res_ref
rgnd U14
2




2




2




14.7K rgnd U15
VDD_VCO_1P2 W19 U8
vdd_vco_1p2 rgnd
VDD_XTAL_1P2 U19 V10 VDD1_2A
vdd_xtal_1p2 rgnd
VDD_CP_1P2 VDD3_3 BCM4323
V19 vdd_cp_1p2 rgnd V11
V13 M1 U1F F12
rgnd i_vdd3p3_ldo vdd
R10 vdd_if_0_1p2 rgnd V14 F7 otp_vdd vdd F13




1




1
R14 vdd_txmix_0_1p2 rgnd V16 G9 vddio vdd L7




1
VDD3_3 R5 V4 C54 C20 H12 L8
vdd_if_1_1p2 rgnd vddio vdd




1




1




1
VDD1_2A R9 V5