Text preview for : Acer Ferrari 5000_Quanta_ZC3_RevB2A.pdf part of acer Acer Ferrari 5000 Quanta ZC3 RevB2A acer Acer Ferrari 5000_Quanta_ZC3_RevB2A.pdf



Back to : Acer Ferrari 5000_Quanta_ | Home

1 2 3 4 5 6 7 8
BOM
VRAM@ ->(Samsung,Infineon,Hynix)

ZC3 BLOCK DIAGRAM UC@ ->(ATMEL,SST)
MEMID@ ->(Samsung,Infineon,Hynix)
2@ ->Add second source
SYSTEM POWER
MAX1999
AMD K8/RX485/SB460 REV:B HOST 133/166MHz
Page 44



PCIE 100MHz CPU CORE(MAX8774)
Clock GEN VGA 96MHz Page 41
A
AMD S1 DDR II-SODIMM1 A
CPU THERMAL USB 48MHz
SENSOR Page 7,8 ICS951462 PCI 33MHz
Page 13 Turion 64 DDR II
+1.2V/+1.5V/+2.5V
Page 2 REF 14MHz
533,667MHz Page 42
(638 S1g1 socket)
DDR II-SODIMM2
Page 3,4,5,6 Page 7,8
+1.8V / VGA_CORE
R,G,B CRT port Page 26 Page 43,46
HyperThansport I/O BUS
LINK 16X16
2X PCI-E 0,1 ATI LCD LCD CONN DISCHARGE CIRCUIT
Page 25
DOCKING PORT
Page 32 M56-P
PCIE 16X Page 44
NORTH BRIDGE TV-OUT S-VIDEO Page 25
Mini Card/WLAN 1X PCI-E 3 RX485 Page
18,19,20,21,22,24
B
Page 29
465 FCBGA
TMDS HDMI B
Page 34
1X PCI-E 2
Page 9,10,11,12 PCI DEVICE IDSEL# REQ# / GNT# Interrupts CLOCK
New Card
VRAM X4
GDDR3 500MHZ TI 7412 AD25 REQ0# / GNT0# INTE#,F#,G# PCICLK2
Page 33 USB 2.0 * 1(USB5)
A-LINK Page 23
BCM5788M AD20 REQ2# / GNT2# INTH# PCICLK5
PCI/33MHz
USB PORT X4 USB 2.0 * 4(USB0 ~ 3)
Azalia
Page 29



BLUETOOTH USB 2.0 * 1(USB6) SOUTH BRIDGE
AUDIO CODEC MDC1.5 CARDBUS/1394/Card reader Giga LAN
Page 29 SB460 ALC883 MODEM TI 7412 Broadcom
549 BGA BCM5788MG
Page 36 Page 36 Page 30,31 Page 27
C
1.3M Camera Module USB 2.0 * 1(USB7) C

Page 25
HP AMP SPK AMP
RJ11 PCMCIA 1394 6 in 1 RJ45
Page 14,15,16,17 Page 37 Page 37 Page 45 Cardreader Page 28
USB0: M/B IO Page 31 Page 30 Page 31
USB1: M/B IO
USB2: D/B IO
Primary IDE
LPC/33MHZ




USB3: D/B IO
USB4: SATA PCI-Express X 2
USB5: NEW CARD
HDD Page 35 RTC HP/ INT Line-in EZ4 Docking
USB6: BLUETOOTH Battery SPK & MIC
USB7: CAMERA Page 14 SPDIF Connector TV out / CRT Switch
Page 37 Page 37 Page 37 Page 25,26
Media bay ATA 66/100
CDROM PCIE1~2 , Lan
Page 35 Ser & Par Port Audio Switch
Page 37
PS2 , VGA, DVI
SPDIF,SM BUS DVI Switch
Page 34
SUPER I/O Embedded Controller
PC87383 NS 551 Page 32
D 10/100/1G Switch D

Page 38 Page 39 Page 28



PROJECT : ZC3
Quanta Computer Inc.
FIR BIOS Keyboard Touchpad SWITCH & LED FAN Size Document Number Rev
Page 38 Page 39 Page 40 Page 40 Page 40 Page 13 Custom BLOCK DIAGRAM B2A

Date: Thursday, June 08, 2006 Sheet 1 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1




+3V
CLK_VDD +3V
L104 BK1608HS600_6 L45 BK1608HS600_6
CLK_VDDA

22 ohm/1A
C949 C582 C618 C620 C619 C621 C583 C585 C584 C570 C560
22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 22U/10V_8




D D




1- PLACE ALL SERIAL TERMINATION +3V
L105 BK1608HS600_6 CLK_VDD
RESISTORS CLOSE TO U800
CLK_VDD_USB U49
2- PUT DECOUPLING CAPS CLOSE TO SBSRCCLK ->SB PCIE CLK
Clock Gen.POWER PIN 300ohm/200mA 54 VDDCPU VDDA 50 CLK_VDDA
SBLINK_CLKP ->NB A-Link clock
C970 C976 14 49 R622 261/F_4
1U/10V_4 .1U_4 VDD_SRC1 GNDA NBSRC_CLKP ->NB PCI-E graphic clock
23 VDD_SRC2
28 56 CPUCLK_EXT_R R639 47/F_6
VDD_SRC3 CPUCLK8T0 CPUCLK 5
44 55 CPUCLK#_EXT_R R638 47/F_6
+3V VDD_SRC4 CPUCLK8C0 CPUCLK# 5
5 VDD_48 CPUCLK8T1 52
L106 BK1608HS600_6 39 51
CLK_VDD_REF VDD_ATIG CPUCLK8C1
2 VDD_REF
60 47 SBLINK_CLKP_R R645 33/F_4
VDDHTT SRCCLKT0 SBLINK_CLKP 11
300ohm/200mA SRCCLKC0 46 SBLINK_CLKN_R R644 33/F_4
SBLINK_CLKN 11
C977 C971 53 43 SBSRC_CLKP_R R643 33/F_4
GND_CPU SRCCLKT1 SBSRCCLK 14
1U/10V_4 .1U_4 15 42 SBSRC_CLKN_R R642 33/F_4
GND_SRC1 SRCCLKC1 SBSRCCLK# 14
22 41 NBSRC_CLKP_R R641 33/F_4
GND_SRC2 ATIGCLKT0 CLK_PCIE_M56 18
29 40 NBSRC_CLKN_R R640 33/F_4
GND_SRC3 ATIGCLKC0 CLK_PCIE_M56# 18
Parallel Resonance Crystal 45
8
GND_SRC4 ATIGCLKT1 37
36 D3A:change NBSRC
C964 33P_4 GND_48 ATIGCLKC1
CLK_VDD
38 GND_ATIG ATIGCLKT2 35 to ATIG
1 GND_REF ATIGCLKC2 34




2
58 30 GPP_CLK1P_R R708 33/F_4
GNDHTT ATIGCLKT3 NBSRC_CLKP 11
R685 31 GPP_CLK1N_R R707 33/F_4
ATIGCLKC3 NBSRC_CLKN 11
R376 *1M_4 CLK_XIN 3 26 GPP_CLK0P_R R706 33/F_4
XIN SRCCLKT2 CLK_PCIE_MINI_A 29
27 GPP_CLK0N_R R705 33/F_4
CLK_PCIE_MINI_A# 29




1
C 10K_4 C939 33P_4 CLK_XOUT_RR678 0_4 CLK_XOUT SRCCLKC2 C
4 XOUT SRCCLKT3 24 T174
Y9 25
14.31818MHZ SRCCLKC3 GPP_CLK2P_R R710 T175 33/F_4
SRCCLKT4 20 CLK_PCIE_NEW 33
21 GPP_CLK2N_R R709 33/F_4
SRCCLKC4 CLK_PCIE_NEW# 33
B2A:Delete SYS_RST# 11 RESET_IN# SRCCLKT5 18 GPP_CLK3P_R R712 33/F_4
CLK_PCIE_EZ1 32
61 19 GPP_CLK3N_R R711 33/F_4
NC SRCCLKC5 CLK_PCIE_EZ1# 32
B2A:Stuff R376 for RESET_IN# SRCCLKT6 16 GPP_CLK4P_R R714 33/F_4
CLK_PCIE_EZ2 32
+3V 17 GPP_CLK4N_R R713 33/F_4
SRCCLKC6 CLK_PCIE_EZ2# 32
SRCCLKT7 12 T176
SRCCLKC7 13 T177




R626

R627
R627

R729

R730

R727

R728

R725
R725

R726

R723

R724
R724

R721

R722

R624

R625

R628
R628

R629
Q43 9 57 R646 0_4
7 SMBCK SMBCLK CLKREQA# EZ_CLKREQ# 32,39
10 32 R695 0_4
7 SMBDT SMBDAT CLKREQB# NEW_CLKREQ# 33
*2N7002E-LF R704 R387 33
CLKREQC# T148
2




49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4
*10K_4 *10K_4
48 7 CLK_48M_1_R R731 *33/F_4
SMBDT IREF 48MHz_1 CLK_48M_2_R R715 33/F_4 T155
15,29,32,33 PDAT_SMB 3 1 Ioh = 5 * Iref 48MHz_0 6 USBCLK 15
(2.32mA) R343
R735 0_4 Voh = 0.71V @ 60 ohm 475/F_4
FS1/REF1 63 CLKREQA# Controls SRC5,6,7
FS0/REF0 64 CLKREQB# Controls SRC2,3,4,ATIG3 CLK_VDD
+3V 62
FS2/REF2 CLKREQC# Controls SRC0,1,ATIG0,1,2
HTTCLK0 59
Q23
2




*2N7002E-LF R634 R636 R632
ICS951462 2.2K_4 2.2K_4 2.2K_4
3 1 SMBCK
15,29,32,33 PCLK_SMB
R650 8.2K_4 R633 *0_4
R391 0_4 R652 8.2K_4 R635 *0_4
B R648 8.2K_4 R631 *0_4 B


D3A:remove R820 , docking SB_OSCIN_R R651 33/F_4
SB_OSCIN 11,15 14.318MHz
side already pull low 10K
R653 33/F_4 14.318MHz
EXT CLK FREQUENCY SELECT TABLE(MHZ) SIO_14M 38
NB_OSCIN_R R649 33/F_4 14.318MHz
NB_OSC 11
FS2 FS1 FS0 CPU SRCCLK HTT