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6/29/85
Programmers Model for the Big Mac
Introduction
This document describes the Big Mac from the programmers view of
the machine which includes a description of the address space map, the
system registers and the decoding of the I/O devices and their registers.
The Big Mac MMU and decoding logic maps the 32 bit address space of the
68020 into two address spaces, one for RAM and the other for Screen, ROM
and I/O. There exists a 5 bit register named the High Decode Map register
which controls the position of the ROM and provides a mechanism to limit
the number of address bits used for decoding logical addresses. The HOM
register can'$rogrammed to cause the high address bits (those above A23)
to be significant to the decoding hardware. This allows a range of address
space sizes from 24 to 32 bits. In the smallest configuration, the address
space is limited to 16Mb and the upper eight bits are insignificant to
decoding which will allow software to use the upper eight bits as tags. In
the largest configuration, the address space is 4Gb and none of upper bits
are available. ~--==:::::::::::::==-:--
__
Address S pace Map
CJ (.
:J
~
The address space map is determined by the 5 bit HOM register and
the FC2 signal (ie. user/supervisor bit from the 68020). See the following
page for drawings of the supervisor and user state address space maps.
There are five configurations which are defined as follows:
.EQg HOO !-Dy14 tpv15 VMsize RAMsize t>S.LQr RaJ! SCREEN
1 x x x 16Mb 10Mb A23
o 1 1 16Mb -- 8Mb A23
o o ,. 1 '1 32Mb 16Mb A24 *A23
o o o 1 512Mb 256Mb A28* A24 * A23
o o o o 4Gb ---