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5 4 3 2 1
D D
LKB-ADDs, Plus Schematic
REV : A02
C C
@ : Depop Component for All
1@ : Pop Component for Lindbergh Series
2@ : Pop Component for Kapalua series
3@ : Depop Component for Lindbergh Plus series
4@ : Pop Component for Lindbergh Plus series
B B
DDQ12/LA1901 Schematic with Capture CIS and Function field
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uFCPGA Banias
01-02-2004
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A A
REV: 3.0
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DELL CONFIDENTIAL/PROPRIETARY
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Compal Electronics, Inc.
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Title
Cover Sheet
in
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Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
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Date: Wednesday, January 07, 2004 Sheet 1 of 59
5 4 3 2 1
5 4 3 2 1
Compal confidential
Block Diagram
D
Banias D
ADM1032 Thermal sensor
page 13
uFCPGA CPU
page 7,8,9
Fan Control
page 13
HA#(3..31) HD#(0..63)
System Bus Memory
400MHz
CRT CONN.
BUS(DDR)
& TV-OUT 2.5V 100 / 133 / 166MHz
VGA page 17
ODEM-2 PC1600 / PC2100 / PC2700 SO-DIMM X2
BANK 0, 1, 2, 3 page 14,15
Board MCH-M
AGP4X(1.5V) Clock Generator
593 FC-BGA
AGP CONN. page CK408
10,11,12
C page 6 C
page 16
HUB Link
DOCKING MINI PCI 1.8V DC IN page
66MHz 42
DOCKING BUFFER 266MB/S
PORT 33
PAGE PAGE 32 page 31
BATT page
USB 3.3V 24.576MHz AC-LINK 43
PCI BUS IN
ICH4-M MDC
3.3V ATA100 page 26
421 BGA 1.2V/1.8V page
IDSEL:AD20 3.3V 33MHz ATA100 44
(PIRQA/B#,GNT#2,REQ#2) AC97
page Codec
LAN CardBus Controller 18,19,20,21 ATA100 1.5V/1.05V(+VCCP)
B STAC9750 B
page 23
BCM5705M PCI7510 / 4510 page 45
BCM4410 HDD
page 27 page 29
CDROM AMP& Phone 1.25V/2.5V page
page 19 46
Transformer Slot 0 LPC BUS USB Jack
1394, Smart 3.3V 33MHz
page 28 USB page 24
card page30 FDDpage 22 VCORE
page30
USBPORT 0 BACK page 47
RJ45 X BUS Macallen 48MHz / 480Mb
page 28 USBPORT 1
LPC to X-BUS BT 5V/3.3V
& Super I/O USB2.0 USBPORT 2
page BACK page 48
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USBPORT 3
SST39VF080 34,35
page 22 DOG
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page 25 USBPORT 4
CHARGER
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page 36 COM LPT page 26
MOD page
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USBPORT 5 49,50 A
page 33
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page 37 page 37 DOCK
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DELL CONFIDENTIAL/PROPRIETARY
in
Touch Pad Int.KBD Compal Electronics, Inc.
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page 36 Title
page 36
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Block Diagram
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 2 of 59
5 4 3 2 1
5 4 3 2 1
D D
PM TABLE USB TABLE
C
+5VRUN C
+3VRUN PCI TABLE
USB PORT# DESTINATION
power +3VALW +3VSUS +1.8VRUN
plane +5VALW +5VSUS +1.5VRUN
PCI DEVICE IDSEL REQ#/GNT# PIRQ
+2.5V_MEM +1.2VRUN
+1.5VSUS +VCC_CORE
0 BACK
State
+VCCP
CARD BUS AD17 1 D,C
+12V 1 BLUETOOTH
S0 ON ON ON
LAN AD16 4 C 2 BACK
S1 ON ON ON
DOCK AD24 0 B 3 DOG
S3 ON ON OFF
S5 S4/AC ON OFF OFF
MINI PCI AD19 3 D,B(NP) 4 MOD
B
S5 S4/AC don't exist OFF OFF OFF VGA A,B(NP) DOCK B
5
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DELL CONFIDENTIAL/PROPRIETARY
in
Compal Electronics, Inc.
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Title
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Index and Config.
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 3 of 59
5 4 3 2 1
5 4 3 2 1
RBAT
D D
ADAPTER +RTC_PWR +5VALW +5VSUS
+RTCSRC
PWR_SRC
+3.3VRTC +3VALW +3VSUS
BATTERY
DOCK _PWR_SRC
C C
SUSPWROK_5V
SUSPWROK_5V
SUS_ON
SUS_ON
RUNPWROK
RUNPWROK
EN_12V
+5VSUS +3VSRC +2.5VMEMP +VCCP +VCC_CORE +1.5VSUS +12V
PJP8,PJP10
ENAB_1.25V
RUN_ON
B B
RUN_ON RUN_ON
SUSPWROK_5V
+5VHDD +5VMOD +5VRUN VDDA +3VRUN V3P3LAN +3VSUS +2.5V_MEM V_1P25V_DDR_VTT +1.5VRUN
RUNPWROK
RUN_ON
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A A
+1.2VRUN +1.8VRUN
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DELL CONFIDENTIAL/PROPRIETARY
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Compal Electronics, Inc.
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Title
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Power Rail
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 4 of 59
5 4 3 2 1
5 4 3 2 1
+3VRUN
ICH_SMBCLK CK_SCLK
7002
D
+3VSUS CLK GEN. D
ICH4 ICH_SMBDATA CK_SDATA
7002
DIMM0 DIMM1 LAN_SMBCLK
7002 7002
LOM
LAN_SMBDATA
7002 7002
CLK_SMB V_3P3_LAN
7002
DAT_SMB +3VALW MPCI
7002
C C
24C05 ADM1032 DH PORT
DOCK_SMB_CLK
SIO DOCK_SMB_DAT +5VALW DOCKING
Macallen
SBAT_SMBCLK
SBAT_SMBDAT +5VALW 2'nd
BATTERY
B B
VGA
PBAT_SMBCLK
1'nd
PBAT_SMBDAT +5VALW BATTERY
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A A
CHARGER
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DELL CONFIDENTIAL/PROPRIETARY
in
Compal Electronics, Inc.
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Title
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SMBUS TOPOLOGY
Size Document Number Rev
3.0
DDQ12/11/01 with LA-1901
Date: Wednesday, January 07, 2004 Sheet 5 of 59
5 4 3 2 1
5 4 3 2 1
Place near each pin
+3VRUN CK_VDD_MAIN W>40 mil
+3VRUN CK_VDD_MAIN
1 2
100K_0402_5%~L
100K_0402_5%~L
2 1 1 1 1
1
1
L33 C89 C94 C91 C87 C85
BLM21PG600SN1D_0805~L
R57
R61
10U_1206_6.3V7K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L
1 2 2 2 2
2
2
ICH_SMBDATA 1 3 CK_SDATA
D
S
D <<14,15,19,31>> ICH_SMBDATA D
Q6
2N7002_SOT23~L
1 1 1 1
G
2
C88 C92 C83 C82
+3VRUN
0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L 0.1U_0402_10V6K~L
2 2 2 2
2
Q8
G
2N7002_SOT23~L
ICH_SMBCLK 1 3 CK_SCLK
<<14,15,19,31>> ICH_SMBCLK
D
S
U8
D 1
VDD_REF PCICLK_F0
5
8
VDD_PCI
1 14
VDD_PCI PCICLK_F1
6
19
VDD_3V66 PCICLK_F2 R88 2 CK_33M_ICHPCI
G 2 3 S 32
VDD_3V66 PCICLK_F2
7 1
33_0402_5%~L
CK_33M_ICHPCI <<18>>
46
VDD_CPU
50
W=20 mils VDD_CPU
2N7002 37
VDD_48MHZ
L29 10
BLM11A601S_0603~L PCICLK0
1 2 CLK_VDD_CORE 26 11 PCICLK1 1 R83 2 CK_33M_SIOPCI
+3VRUN VDD_CORE PCICLK1 CK_33M_SIOPCI <<35>>
33_0402_5%~L
12 PCICLK2 1 R81 2 CK_33M_LANPCI
PCICLK2 CK_33M_LANPCI <<27>>
1 1 33_0402_5%~L
C81 C80 13 PCICLK3 1 R79 2 CK_33M_DOCKPCI
PCICLK3 CK_33M_DOCKPCI <<32>>
33_0402_5%~L
10U_1206_6.3V7K~L 0.1U_0402_16V4Z~L 16
C 2 2 PCICLK4 C
17 PCICLK5 1 R72 2 CK_33M_CBPCI
PCICLK5 CK_33M_CBPCI <<29>>
27 33_0402_5%~L
GND_CORE 18 PCICLK6 R68 2 CK_33M_MINIPCI
1
CK408 PCICLK6 33_0402_5%~L