Text preview for : Compal_LA-4892P.pdf part of Compal Compal LA-4892P Compal Compal_LA-4892P.pdf
Back to : Compal_LA-4892P.pdf | Home
A B C D E
1 1
Compal Confidential
2
Schematics Document 2
AUBURNDALE with Intel
IBEX PEAK-M core logic
3
Dior UMA 3
2009-05-16
REV:0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C u stom LA-48 92P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 15, 2009 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential
File Name : Dior UMA
Fan Control
Dior UMA XDP Conn.
Page 4
Accelerometer
LIS302DLTR
Page 4
LCD conn 21
Page
Mobile Page 26
1 C RT 1
Page 20
CPU Dual Core DDR3 1066/1333MHz 1.5V DDR3-SO-DIMM X 2
BANK 0, 1, 2, 3 Page 9,10,11
CRT to Docking Socket-rPGA989
Page 28 Dual Channel
37.5mm*37.5mm
Page 4,5,6,7,8
DP conn
Page 19
CK505
FDI DMI X4 Clock Generator
DP to Docking xSLG8SP585
Page 28
Page 12
USB x2(Docking)Page 28
USB x2(Sub/B) Page 26
2
Express Card 54 WWAN Card 2
Sub-board USB2.0 FingerPrinter VFM451 daughter board
Page 29 Page 24
Intel Ibex Peak M USBx1 Page 27
Azalia
USB conn x 2(For I/O)
PCI-E BUS 1071pins BT Conn USB x 1Page 29
25mm*27mm SATA0
USB x1(Camara)
SATA1 Page 21
10/100/1000 LAN 1394/Card Reader
Page 13,14,15,16,17,18
Marvell WLAN Card
Sub-board MDC V1.5 RJ11
88E8059/88E8072 Page 24 ONFI Interface Page 25 Page 25
Page 22 Page 29
Braidwood Audio CKT 92HD75 TPA6047A
Sub-board Page 29 AMP & Audio Jack Page 29
Page 19
RJ45 CONN
3
1394 port S D/MMC/ 3
Page 24
MS/XD Slot SATA ODD Connector
Page 19 Page. 28
NAND card Docking CONN.
2.5" SATA HDD Connector (2) PS/2 Interfaces
LPC BUS Page 19 (2) USB 2.channels
(2) SATA Channels
RTC CKT. (2) Display Port Channels
LED (1) Serial Port
Page 28 Page 28 (1) Parallel Port
(1) Line In
(1) Line Out
Super I/O (1) RJ45 (10/100/1000)
Power OK CKT. TPM1.2 SMSC KBC
SLB9635TT LPC47N217 (1) VGA
Page 31 Page 31 (1) 2 LAN indicator LED's
Page 27 1098 page 30
(1) Power Button
C OM1 L PT (1) I2C interface
4
Power On/Off CKT. Touch Pad CONN. Int.KBD ( Docking ) ( Docking )
4
Page 29 Page 28 Page 28
Page 24 Page 25
TrackPoint CONN.
Page 25
Security Classification Compal Secret Data Compal Electronics, Inc.
2008/10/31 2009/11/06 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Page 32 SPI ROM AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Size Document Number
Cu stom LA-48 92P
R ev
0.3
4MB Page 27 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 15, 2009 Sheet 2 of 45
A B C D E
A
( O MEANS ON X MEANS OFF )
Voltage Rails Symbol Note :
+RTCVCC +B +5VALW +1.5V +5VS : means Digital Ground
+3VL +3VALW +0.75V +3VS
+1.5VS
power
plane +VCCP : means Analog Ground
+CPU_CORE
+1.05VS
+1.8VS
State
Install below 43 level BOM structure for ver. 0.2
8072@ : Install for 8072 NIC controller
S0 O O O O O
S1 O O O O O
S3 O O O O X
S5 S4/AC O O O X X
Install below 45 level BOM structure for ver. 0.2
S5 S4/ Battery only O O X X X 45@ : means just put it in the BOM of 45 level.
S5 S4/AC & Battery O
1
don't exist X X X X 1
Reserve below BOM structure for ver. 0.2
@ : means just reserve , no build
CONN@ : means ME part.
8059@ : Install for 8059 NIC controller
SMBUS Control Table
THERMAL
SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR
SMB_EC_CK1
SMB_EC_DA1
SMSC1098
V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V V X V
SML0CLK
SML0DATA
Calpella X X X X X X X X X
SML1CLK
SML1DATA
Calpella X X X X X X X V X
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Cu s tom LA-48 92P 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, May 15, 2009 Sheet 3 of 45
A
5 4 3 2 1
Layout rule10mil width trace +VCCP
length < 0.5", spacing 20mil PM_EXTTS#0 1 2 +VCCP
JCPU1B R1 10K_0402_5%
20_0402_1% 1 R2 2 COMP3 AT23 COMP3
PM_EXTTS#1 1 2
A16 R7 10K_0402_5%
BCLK CLK_CPU_BCLK 16
MISC
20_0402_1% 1 R9 2 COMP2 AT24 COMP2 BCLK# B16 CLK_CPU_BCLK# 16
CLOCKS
49.9_0402_1% 1 R3 2 COMP1 G16 AR30 CLK_CPU_XDP
COMP1 BCLK_ITP CLK_CPU_XDP#
BCLK_ITP# AT30
49.9_0402_1% 1 R5 2 COMP0 AT26 XDP_TDO 1 2
COMP0 R6 51_0402_5%
PEG_CLK E16 CLK_EXP 14
D16 This shall place near XDP
PEG_CLK# CLK_EXP# 14 +1.5V
PAD T1 TP_SKTOCC# AH24 SKTOCC#
DPLL_REF_SSCLK A18
D A17 VDDPW RGOOD_R 1 2 D
H_CATERR# DPLL_REF_SSCLK# R12 1.1K_0402_1% 12/05 HP
AK14 CATERR#
THERMAL
11/10 HP 1 2
R13 3K_0402_1%
SM_DRAMRST# F6 DRAMRST# 9,10
16 H_PECI 1 R14 2 H_PECI_ISO AT15 PECI
09/04/07 Intel
0_0402_5% AL1 SM_RCOMP0
SM_RCOMP[0] SM_RCOMP1
AM1
1 R15 2 H_PROCHOT#_D AN26
SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP2 XDP Connector
42 H_PROCHOT# PROCHOT#
0_0402_5% AN15 PM_EXTTS#0 T91 PAD
PM_EXT_TS#[0]
DDR3
MISC
AP15 PM_EXTTS#1 1 2 from DDR XDP_PREQ# JP1
PM_EXT_TS#[1] PM_EXTTS#1_R 9,10
R17 0_0402_5% XDP_PRDY# 1 2
GND0 GND1
16 H_THERMTRIP# 1 R19 2 H_THERMTRIP#_R AK15 XDP_BPM#0 R870 1 2 0_0402_5% 3 4 CFG8 5
0_0402_5% THERMTRIP# R871 @ OBSFN_A0 OBSFN_C0
5 CFG12 1 2 0_0402_5% 5 OBSFN_A1 OBSFN_C1 6 CFG9 5
XDP_BPM#1 R872 1 2 0_0402_5% 7 8
XDP_PRDY# R873 @ XDP_BPM#0_R 9 GND2 GND3
AT28 5 CFG13 1 2 0_0402_5% 10 CFG0 5
PRDY# XDP_PREQ# XDP_BPM#1_R OBSDATA_A0 OBSDATA_C0
AP27 11 12 CFG1 5
PREQ# XDP_BPM#2 R874 1 OBSDATA_A1 OBSDATA_C1
2 0_0402_5% 13
GND4 GND5
14
AN28 XDP_TCK R875 1 @ 2 0_0402_5% XDP_BPM#2_R
15 16
TCK 5 CFG14 OBSDATA_A2 OBSDATA_C2 CFG2 5
H_CPURST# 1 R18 2H_CPURST#_R AP26 AP28 XDP_TMS XDP_BPM#3 R876 1 2 0_0402_5% XDP_BPM#3_R
17 18
RESET_OBS# TMS OBSDATA_A3 OBSDATA_C3 CFG3 5
PWR MANAGEMENT
0_0402_5% AT27 XDP_TRST# R877 1 @ 2 0_0402_5% 19 20
TRST# 5 CFG15 GND6 GND7 +3VS
JTAG & BPM
5 CFG17 21 22 CFG10 5
OBSFN_B0 OBSFN_D0
15 H_PM_SYNC 1 R20 2 H_PM_SYNC_R AL15 AT29 XDP_TDI 11/14 HP
5 CFG16 23 24 CFG11 5
0_0402_5% PM_SYNC TDI XDP_TDO 12/03 HP +VCCP OBSFN_B1 OBSFN_D1 2009/03/31 HP
AR27 25 26
TDO XDP_TDI_M XDP_BPM#4 GND8 GND9
AR29 27 28 CFG4 5
TDI_M OBSDATA_B0 OBSDATA_D0
2
H_CPUPW RGD 1 R21 2 VCCPW RGOOD_1 AN14 AP29 XDP_TDO_M XDP_BPM#5 29 30
VCCPWRGOOD_1 TDO_M OBSDATA_B1 OBSDATA_D1 CFG5 5
0_0402_5% 1 31 32 R22
XDP_DBRESET# XDP_BPM#6 GND10 GND11
AN25 33 34 CFG6 5 1K_0402_5%
DBR# OBSDATA_B2 OBSDATA_D2
16 H_CPUPW RGD 1 R23 2 VCCPW RGOOD_0 AN27 VCCPWRGOOD_0
C1 R24 XDP_BPM#7 35
OBSDATA_B3 OBSDATA_D3
36 CFG7 5
0_0402_5% 0.1U_0402_10V6K 1K_0402_5% 37 38
1
XDP_BPM#0 2 H_CPUPW RGD 1 GND12 GND13
BPM#[0]
AJ22 @ 2 H_CPUPW RGD_R 39
PWRGOOD/HOOK0 ITPCLK/HOOK4
40 CLK_CPU_XDP
C 1 R25 2 VDDPW RGOOD_R AK13 AK22 XDP_BPM#1 PM_PW RBTN#_R 41 42 CLK_CPU_XDP# C
15 PM_DRAM_PW RGD SM_DRAMPWROK BPM#[1] 15 PM_PW RBTN#_R HOOK1 ITPCLK#/HOOK5
0_0402_5% AK24 XDP_BPM#2 43 44 +VCCP
BPM#[2] XDP_BPM#3 H_PW RGD_XDP 1 VCC_OBS_AB VCC_OBS_CD XDP_RST#_R H_CPURST#
AJ24 2 45 46 1 2
BPM#[3] XDP_BPM#4 R26 0_0402_5% HOOK2 RESET#/HOOK6 XDP_DBRESET# R27 1K_0402_5%
32 VTTPWRGOOD AM15 AJ25 47 48 XDP_DBRESET# 13,15
VTTPWRGOOD BPM#[4] XDP_BPM#5 HOOK3 DBR#/HOOK7
AH22 49 50
BPM#[5] XDP_BPM#6 GND14 GND15 XDP_TDO
AK23 PAD T127 51 52
H_PW RGD_XDP 1 R29 BPM#[6] SDA TD0
2 H_PW RGD_XDP_R AM26 AH23 XDP_BPM#7 PAD T128 53 54 XDP_TRST#
0_0402_5% TAPPWRGOOD BPM#[7] 12/05 HP SCL TRST# XDP_TDI
55 56
XDP_TCK TCK1 TDI XDP_TMS
57 58
PLT_RST#_R TCK0 TMS
16 BUF_PLT_RST# 1 R30 2 AL14 59 60
1.5K_0402_1% RSTIN# GND16 GND17
SAMTE_BSH-030-01-L-D-A CONN@
1
XDP_RST#_R 1 @ 2 PLT_RST#