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A B C D E




MODEL NAME : Viking 18
1
PCB NO : LA-9332P 1



BOM P/N : 4619KU31L01




Compal Confidential
2 2




Viking 18
Schematic Document
Rev: X02

3
2012-11-19 3




@ : Nopop Component




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/05/14 Deciphered Date 2013/05/13 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
\\tperdfs1\CIS\SPEC\BAS40-04_SOT23-3.pdf
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, December 14, 2012 Sheet 1 of 56
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A B C D E




FFS Fan Control CPU XDP
LVDS Mux LVDS Mux eDP to LVDS LNG3DMTR 94.P ADM1032 45.P Conn. 6.P
2-lane eDP
LVDS Conn. PI3LVD1012 PI3LVD1012 RTD2136 Intel
33.P 24.P 14.P 04.P
1 HDMI Haswell 1



DP1.1 Processor
DP/HDMI
HDMI to LVDS SW 4C 47W/57W Memory Bus DDRIII
Dual Channel 204pin DDRIII SO-DIMM x4
STDP6038 Scoket G3
73.P PEGx 8 BANK 0, 1, 2, 3 ,41 ,31 ,21.P
51
Gen 3 rPGA-947 1.35V DDRIII 1600 MHz
LVDS
MXM III
HDMI Redriver HDMI Conn.
PS121 73.P
,01 ,9 ,8 ,7 ,6 ,5.P
11
DP1.2
DMI x4
PEGx 8 100MHz
DP/HDMI
HDMI Redriver HDMI MUX 61.P Gen 3 5GT/s
PS121 PS8271 USB3.0 Rediver
63.P 63.P USB3.0
USB 2.0
PS8713 25.P
USB 3.0/USB 2.0 Conn.
( USB Charger Port ) 25.P
HDMI 1.3 Input
HDMI 1.4a Output
HDMI SW MXM III USB3.0 Rediver
USB3.0
2 Conn. TS3DV621 53.P Conn. USB 2.0
PS8713 25.P
USB 3.0/USB 2.0 Conn. 2
53.P 25.P
71.P
USB3.0
USB 2.0
USB 3.0/USB 2.0 Conn.
miniDP Conn. DP Redriver mDP MUX 25.P

PS8330 MAX14998
Intel
03.P 13.P 13.P
USB3.0
USB 2.0 USB 3.0/USB 2.0 Conn.
35.P
Mini Card #1(Half) USB2.0
WLAN/WiMax PCI-E 2.0
Lynx Point
USB2.0
BT4.0+LE/WiGig Digital Camera 75.P
15.P
HDMI Redriver HDMI MUX PCH
USB2.0 AlienFX/ELC
PS121 PS8271
HM87
93.P 93.P 94,84.P
DMC
USB2.0
Display MiniCard
PCI-E 2.0 BGA 695 Balls
15.P

SATA 3.0 SATA Rediver HDD Conn. 1
3
LAN(GbE) PCI-E 2.0 PS8520BT 94.P
94.P
3

RJ45 Conn. E2201 Killer
64.P 64.P SATA 3.0 SATA Rediver HDD Conn. 2
PS8520BT 94.P
94.P

Card Reader PCI-E 2.0 HDDBay (In place
In ODD
Conn. 3 of ODD)
9 in 1 Conn. RTS5209 05.P
SATA 3.0 SATA Rediver ODD Conn.
Card Reader Board PS8520BT 05.P
05.P
SATA 3.0
Mini Card #3(Full)
,42 ,32 ,22 ,12 ,02 ,91 ,81 ,71.P
52
mSATA 05.P


SPI ROM SPI
LPC Bus Front L/R + HP1 +MIC
8MB 02.P HD Audio 74.P
RTC conn.
Center/Subwoofer + HP2
ENE KC3810 ENE KB9012 Audio Codec 74.P

Power On/Off CKT. 34.P 34.P ALC3661
55.P
Rear L/R 74.P Audio Daughter Board
4 4
DC/DC Interface CKT. 74.P Array Mics
65.P 75.P

VPK MCU Int.KBD Touch Pad
Power Circuit DC/DC
94.P
Subwoofer TI Int. Speaker (2.5W*2)
73.P VPK Daughter Board TI TPA3111D 84.P TPA3113D2 84.P 84.P

Security Classification Compal Secret Data
Issued Date 2012/02/28 Deciphered Date 2013/02/27 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-9332P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, December 14, 2012 Sheet 2 of 56
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A B C D E




Compal Confidential
Project Code : VAS10
File Name : LA-9332P
1 1
Camera



44 pin LCD Panel
LA-9332P M/B
Coaxial/Wire Combo
FFC B To B conn.
LS-9335P LS-933GP LS-933FP 20 pin HDD3/ODD
Coaxial
POWER BUTTON/B Audio /B
HDD in ODD Bay Cable
on/off SW
Hall Sensor /B 4 pin 22pin

Led x 1
LS-933HP
6pin
Wire Right Tron Light

FFC
2 LS-933IP 2
6 pin 6pin
Wire Left Tron Light
LS-9336P
LS-9337P
INDICATOR/B
CardReader /B LS-933JP
Led-HDD
6pin
Wire Front Right Tron Light
Led-Wireless
Led-CapsLock FFC FFC HDD conn.
20 pin 30 pin LS-933KP
6pin
Card Slot
20pin Wire Front Left Tron Light



FFC FPC
60 pin Wire 20 pin
12pin
KSI/KSO
LS-9338P
30 pin PWM HDD1/HDD2
3 VPK Daughter/B Hot Key LS-XXXXP 3
6 pin
VPK Keyboard
VPK MCU MAX7313
10 pin LOGO /B
40 pin Key Pad
Led x 2

Backlight / 8 Pressure-sense Analog Signals FFC
16 pin Wire Wire Wire
6pin 6pin 6pin

LS-9333P LS-9331P LS-9332P
Touch Pad
Alien Slits-R Light/B Alien head badge/B Alien Slits-L Light/B

Led x 2 Led x 2 Led x 2




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/02 Deciphered Date 2012/06/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, December 14, 2012 Sheet 3 of 56
A B C D E
A




USB 3.0 PORT Connetion
Board ID Table for AD channel
Vcc 3.3V +/- 5% 1 JUSB1 (Right side)
BOARD ID Table
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Board ID PCB Revision 2 JUSB2 (Right side)
USB PORT# DESTINATION
0 0 0 V 0 V 0.155 V 0x00-0x0C 0 0.1 (SSI)
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 0x0D-0x1C 1 0.2 (PT) 3 NA 0 JUSB1(USB3.0 P1)
2 18K +/- 5% 0.375 V 0.503 V 0.621 V 0x1D-0x30 2 0.3 (ST)
3 33K +/- 5% 0.634 V 0.819 V 0.945 V 0x31-0x49 3 0.4 (QT) 4 NA
1 JUSB2(USB3.0 P2)
4 56K +/- 5% 0.958 V 1.185 V 1.359 V 0x4A-0x69 4 1.0 (MP)
5 100K +/- 5% 1.372 V 1.650 V 1.838 V 0x6A-0x8E 5 5 JUSB3 (Left side)
2 JUSB3(USB3.0 P5)
6 200K +/- 5% 1.851 V 2.200 V 2.420 V 0x8F-0xBB 6
7 NC 2.433 V 3.300 V 3.300 V 0xBC-0xFF 7 6 JUSB4 (Left side) 3 JUSB4(USB3.0 P6)

POWER STATES PM TABLE 4 JMINI1 (WLAN)
Signal SLP SLP SLP S4 SLP ALWAYS SUS RUN CLOCKS +5VS
S3# S4# S5# STATE# M# PLANE PLANE PLANE
5 JMINI2 (DMC)
State +5VALW +3VS

power
+3VALW +1.35V +1.5VS USB2.0 6 AlienFX/ELC
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON plane +3VLP +1.05V +1.05VS
+3V_PCH +0.675VS
7 None
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON ON OFF OFF +3VMXM
+5VMXM
8 None
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF +VCC_CORE
State
+1.35V_CPU_VDDQ
9 None
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF

10 None
S0 ON ON ON
: etoN lobmyS 11 None
S3 ON ON OFF
dnuorG latigiD snaem : 12 LVDS CAMERA
S5 S4/AC ON OFF OFF
13 VPK K/B
dnuorG golanA snaem : S5 S4/AC don't exist OFF OFF OFF
1 1




DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
PCI EXPRESS DESTINATION
CLKOUT_PCIE0 MINI CARD-1 WLAN CLKOUTFLEX0 None
Lane 1/USB3.0 Port 3 None
CLKOUT_PCIE1 MINI CARD-2 DMC CLKOUTFLEX1 None
SATAIII DESTINATION
CLKOUT_PCIE2 10/100/1G LAN CLKOUTFLEX2 None Lane 2/USB3.0 Port 4 None
SATA0 HDD1 Lane 3 10/100/1G LAN
CLK CLKOUT_PCIE3 CARD READER CLKOUTFLEX3 None
SATA1 HDD2
CLKOUT_PCIE4 None Lane 4 CARD READER
CLKOUT DESTINATION SATA2 ODD
Lane 5 None
CLKOUT_PCIE5 None
PCI0 PCH_LOOPBACK SATA3 mSATA Lane 6 None
CLKOUT_PCIE6 None
PCI1 EC SATA4/PCIE LANE1 MINI CARD-1 WLAN
CLKOUT_PCIE7 None Lane 7 None
PCI2 80port debug card SATA5/PCIE LANE2 MINI CARD-2 DMC Lane 8 None
CLKOUT_PEG_A MXM
PCI3 None
PCI4 None

SMBUS Control Table

Thermal
SOURCE WLAN DMC BATT DIMM 6038 4028 Sensor FFS 2136 VPK MCU MXM XDP Charger TP mSATA


EC_SMB_CK1
EC_SMB_DA1
KB9012
V V V
EC_SMB_CK2
EC_SMB_DA2
KB9012
V V V V V
PCH_SML0CLK PCH Link
PCH_SML0DATA

PCH_SML1CLK PCH
PCH_SML1DATA Security Classification Compal Secret Data Compal Electronics, Inc.
2012/05/28 2013/05/27 Title
MEM_SMBCLK
MEM_SMBDATA
PCH
V V V V V V Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Notes List
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-9332P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, December 14, 2012 Sheet 4 of 56
A
5 4 3 2 1




D +VCOMP_OUT D


PEG_COMP 2 1
24.9_0402_1%~D RC2

CAD Note: PEG_GTX_HRX_P[0..15] 29,30
PEG_GTX_HRX_N[0..15] 29,30
Trace width=12 mils ,Spacing=15mil
Max length= 400 mils. PEG_HTX_C_GRX_P[0..15] 29,30
PEG_HTX_C_GRX_N[0..15] 29,30

Haswell rPGA EDS
JCPU1A

E23 PEG_COMP
PEG_RCOMP M29 PEG_GTX_C_HRX_N0 CC1 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N0
DMI_CRX_PTX_N0 D21 PEG_RXN_0 K28 PEG_GTX_C_HRX_N1 CC2 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N1
17 DMI_CRX_PTX_N0 C21 DMI_RXN_0 PEG_RXN_1 M31 1 2
DMI_CRX_PTX_N1 PEG_GTX_C_HRX_N2 CC3 0.22U_0402_16V7K~D PEG_GTX_HRX_N2
17 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 B21 DMI_RXN_1 PEG_RXN_2 L30 PEG_GTX_C_HRX_N3 1 2 PEG_GTX_HRX_N3
CC4 0.22U_0402_16V7K~D
17 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 A21 DMI_RXN_2 PEG_RXN_3 M33 PEG_GTX_C_HRX_N4 1 2 PEG_GTX_HRX_N4
CC5 0.22U_0402_16V7K~D
17 DMI_CRX_PTX_N3 DMI_RXN_3 PEG_RXN_4 L32 PEG_GTX_C_HRX_N5 1 2 PEG_GTX_HRX_N5
CC13 0.22U_0402_16V7K~D
DMI_CRX_PTX_P0 D20 PEG_RXN_5 M35 PEG_GTX_C_HRX_N6 CC6 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N6




PEG
17 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 C20 DMI_RXP_0 PEG_RXN_6 L34 PEG_GTX_C_HRX_N7 1 2 PEG_GTX_HRX_N7
CC7 0.22U_0402_16V7K~D
17 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 B20 DMI_RXP_1 PEG_RXN_7 E29 PEG_GTX_C_HRX_N8 1 2 PEG_GTX_HRX_N8