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Revisions Approvals
REV ECN NO. Description Of Change DATE DFTG. ENGR. REL.
TABLE OF CONTENTS
PAGE PAGE
4 - CLOCK GENERATOR 35- KEYBOARD CONNECTOR & TOUCH PAD & BUTTON
5-7 - BANIAS PROCESSOR 36 - LID SWITCH/LEDS
8-10 - ODEM 37 - CARDBUS CONTROLLER
11-14 - DDR 38 - PCMCIA CARD
39- PC CARD CONNECTOR
15-18 - ATI_M10_P
40 - MINI PCI
19-20 - VGA DDR
41 - AC97 CODEC
21 -LCD&TV CONNECTOR INTERFACE
42 - VR & MIC JACK
22- CRT INTERFACE
23-25- ICH4-M 43 - AMP
44- MDC I/F
26 - HDD CONNECTOR
45 - THERMAL SENSOR & FAN CONTROLLER
27 - CD-ROM CONNECTOR
46 - DECOUPLING CAPS
28 - USB PORT
47 - DRILL HOLE
29 - GI-GA LAN
48 - HIGH SPEED
30 - LAN INTERFACE
49 - PULL UPS
31- RJ45 CONN
50-58 - POWER
32- CHVIAS II
33 - FLASH ROM & IR
32- 1394 CONTROLLER
EE DATE POWER DATE
DRAWER
CHECK
INVENTEC
DESIGN TITLE
RESPOSFOR Cricket 5.0
SIZE = B VER : SIZE CODE DOC. NUMBER REV
FILE NAME : XXXX-XXXXXX-XX A3 CS QC5420 X01
DATE CHANGE NO. REV P/N XXXXXXXXXXXX DATE BEGINNING : dd / mm / yyyy SHEET 1 OF 57
CPU
ITP BANIAS
(Micro_FCPGA)
mPGA478
CLK GEN
CK-408B
P.5-7
PSB P.4
CRT
P.22
DDR 200/266 2.5V
North Bridge DDR_SODIMM0
LCM ATI AGP 1.5V 66MHZ
15" TFT ODEM
XGA/SXGA M10-P 593 mFCBGA
P.21
P.15-18
P.8-10 DDR_SODIMM1
TV-OUT 64 MB
P.11-14
S-VIDEO
DDR Hub Interface
P.19-20
P.21
LAN INTERFACE FOR 10/100 Mbps ( 82562-EZ )
1 st
HDD
PWR Board P.26
South Bridge PCI Bus
Batt Charger CD-ROM 2 nd ICH4-M
421 BGA
P.27
P.23-25
USB2.0 x 3 1394
LPC 3.3V 33MHZ CardBus LOM
P.28 Controller TI / TSB43AB21 Mini PCI Controller
MAIN BATT Type III INTEL 82540-EM/
ENE CB720 INTEL 82562EZ
BIOS P.34
SUPER I/O & KBC P.37 P.40 P.29
P.33 CHIVAS-II
LPC 47N253 PC CARD 3 IN 1 SLOT 1394 CONN X 1 802.11b RJ45
P.32
TWO SLOTS CONN
P.39
TOUCH PAD P.34
2 PICK BUTTON/ P.38 P.31
1 SCROLL BUTTON
ANT ANT
P.35
2 nd AC97
MDC
ANT
or MDC/BT COMB
1 st AC97
IR Audio on Board EARPHONE RJ11 CNTR
P.33 P.43 P.44
P.41
EXTERNAL
KB
Codec MIC
AD1981B
P.35
AMP
P.42
INVENTEC
TITLE
NS LM4873
Speaker Cricket 5.0
P.43 SIZE CODE DOC. NUMBER REV
A3 CS QC5420 X01
CHANGE by RDEE3 29-Apr-2004 SHEET 2 OF 57
PMOS +VBAT +VCC_CORE
ISL6218
U629
+VCC_CORE
PWR_GOOD_3 EN
+ADAPTOR
PMOS MCH_GOOD PGOOD VGATE_U
PMOS
CHARGE
TPS5110 +VCCP
U632
+VCCP +V1.2_MCH
PWR_GOOD_3 STBY_LDO
STBY +V1.2
BQ24701
MCH_GOOD
SC1485 +V1.25
+VGAVCC
LP2996
U611
SLP_S5#_3R SM_VREF
+V2.5
SLP_S3#_3R EN_PSV2
+V2.5S
EN_PSV1 PMOS
+V2.5_ON
PACK1
SLP_S3#_3R
U637
+V1.5ON +V3
PMOS
SLP_S5#_3R
TPS5130 +V3S
U633 PMOS
SLP_S3#_3R
SS_STBY1 +V3A
+V5
+V1.5ON SS_STBY2 +V5A PMOS
SLP_S5#_3R
S5_STBY3 +V1.5A
+V5S
SLP_S3#_3R STBY_LDO PMOS
SLP_S3#_3R
+VAUDIO_5S
PMOS
SLP_S3#_3R
+V1.5S
NMOS
SLP_S3#_4R
+V3S
INVENTEC
TITLE
Cricket 5.0
BLOCK DIAGRAM
SIZE CODE DOC. NUMBER REV
A3 CS QC5420 X01
CHANGE by RDEE3 29-Apr-2004 SHEET 3 OF 57
+V3S_CLK L21 +V3S
NFM40P12C223
1 2
4 3
C350
1 C365 1 C367 1 C351 1 C366 1 C348 1 C363 1 C364 1 C349 1
2 2 2 2 2 2 2 2
22UF_6.3V
0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.01UF_16V 0.01UF_16V 0.01UF_16V 0.01UF_16V
(10/5) 1 L22 2 (10/5)
BLM11A221S
1 C352 1 C353
U14 2 0.01UF_16V 22UF_6.3V
1 VDD VDDA 26
8 VDD
Place crystal within 500
14 VDD VSSA 27 1 2
+V3S mils of CLK_TITAN 19 VDD R220 49.9_1%
R229
32 VDD CPU2 45 CLK_CPU_BCLK_3 1 2 33_5% 48-,5-
CLK_CPU_BCLK
NO_STUFF_10PF 37 VDD CLK_CPU_BCLK#_3 R197 2 33_5%
C394 OPEN
46 VDD CPU2# 44 1 48-,5-
CLK_CPU_BCLK#
1 50 VDD
1 2
1 2 R194 49.9_1% R224 49.9_1%
X3 2 XTAL_IN CLK_MCH_BCLK_3 R230 2 33_5% 1 2
1 1 CPU1 49 1 48-,9-
CLK_MCH_BCLK
R226 C400 OPEN 14.31818MHZ R228
R262
OPEN 1K_5% 2
3 XTAL_OUT CPU1# 48 CLK_MCH_BCLK#_3 1 2 33_5% 48-,9-
CLK_MCH_BCLK#
1 2 1 2
NO_STUFF_10PF R222 49.9_1%
2 2 R195 2 R231 OPEN R223 OPEN
1 40 SEL2 CPU0 52 CLK_ITP_3 1 2 1 2
48-,6-
1K_5% CLK_ITP#_3 1 OPEN CLK_ITP
CPU0# 51 2
55 SEL1 R232 R221 OPEN
66INPUT 24 1 2 48-,6-
CLK_AGPCONN_3 R201 33_5% 48-,15-
CLK_ITP#
54 SEL0 66BUF2 23 CLK_AGPCONN
1 2
R203 2 25 PWRDWN# CLK_MCH66_3 R200 33_5% 48-,8-
SLP_S1#_3R 24- 1 66BUF1 22 CLK_MCH66
1 2
33_5% 1 1 CLK_ICHHUB_3 R202 33_5%
PCISTOP#_3 24- 34 PCI_STOP# 66BUF0 21 1 2 48-,23- CLK_ICHHUB
R227
R263 OPEN R225
53 CPU_STOP# CLK_ICHPCI_3 R237 33_5%
1K_5% CPUSTOP#_3 53-,24- 1 2 PCIF2 7 1 2 48-,23- CLK_ICHPCI_3R
2 2 0_5%
28 VTT_PWRGD# PCIF1 6
+V3S R191 1 2 43 MULT0 PCIF0 5
10K_5%
29 SDATA CLK_CBPCI_3 R233
ICH_SMDAT_3 23-,11- PCI6 18 1 2 33_5% 48-,37- CLK_CBPCI_3R
ICH_SMCLK_3 23-,11- 30 SCLOCK PCI5 17
33 DRCG0 PCI4 16 CLK_MINIPCI_3 1 R236 2 33_5% 48-,40- CLK_MINIPCI_3R
35 DRCG1_VCH PCI3 13
42 IREF PCI2 12 CLK_LANPCI_3 1 R234 2 33_5% 29- CLK_LANPCI_3R
PCI1 11 CLK_1394PCI_3 1 R235 2 33_5% 48-,34-
1 CLK_1394PCI_3R
41 VSSIREF
R193 R238
475_1% 4 PCI0 10 CLK_KBCPCI_3 1 2 33_5% 48-,32-
VSS CLK_KBCPCI_3R
2 9 VSS R192
15 USB 39 CLK_ICH48_3 1 2 33_5% 48-,24- CLK_ICH48_3R
VSS
20 VSS
31 ADI48M_3
VR_PWRGD_CK# VSS DOT 38
36 VSS
47 REF 56 CLK_SIO14_3 1 R264 2 33_5% 48-,24-
VSS CLK_ICH14_3R
TBD 1 R265 2 33_5% 48-,32-
Maybe can be option +V3S ICS_950810_TSSOP_56P 1
R196 2 33_5% 41-
CLK_KBC14_3R
CLK_AD14_3R
1
R198
10K_5%
2
Q20 3
D
53-,24- 1 R177 2 2G
VGATE_U
0_5% S
NDS7002A 1
INVENTEC
TITLE
Cricket 5.0
CLK GENERATOR
SIZE CODE DOC. NUMBER REV
A3 CS QC5420 X01
CHANGE by RDEE3 29-Apr-2004 SHEET 4 OF 57
H_A#(3:16) 48-,9- CN508
H_A#(3) P4 A3# ADS# N2 48-,9- H_ADS# +VCCP
H_A#(4) U4 A4# BNR# L1 48-,9- H_BNR#
H_A#(5) V3 A5# BPRI# J3 48-,9- H_BPRI#
H_A#(6) R3 A6# 1
L4
ADDR GROUP 0
H_A#(7) V2 A7# DEFER# 48-,9- H_DEFER#
H_A#(8) W1 H2 48-,9- R544
A8# DRDY# M2 H_DRDY# 56_5%
H_A#(9) T4 A9# DBSY# 48-,9- H_DBSY#
H_A#(10) W2 A10# 2
Y4 N4
CONTROL
H_A#(11) A11# BR0# 48-,9- H_BR0#
H_A#(12) Y1 A12#
H_A#(13) U1 A4
A13# IERR# B5
H_A#(14) AA3 A14# INIT# 48-,23- H_INIT#
H_A#(15) Y3 A15#
H_A#(16) AA2 J2 48-,9-
48-,9- U3
A16# LOCK# H_LOCK#
H_REQ#(4:0) 48-,9- H_ADSTB#0 ADSTB#0
H_REQ#(0) R2 REQ0# RESET# B11 48-,9-,6- H_CPURST# 48-,9- H_RS#(0:2)
H_REQ#(1) P3 REQ1# RS0# H1 H_RS#(0)
H_REQ#(2) T2 REQ2# RS1# K1 H_RS#(1)
H_REQ#(3) P1 REQ3# RS2# L2 H_RS#(2)
H_REQ#(4) T1 REQ4# TRDY# M3 48-,9- H_TRDY# H_D#(0:15) 48-,9- CN508 48-,9- H_D#(32:47)
48-,9- H_D#(0) A19 Y26 H_D#(32)
H_A#(17:31) A25 D0# D32#
H_A#(17) AF4 A17# HIT# K3 48-,9- H_HIT# H_D#(1)
A22 D1# D33# AA24 H_D#(33)
H_A#(18) AC4 A18# HITM# K4 48-,9- H_HITM# H_D#(2)
B21 D2# D34# T25
U23
H_D#(34)
H_A#(19) AC7 A19# +VCCP H_D#(3) D3# D35# H_D#(35)
H_A#(20) AC3 C8 6-
H_D#(4) A24 V23 H_D#(36)
A20# BPM#0 B8 6- H_BPM0_ITP# B26 D4# D36# R24
H_A#(21) AD3 A21# BPM#1 H_D#(5) D5# D37# H_D#(37)
H_A#(22) AE4 ADDR GROUP 1 A9 6- H_BPM1_ITP# H_D#(6) A21 R26 H_D#(38)
A22# BPM#2 6- H_BPM2_ITP# 1 B20 D6# D38#
C9 R23
ITP SIGNALS
H_A#(23) AD2 H_D#(7) H_D#(39)
DATA GRP 0
DATA GRP 2
A23# BPM#3 A10 6- H_BPM3_ITP# R550 C20 D7# D39# AA23
H_A#(24) AB4 A24# PRDY# H_D#(8) D8# D40# H_D#(40)
H_A#(25) AC6 B10 6- H_BPM4_PRDY# 150_5% H_D#(9) B24 U26 H_D#(41)
A25# PREQ# H_BPM5_PREQ# D24 D9# D41#
H_A#(26) AD5 A26# TCK A13 6- H_TCK H_D#(10) D10# D42# V24 H_D#(42)
2 E24
H_A#(27) AE2 A27# TDI C12 6- TDI_FLEX H_D#(11) D11# D43# U25 H_D#(43)
H_A#(28) AD6 A12 6- H_D#(12) C26 V26 H_D#(44)
A28# TDO H_TDO B23 D12# D44#
H_A#(29) AF3 A29# TMS C11 6- H_TMS H_D#(13) D13# D45# Y23 H_D#(45)
H_A#(30) AE1 B13 6- H_D#(14) E23 AA26 H_D#(46)
A30# TRST# A7 H_TRST# C25 D14# D46# Y25
H_A#(31) AF1 A31# DBR# 24-,6- ITP_DBRESET# H_D#(15) D15# D47# H_D#(47)
48-,9- AE5 48-,9- C23 W25 48-,9-
H_ADSTB#1 ADSTB#1 B17 1 H_DSTBN#0 C22 DSTBN0# DSTBN2# W24 H_DSTBN#2
PROCHOT# B18 TP182 H_DSTBP#0 48-,9- DSTBP0# DSTBP2# 48-,9- H_DSTBP#2
THERM
48-,23- C2 A20M# 45- R549 48-,9- D25 T24 48-,9-
H_A20M# THERMDA H_THERMDA 680_5% H_DINV#0 DINV0# DINV2# H_DINV#2
H_FERR_S# 48-,23- D3 FERR# THERMDC A18 45- H_THERMDC
H_IGNNE# 48-,23- A3 IGNNE# THERMTRIP# C17 45-,24- PM_THRMTRIP# 2
H_D#(16:31) 48-,9- 48-,9- H_D#(48:63)
H_STPCLK# 48-,23- C6 STPCLK# ITP_CLK1 A15 H_D#(16) H23 D16# D48# AB25 H_D#(48)
H_CLK
H_INTR 48-,23- D1 LINT0 ITP_CLK0 A16 H_D#(17) G25 D17# D49# AC23 H_D#(49)
48-,23- D4 B14 48-,4- H_D#(18) L23 AB24 H_D#(50)
H_NMI LINT1 BCLK1 B15 48-,4- CLK_CPU_BCLK# D18# D50# AC20
H_SMI# 48-,23- B4 SMI# BCLK0 H_D#(19) M26 D19# D51# H_D#(51)
CLK_CPU_BCLK H_D#(20) H24 AC22 H_D#(52)
D20# D52#
H_D#(21) F25 D21# D53# AC25 H_D#(53)
H_D#(22) G24 D22# D54# AD23 H_D#(54)