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Schematics Page Index (Title / Revision / Change Date)
Page Title of Schematics Page Rev. Date Page Title of Schematics Page Rev. Date
01 Index Page 0.30 051108 26 SCREW HOLE & PAD 0.30 051108
02 BLOCK DIAGRAM 0.30 051108 27 MINI-PCI 0.30 051108
A A
03 Dothan(HOST BUS) 1/2 0.30 051108 28 LAN (82562ET) 0.30 051108
04 Dothan(Power/Gnd) 2/2 0.30 051108 29 AZALIA CODEC 0.30 051108
05 CLOCK GEN(CK-410M) 0.30 051108 30 KB3910SFC1 KBC 0.30 051108
06 Alviso (HOST) 1/5 0.30 051108 31 Power design diagram 0.30 051108
07 Alviso (VGA,DMI) 2/5 0.30 051108 32 DCIN&Charger 0.30 051108
08 Alviso (DDR) 3/5 0.30 051108 33 D/D Power 0.30 051108
09 Alviso (POWER) 4/5 0.30 051108 34 1.8V/0.9V_1.5V/1.05V 0.30 051108
10 Alviso (VSS,NCTF) 5/5 0.30 051108 35 CPU_Vcore 0.30 051108
11 VGA(nVIDIA NV44M) 1/5 0.30 051108 36 VGA 1.25/1.2V 0.30 051108
B B
12 VGA(nVIDIA NV44M) 2/5 0.30 051108 37 VRAM 2.5V/1.25V 0.30 051108
13 VGA(nVIDIA NV44M) 3/5 0.30 051108 38 other power plan 0.30 051108
14 VGA(nVIDIA NV44M) 4/5 0.30 051108 39 OVP protection 0.30 051108
15 VGA(nVIDIA NV44M) 5/5 0.30 051108 40 History(1) 0.30 051108
16 NV44M(DDR F_A B_1) 0.30 051108
17 DDR(II)SO-DIMM 0.30 051108
18 DDR(II)Termination 0.30 051108
19 ICH6-M( CPU,PCI,IDE ) 0.30 051108
C
20 ICH6-M( USB,HUB,LPC ) 0.30 051108 C
21 ICH6-M( POWER&GND ) 0.30 051108
22 IDE (HDD&CD_ROM) 0.30 051108
23 USB2.0/FAN 0.30 051108
24 PCI7420B(PCMCIA) 0.30 051108
25 PCI7420B(iLink,MS)/MDC 0.30 051108
P. Leader Check by Design by
D D
Project Code & Schematics Subject: MSS1 M/B-FUBAI PCB P/N: 1P-005B100-80SA
FOXCONN HON HAI PRECISION IND. CO., LTD.
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Project Code & Schematics Subject: MSS1 M/B-HANNSTAR PCB P/N: 1P-005B500-80SA CPBG - R&D Division
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Project Code & Schematics Subject: MSS1 M/B-NAN YA PCB P/N: 1P-005B200-80SA Index Page
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Size Document Number Rev
f@
A3 MSS1-1-01 0.30
in
xa
Date: Tuesday, November 08, 2005 Sheet 1 of 40
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1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
MSS1(915GM/GML Block Diagram)
Clock Gen.
CPU CK-410M
Panel Connector LVDS Dothan (IDT-CV125/ X,TAL
A
WSXGA+ 14.318MHZ A
ICS954206BG)
PAGE 14
Processor TSSOP-56
VGA CRT Micro-FCBGA-478 PAGE 5
D-type-15p (Socket 479 Pin) SO-DIMM 0
PAGE 14 533 MHZ
PAGE 3,4
DDR(II) 200 pin
FSB
Ext. Mic In PAGE 17
533 MHZ
Jack (4.3GB/S)
HEAD SO-DIMM 1
PHONE North Bridge 533 MHZ
JACK Alviso(915GM,910GML) DDR(II) 200 pin
533 MHZ PAGE 17
LM4863
Amplifier ALC260 PCBGA 1257 533 MHZ
Int. Speaker 4X133MHZ
1.0 Walt x 2 TSSOP-20 Codec USB 2.0
B
PAGE 29
LQFP-48 PAGE 6,7,8,9,10
USB 2.0 X 2 CONN.X2 B
PAGE 29
PAGE 23
MDC 1.5
RJ11 Modem DMI
12 pin (Direct Media Interface)
PAGE 25 AZALIA
PCMCIA
Conn. 33MHZ, 3.3V PCI BUS South Bridge PATA HDD
PAGE 24
TI PCI7420B ICH6-M (Master)
PAGE 22
CardBus MINI-PCI BGA 609
MS PRO/DUO IDE ATA 100
CardReader TYPE IIIB PATA ODD
PAGE 25 i.LINK PAGE 27
PAGE 19,20,21 (Slave)
PAGE 22
C C
GHK 288 LPC Thermal Sensor
i.LINK
PAGE 24,25
INTEL LAN PHY F75384S
PAGE 25 SMB Channel 1 (CPU/Alviso)
Magnetics
82562ET ENE KB3910SFC1 SO-8
RJ45 10/100M
Pluse H0068 SSOP-48 EC+KBC PAGE 6
PAGE 28 PAGE 28 LQFP-176
PAGE 30
SMB Channel 2
Symbol ahead of value for XBUS
NC components
PS/2 Thermal Sensor
ALL NC_ LM75BIM-3
915PM + NV_ (DDR)
D NV44M FAN for Lid Switch Int. K/B(89Keys) Power Flash BIOS BATT CONN. D
915GM or SO-8
AL_ CPU & LED Button 1MB PAGE 32 PAGE 17
910GML Touchpad
LNC_ PAGE 23 PAGE 30 PAGE 30 PAGE 30 PAGE 30 PAGE 30
910GML
MNC_ FOXCONN CPBGHAI PRECISION IND. CO., LTD.
Title
HON
- R&D Division
915GM
BOM configuration BLOCK DIAGRAM
Size Document Number Rev
A3 MSS1-1-01 0.30
Date: Tuesday, November 08, 2005 Sheet 2 of 40
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U30A
6 H_A#[31..3] H_D#[63..0] 6
H_A#3 P4 A19 H_D#0
H_A#4 A3# D0# H_D#1
U4 A25
H_A#5
H_A#6
V3
A4#
A5#
Dothan D1#
D2#
A22 H_D#2
H_D#3
R3 B21
H_A#7 A6# D3# H_D#4
V2 A24
H_A#8 A7# D4# H_D#5
H_A#9
W1
T4
A8# 1 OF 3 D5#
B26
A21 H_D#6
H_A#10 A9# D6# H_D#7
W2 B20
H_A#11 A10# D7# H_D#8
Y4 C20
H_A#12 A11# D8# H_D#9
A Y1 B24 A
H_A#13 A12# D9# H_D#10
U1 D24
H_A#14 A13# D10# H_D#11
AA3 E24
H_A#15 A14# D11# H_D#12
Y3 C26
H_A#16 A15# D12# H_D#13
AA2 B23
H_A#17 A16# D13# H_D#14
AF4 E23
H_A#18 A17# D14# H_D#15
AC4 C25
H_A#19 A18# D15# H_D#16
AC7 H23
H_A#20 A19# D16# H_D#17
AC3 G25
H_A#21 A20# D17# H_D#18
AD3 L23
H_A#22 A21# D18# H_D#19
AE4 M26
H_A#23 A22# D19# H_D#20
AD2 H24
H_A#24 A23# D20# H_D#21
AB4 F25
H_A#25 A24# REQUEST DATA D21# H_D#22
AC6 G24
H_A#26 A25# D22# H_D#23 +ECVCC
AD5 PHASE PHASE J23
H_A#27 A26# D23# H_D#24
AE2 SIGNALS SIGNALS M23
H_A#28 A27# D24# H_D#25
AD6 J25
H_A#29 A28# D25# H_D#26
AF3 L26
H_A#30 A29# D26# H_D#27 R447
AE1 N24
H_A#31 A30# D27# H_D#28
AF1 M25
A31# D28# H_D#29 8.2K
H26
D29# H_D#30
N25
D30# H_D#31
K25 H_PROCHOT# 30
H_ADSTB#0 D31# H_D#32
6 H_ADSTB#0 U3 Y26
H_ADSTB#1 ADSTB0# D32# H_D#33 +VCCP
6 H_ADSTB#1 AE5 AA24
ADSTB1# D33# H_D#34 +VCCP
T25
D34# H_D#35
6 H_REQ#[4..0] U23
D35#
3
H_REQ#0 R2 V23 H_D#36 Q26
H_REQ#1 REQ0# D36# H_D#37 R444 NC_MMBT3904
P3 R24 1
H_REQ#2 REQ1# D37# H_D#38 56
T2 R26
H_REQ#3 REQ2# D38# H_D#39 R441 NC_2.2K
P1 R23
2
B H_REQ#4 REQ3# D39# H_D#40 B
T1 AA23
REQ4# D40# H_D#41 PROCHOT#
U26
D41# H_D#42
V24
H_ADS# ERROR D42# H_D#43
6 H_ADS# N2 U25
+VCCP ADS# D43# H_D#44
SIGNALS V26
D44# H_D#45
Y23
R428 56 D45# H_D#46
AA26
H_IERR# H_IERR# D46# H_D#47
A4 Y25
IERR# D47# H_D#48 +ECVCC
AB25
R142 150 H_BREQ#0 D48# H_D#49
Place near 6 H_BREQ#0 N4
BREQ0# D49#
AC23
XDP_TDI H_BPRI# J3 ARBITRATION AB24 H_D#50
CPU. 6 H_BPRI# BPRI# D50#
H_BNR# L1 PHASE AC20 H_D#51
6 H_BNR# BNR# D51#
R135 39 H_LOCK# J2 SIGNALS AC22 H_D#52 R322
6 H_LOCK# LOCK# D52#
XDP_TMS AC25 H_D#53
H_HIT# D53# H_D#54 47K
6 H_HIT# K3 AD23
R420 200/F H_HITM# HIT# SNOOP PHASE D54# H_D#55
6 H_HITM# K4 AE22
H_PWRGD H_DEFER# HITM# D55# H_D#56 THERMTRIP1#
L4 SIGNALS AF23
6 H_DEFER# DEFER# D56# THERMTRIP1# 30,33
AD24 H_D#57
R438 NC_54.9/F XDP_BPM#0 D57# H_D#58
T21 PAD C8 AF20
XDP_TDO XDP_BPM#1 BPM0# RESPONSE D58# H_D#59
T158 PAD B8 AE21
BPM1# D59#
3
T157 PAD XDP_BPM#2 A9 PHASE AD21 H_D#60
R436 NC_54.9/F XDP_BPM#3 BPM2# D60# H_D#61 Q27 C478
T160 PAD C9 SIGNALS AF25
H_CPURST# H_TRDY# BPM3# D61# H_D#62 0.1U/16V
6 H_TRDY# M3 AF22
TRDY# D62# H_D#63
6 H_RS#[2..0] H1 AF26 7,11,19,22,30 PLT_RST# 1
H_RS#0 RS0# D63#
K1
H_RS#1 RS1#
L2
H_RS#2 RS2#
H_A20M# C2 C23 H_DSTBN#0 2N7002
19 H_A20M# H_DSTBN#0 6
2
H_FERR# A20M# PC DSTBN0# H_DSTBP#0
19 H_FERR# D3 C22 H_DSTBP#0 6
H_IGNNE# FERR# DSTBP0# H_DSTBN#1 +VCCP
A3 COMPATIBILITY K24
19 H_IGNNE# IGNNE# DSTBN1# H_DSTBN#1 6
3
H_PWRGD E4 SIGNALS L24 H_DSTBP#1 Q28
C 19 H_PWRGD PWRGOOD DSTBP1# H_DSTBP#1 6 C
H_SMI# B4 W25 H_DSTBN#2 1 MMBT3904
19 H_SMI# SMI# DSTBN2# H_DSTBN#2 6
W24 H_DSTBP#2
DSTBP2# H_DSTBP#2 6
XDP_TCK A13 AE24 H_DSTBN#3 R503 2.2K
H_DSTBN#3 6
2
XDP_TDO TCK DIAGNOSTIC DSTBN3# H_DSTBP#3
A12 AE25 H_DSTBP#3 6
XDP_TDI TDO DSTBP3# PM_THRMTRIP#
C12 & TEST
R146 27.4/F XDP_TMS TDI
C11 SIGNALS
XDP_TCK XDP_TRST# TMS
B13 D25 H_DINV#0 H_DINV#0 6
CLK_XDP_BCLK TRST# DINV0#
5 CLK_XDP_BCLK A16 J26 H_DINV#1 H_DINV#1 6
CLK_XDP_BCLK# ITP_CLK0 DINV1#
R144 680
5 CLK_XDP_BCLK# A15 T24 H_DINV#2 H_DINV#2 6
XDP_TRST# XDP_BPM#5 ITP_CLK1 DINV2#
T25 PAD B10 AD20 H_DINV#3 H_DINV#3 6
XDP_BPM#4 PREQ# DINV3#
T159 PAD A10
PRDY# H_DBSY#
20 PM_SYSRST# A7 M2 H_DBSY# 6
DBR# DBSY# H_DRDY#
H2 H_DRDY# 6
H_INTR DRDY#
19 H_INTR D1
H_NMI LINT0 EXECUTION
19 H_NMI D4
H_STPCLK# LINT1 CLK_CPU_BCLK#
C6 CONTROL B14
19 H_STPCLK# STPCLK# BCLK1 CLK_CPU_BCLK# 5
H_CPUSLP# A6 SIGNALS B15 CLK_CPU_BCLK
6,19 H_CPUSLP# SLP# BCLK0 CLK_CPU_BCLK 5
H_DPSLP# B7
19 H_DPSLP# DPSLP#
H_DPRSTP# G1
19 H_DPRSTP# DPRSTP#
H_THERMDA B18 B5 H_INIT#
5 H_THERMDA THERMDA INIT# H_INIT# 19
H_THERMDC A18
5 H_THERMDC THERMDC
PM_THRMTRIP# B11 H_CPURST#
RESET# H_CPURST# 6
PM_THRMTRIP# C17
should connect to 7,19 PM_THRMTRIP# THERMTRIP# THERMAL DIODE C19 H_DPWR# H_DPWR# 6
DPWR#
ICH6-M and ALVISO PROCHOT# B17
PROCHOT#
without T-ing (No
stub) Dothan Processor
D D
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FOXCONN CPBGHAI PRECISION IND. CO., LTD.
HON
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