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5 4 3 2 1
REV: 3B Model NT2 M/B BOARD
MODEL REV CHANGE LIST
Page FM TO
NT2 M/B 3A PAGE2: BOM Change R66,R68,R76 from 10K to 0ohm. 1 2B
2 3A
PAGE11: Reserve VGARST signal to GPIO pin and detect VGA power control pin.
3 1A
PAGE13: BOM change_VGA PCIE_TESTIN need pull low.(ADD R542=10K,DEL R548=10K) 4 2A 3B
D
PAGE13: ADD 4.7K on TV-OUT select pin. D
5 1A
PAGE13: BOM Del U48,R547,R135,R131,R123,C83,C82,C139,L20,R124,R129,R127 , ADD R563,R571,R564 FOR
6 1A
disable spread spectrum. 7 2A
PAGE14: Change Q64 circuit for VGA_1.5V leakage.
8 1A
PAGE14: ADD two Caps for VGACore Voltage quality.. 9 1A
PAGE15: STRAP PIN GPIO4 FOR A23 VER FUNCTION (called Reversed_Lanes) NEED PULL-UP.
10 1A
PAGE21: Change 6-in-1 connect vendor and reserve one B-T-B connect.
PAGE21: ADD resister 1K for Write Protect isssue,Chnage XD CD signal circuit (diode,resister). 11 3A 3B
12 2A
PAGE22: Change Bluetooth Power from 3V to 3VSUS for supsend issue.
13 3A 3B
PAGE24: Change MIC circuit. 14 3A
PAGE24: ADD resisters and change CON for MODEM EMI issue, ADD two screw hole for M/E.
15 3A
PAGE25: Change Headphone detect circuit for noise issue with CableDock.
PAGE25: Change MIC circuit of MIC_BIAS. 16 2A
17 1A
PAGE27: Cable Dock pin 59,60 NET CHANGE from AGND to GND.
18 1A
PAGE27: DEL Q38 for change Dock-in circuit. 19 2B 3B
C C
PAGE27: Reserve MINI_PCI 3VAUX and -MINIPME to 3VPCU.
20 1A 3B
PAGE28: Change HDD connect type from SMT to DIP for reduce SMT issue (BOM need to update).
PAGE28: ADD FAN CAP 220U FOR FAN FG. 21 3A
22 3A
PAGE29: BOM change_fine-tune LED driving current. (R678,R677=>300ohm;
23 2B
R425,R482,R31,R359,R316,R112,R540=>130ohm) 24 3A
PAGE30: BOM change_fine-tune LED driving current.(R102,R99=>130ohm)
25 3A 3B
PAGE36: BOM DEL PQ64 AND Change 1.8V circuit for TV-OUT quality.
PAGE37: BOM DEL PR232 for enhance VGACORE power. 26 2B 3B
27 3A 3B
PAGE37: Change VGACORE setting to support 1.15V for M22 chip.
28 3A 3B
29 3A
3B PAGE04: Change Thermal IC pin "-ALT","-OVT" define.
30 3A 3B
PAGE04: Add reserve CPUHOT CONTROL from PC551.
PAGE11: Change "-WAKE" signal pull-up value from 10K to 5.1K for Express Card. 31 2B 3B
32 2A
PAGE13: Add one circuit base on refer-122 ATI schematic change the -PERST may momentarily act as an output when during
33 2A 3B
B power up. 34 2A B
PAGE19: TV-OUT signals add protect Diode.
35 2A 3B
PAGE19: L65,L62,L60 FROM 10R Change to CX8LL680001and C668,C670,C671 add 10P for EMI.
PAGE20: Change 7411 CLKRUN (MFUNC6) to plll-low. 36 3A 3B
37 3A 3B
PAGE25: Change DOCK_OK resister value for fix sound break.
38 2A 3B
PAGE26: Change resister value for Express Card modify.
PAGE27: Change CableDock power to BEAD for fix DOCK5V.
PAGE27: Add one resister for wake up from RF device.
PAGE28: Change FAN circuit for enhance Fan control performance.
PAGE30: ADD reserve one resister(100K) for CIR_IN signal pull up.
PAGE30: ADD one resister(10K) of "SWID1" for system change Thermal pin define ID.
PAGE31: Change CN23(DC Jack) footprint.
PAGE33: Del PR206,PR209(reserve system power measure before)
PAGE35: PR6,PR14,PR25,PR37 add 2.2B and PC4,PC11,PC17,PC29 1000P for EMI.
PAGE36: Del PR220,PR238(reserve system power measure before)
A PAGE37: Del PR226(reserve system power measure before) A
PAGE38: Del PR234(reserve system power measure before)
PROJECT:NT2 PCBA NO. DOC. NO: 204
Quanta Computer Inc.
APPROVED BY :Tom Wang CHECK BY:Carey Chen DRAWING BY:Johnny O DATE :08/09/2004 SHEET 1
5 4 3 2 1
5 4 3 2 1
Model NT2 M/B BOARD
MODEL REV CHANGE LIST
Page FM TO
1A FIRST RELEASE 1 2B
NT2 M/B 2 3A
3 1A
2A PAGE1: Change COREVTT power good circuit for CORE VCC Sequence. 4 2A 3B
D
PAGE4,11: Add CPU PROCHOT CIRCUT (Throttle) at battery only. D
5 1A
PAGE7: Because system 2.5V will change to 1.8V for support 1.8V VRAM so reserve one LED for support GMCH 2.5V voltage.
PAGE11: Add one system ID for NT2B, and assign GPO19 pin to support CPU PROCHOT (Throttle) function. 6 1A
7 2A
PAGE13: Add M24 GPIO14 to support TV_OUT select forTampa2, and reserve strap pin for VGA Memory tyep setting.
8 1A
PAGE14: Add LDO for VGA2.5 when system 2.5V change to 1.8V for suppport 1.8V VRAM. 9 1A
PAGE14: Reserve LDO of VGA1.5V for tune VGA power sequence.
10 1A
PAGE15: Add VGA BIOS "-ROMCS" control pin for support VRAM 256MB and reserve Memory type strip pin.
PAGE16: Add Flash ROM for VGA BIOS. 11 3A 3B
12 2A
PAGE19: Modify DIODE Pin Deffine for BAV99 Part.
13 3A 3B
PAGE21: Add pull up resister for XD "-CE" singnal. 14 3A
PAGE23: Reserve another LAN TRANSFORM FOR 10/100 and reserver one resister for LAN1.2V source and pull up resister
15 2A
for GIGA LAN transform terminal pin. 16 2A
PAGE24: Del CIR on board circuit and reserve CN37 for NT2B.
17 1A
PAGE24: Add resister to lower Cable Dock MIC signal and add more EMI PAD reserve.
18 1A
PAGE25: Modify Headphone CIRCUIT FOR CABLE DOCK. 19 2B 3B
C C
PAGE26: Change PCI EXPRESS Card power circuit - use TI TPS2331; and add CAP of Power plane bridge for EMI reserve.
20 1A 3B
PAGE27: Cable Dock pin define change for match NP2 pin define and add one pin for TV-OUT select.
PAGE27: Reserve always turn on the cable dock power circuit and change VA power to VAD. 21 3A
22 3A
PAGE29: Add two connect for LED board and reserve two LED for NT2B.
23 2B
PAGE30: Add pull-up resister for Touch PAD power control and DIODE on "-SWI"&"-RUNSCI" for leakage, and reserve 24 3A
schottky diode and resister for VCC voltage undershoot issue. 25 3A 3B
PAGE31: Add PD32 prevent power VAD with PWR_SRC leakage.
PAGE31: Change PR146 and PR72 to 100K because PWM frequence change to 200Hz. 26 2B 3B
27 3A 3B
PAGE32: Add 1.8V,VGACORE,VGA1.2V voltage discharge circuit.
28 3A 3B
PAGE33: Add PR210 to fix MAX1999. 29 3A
PAGE34: Change PR180 to 0ohm and delete PC36 for COREVTTPWG signal delay time.
30 3A 3B
PAGE34: Add PR203 NTC 4.7K to control cpu load line.
PAGE36: Change 1.8VSUS and 1.5V power circuit of use MAX1845 for enhance transform efficiency. 31 2B 3B
32 2A
PAGE37: Change VGACORE of use LMV321 for enhance transform efficiency.
33 2A 3B
B
34 2A B
2B PAGE1: R655 BOM Change from 2.2K to 22.1K fix Q58 can't turn on issue.
35 2A 3B
PAGE11: Add one cap for RTCVCC and place mechanic open area.
PAGE13: BOM del C64,C90,C78 for same use TV-OUT filter. 36 3A 3B
37 3A 3B
PAGE14: Reserve resister for use one VGA 2.5V LDO.
38 2A 3B
PAGE19: Modify TV-OUT circuit and default use HDTV filiter.
PAGE21: Reserve one circuit of Card power control for TI recommand.
PAGE22: Change CN13 connect type for system ASS'Y.
PAGE22: Reserve CAP for EMI solution on "DCOEX1" &"DCOEX2".
PAGE23: Modify LAN transform pin8 need connect to "-LANPHY_MDI0".
PAGE24: Add Hole for mechanic, and DEL CN37 for NT2B.
PAGE25: BOM change AMP form TPA0212 to TPA0312.
PAGE26: Modify PCI EXPRESS signal TX and RX change, and TPS2231 and CN22 footprint modify.
PAGE26: New Card power switch reserve another source RICOH R5535.
PAGE27: Modify Cable Dock TV-OUT circuit.
A PAGE27: BOM Modify R401 and Q44 DEL.R688 1K ADD for always turn on 5VDOCK and 5VAMP_PR power. A
PAGE28: CN36 Change type.
PAGE29: Change CN38 from 5Pin to 8Pin for NT2B system and CN10 change type.
PAGE30: CN14 change from 10pin to 12pin for NT2B system.
PAGE31: ADD one circuit for disable charger IC working while system battery only.
PROJECT:NT2 PCBA NO. REV: 3B DOC. NO: 204
Quanta Computer Inc.
APPROVED BY :Tom Wang CHECK BY:Carey Chen DRAWING BY:Johnny O DATE :08/09/2004 SHEET 1
5 4 3 2 1
1 2 3 4 5 6 7 8
AC/BATT BATT CHARGER CPU Thermal CPU CORE DC/DC IO
A
CONNECTOR MAX1772 PRESCOTT / TEJAS Sensor ISL6247 Max 1999 SC1470 A
PG 31 PG 31 LGA775 PG 4 PG 34,35 PG 33 PG 36,37,38
CPU
PG 2,3
LCD 17.0"/15.4"
WXGA PG 19 SYSTEM BUS
800MHz CPUHCLK_200M PCMPCLK_33M
DVI (CABLE CHANNEL A PG9 MCHHCLK_100M LANPCLK_33M
DOCK) PG 19 VGA MCHGCLK_100M CLOCK 591PCLK_33M
PCI-EXPRESS GRANTSDALE DDR 2-SODIMM1
708 BGA DDR2 SDRAM 1.8V VGACLK_100M CK-410 MINIPCLK_33M
CRT
ATI(M24-P) BGA ICHDCLK_100M
PG 19 CHANNEL B
X16 GMCH 2.1 GB/s up to 2.7GB/s NEWCCLK_100M USB48M&1394_48M
PG 13,14,15,16 ICS954101
TV / HDTV(CABLE DDR 2-SODIMM2 ICHPCLK_33M
PG 5,6,7,8 SATACLK_100M ICH14M_14.318M
B DOCK) PG 19 B
PG 4
VGA Memory DMI
(64/128M)
PCI BUS ROUTING TABLE
PG 17,18
PCMCIA --- AD16, -REQ0, -INTA -INTF, -INTG
14.318MHz
LAN --- AD18, -REQ2, -INTE
MINI PCI --- AD19, -REQ3, -INTB, -INTC
Primary Master IDE - HDD
PG 28 IDE PCI,33MHZ, 3.3V
Primary Salve
(CDROM,DVD PG 28
CD-RW,DVD-RW)
1394
LAN MINI-PCI PCMCIA
RTL8100C/SB SOCKET TI 7411 PORTX1
(CABLE
BlueTooth X1 USB STICK X1 (10/100)(1000) DOCK
PG 22 PG 29
C USB 2.0 ICH6 128 Pins PG23 PG 27 PG 20 X1) PG 22 C
USB PORT X4 609 BGA
PG 29
X8
CABLE DOCK X1 PG 10,11,12 Wireless LAN PCMCIA Memory Card
PG 27 CABLE RJ45
Card SLOT reader slot
DOCK 802.11 b / SM/SD/
802.11
X1 MS/SC/XD
FAN 1,2,3 PG 28 PG 20 PG 23 a/b PG 27 PG 21 PG 21
FLASH ROM 512K
PG 30 PC87591
176 Pins LQFP
LPC AC97 AUDIO PG 24 MODEM RJ11
MU902 28P
Touchpad PG30 CONEXANT
3.3V, 33MHz CX20468-21 PG 23
Keyboard/Mouse PG 30
D
PG 30 D
PCI-
SATA EXT. AUDIO STEREO SPEAKER
EXPRESS
SYSTEM LEDPG 29 MIC-IN AMP Headphone-OUT
USBX1 PCI EXPRESS SATA HDD (CABLE TPA0312 (CABLE DOCK) PROJECT : NT2
DOCK)
CARD (RESERVE) PG 25 Quanta Computer Inc.
CIR PG 24 PG 26 PG 29
PG 25 PG 25
Size Document Number Rev
Custom 2B
Block Diagram
Date: Monday, January 10, 2005 Sheet 3 of 40
1 2 3 4 5 6 7 8
A B C D E
U51A U51B
-CPUA3
-CPUA4
L5 A03# D00# B4 -CPUD0
-CPUD1
PLACEMENT NOTICE : CB501 10UC COREVCC
COREVCC
N29 VCCP185 CPUVID0
P6 A04# D01# C5 N30 VCCP186 VID0 AM2 CPUVID0 34
-CPUA5
-CPUA6
M5 A05# D02# A4 -CPUD2
-CPUD3
1. CPUIOPLLVCC, CPUVCCA AND CB498 10UC COREVCC
COREVCC
N8 VCCP187 VID1 AL5 CPUVID1
CPUVID2
CPUVID1 34
L4 C6 P8 AM3 CPUVID2 34
-CPUA7 M4
A06#
A07#
D03#
D04# A5 -CPUD4 CPUVSSA RELATIVE R/C MUST NEAR CB60 10UC COREVCC R8
VCCP188
VCCP189
VID2
VID3 AL6 CPUVID3
CPUVID3 34
-CPUA8 -CPUD5 CB516 10UC COREVCC CPUVID4
-CPUA9
R4
T5
A08# D05# B6
B7 -CPUD6 CPU PIN CB514 10UC/Y5U COREVCC
T23
T24
VCCP190 VID4 AK4
AL4 CPUVID5
CPUVID4 34
A09# D06# VCCP191 VID5 CPUVID5 34
-CPUA10
-CPUA11
U6 A10# D07# A7 -CPUD7
-CPUD8
2. CPUGTLREF RELATIVE R/C MUST CB509 10UC/Y5U COREVCC
COREVCC
T25 VCCP192
T4 A10 T26 VCORE VID
-CPUA12 U5
A11#
A12#
D08#
D09# A11 -CPUD9 NEAR CPU PIN COREVCC T27
VCCP193
VCCP194
-CPUA13 U4 A13# D10# B10 -CPUD10
3. IDEALLY, PLACE 1 CAP PER COREVCC T28 VCCP195 VCCSENSE AN3 VCCSENSE_AN3 TP3
-CPUA14 V5 C11 -CPUD11 COREVCC T29 AN4 VSSSENSE_AN4
4
-CPUA15 V4
A14#
A15#
D11#
D12# D8 -CPUD12 POWER PIN AND BASED ON REAL COREVCC T30
VCCP196
VCCP197
VSSSENSE TP2 4
-CPUA16 -CPUD13 COREVCC
-CPUA17
W5
AB6
A16# D13# B12
C12 -CPUD14 CASE TO REDUCE. COREVCC
T8
U23
VCCP198
A17# D14# VCCP199
-CPUA18
-CPUA19
W6 A18# D15# D11 -CPUD15
-CPUD16
4. CPUCOMP0 AND CPUCOMP1 COREVCC
COREVCC
U24 VCCP200
Y6 G9 U25
-CPUA20 Y4
A19#
A20#
D16#
D17# F8 -CPUD17 PULLDN MUST NEAR CPU PIN COREVCC U26
VCCP201
VCCP202
-CPUA21
-CPUA22
AA4
AD6
A21# ADDR DATA D18# F9
E9
-CPUD18
-CPUD19
5. ALL TESTHIx PULLUP MUST NEAR COREVCC
COREVCC
U27
U28
VCCP203 15MILS IC0805A103R-K0 100mA
-CPUA23 AA5
A22#
A23#
D19#
D20# D7 -CPUD20 CPU PIN COREVCC U29
VCCP204
VCCP205 VCCIOPLL C23 CPUIOPLLVCC COREVTT
-CPUA24
-CPUA25
AB5 A24# D21# E10 -CPUD21
-CPUD22
6. AT LEAST 4 BULK CAPACITORS COREVCC
COREVCC
U30 VCCP206
L5
L6
IC0805A103R-K0
AC5 D10 U8
-CPUA26 AB4
A25#
A26#
D22#
D23# F11 -CPUD23 ON BOTH SIDE OF CPU POWER COREVCC V8
VCCP207
VCCP208 15MILS
-CPUA27 -CPUD24 COREVCC
-CPUA28
AF5
AF4
A27# D24# F12
D13 -CPUD25 PLANE COREVCC
W23
W24
VCCP209
A23 CPUVCCA R58 *0R CPUIOPLLVCC
A28# D25# VCCP210 VCCA
-CPUA29
-CPUA30
AG6 A29# D26# E13 -CPUD26
-CPUD27
7. AT LEAST 32PCS 22U CAP AND 42 COREVCC
COREVCC
W25 VCCP211
AG4 G13 W26
-CPUA31 AG5
A30#
A31#
D27#