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1 2 3 4 5 6 7 8
CPU CORE ZL8
SENTECH
SC451ITSTR
Page:23 CLOCK GEN
ICS954206 CELERON-M/PENTIUM-M
A Page:4 A
INTEL Mobile_479 CPU
SYSTEM 3V/5V CRT
Page:2, 3 Page: 11
MAXIM
MAX1999 LVDS
Page: 11
+3VPCU HOST BUS 533/400MHZ
+3V_S5/+3VSUS
+3V
+5VPCU NB (Option)
RGB
+5VSUS DDR-II SODIMM1 DDR-II INTEL
+5V MINI-PCIE slot
Page: 10 ALVISO 915GM LVDS Wireless LAN
+15V Page:24 DDR-II SODIMM2 Page: 5, 6 , 7, 8
Page: 10
B B
Page: 16
+1.8VSUS
DMI I/F
+1.8V TI PCMCIA
+0.9VSUS PCI1510A ( L-F ) TYPE II
+0.9V ON SLOT
AD17
NCP5214 PCI-E BUS Page: 18
ATA 66/100 REQ1# / GNT1#
PATA HDD
Page: 16
INTC#
Page: 18
SB PCI BUS 33MHZ
+1.5V ATA 66/100
SENTECH INTEL
SC1470 IDE-ODD
Page: 16 ICH6-M MINI-PCI
+1.5V_S5 HD Audio Wireless LAN
AD20
SI9183-AD Page: 12 , 13 , 14 USB 2.0 REQ2# / GNT2#
C C
INTB# , INTD#
Page: 16
+2.5V AUDIO CODEC
SENTECH Realtek
SC1565 ALC260 (ALC883)
LPC 33MHZ
Page: 19 REALTEK
+1.05V KBC RTL8100CL RJ45
SENTECH AD24 Page: 17
AMP MODEM NS
SC4215 REQ0# / GNT0#
PC97551 INTA#
Page:25 MAX9755
Page: 21 Page: 17
Page: 20 Page: 19
BATTERY CHARGER SYSTEM Bluetooth
MIC IN SPEAKER LINE OUT RJ11 Touchpad Keyboard FLASH FAN USB PORT *3 USB
MAXIM Page: 19 Page: 20 Page: 20 Page: 17 Page: 22 Page: 22 Page: 21 Page: 22 interface
D MAX8724 Page:26
USB2,3,5 Page:16 USB4 Page:16 D
PROJECT : ZL8
Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM 2A
Date: Tuesday, July 12, 2005 Sheet 1 of 26
1 2 3 4 5 6 7 8
A B C D E
+3V
U13A +3V
HA#[3..31] HD#[0..63] R235
(5) HA#[3..31] HD#[0..63] (5)
HA#3 P4 A19 HD#0
A3# D0#
2
HA#4 U4 A25 HD#1
HA#5 V3
A4#
A5#
Banias D1#
D2# A22 HD#2 10K_4 Q16
H/W MONITOR
HA#6 R3 B21 HD#3 1 3 MBDATA MBDATA (21,26)
HA#7 A6# D3# HD#4
V2 A7# D4# A24
HA#8 HD#5 2N7002
HA#9
W1
T4
A8# 1 OF 3 D5# B26
A21 HD#6 +3V
HA#10 A9# D6# HD#7 R234
4 W2 A10# D7# B20 4
HA#11 Y4 C20 HD#8
A11# D8#
2
HA#12 Y1 B24 HD#9 10K_4 Q15
HA#13 A12# D9# HD#10
U1 A13# D10# D24
HA#14 AA3 E24 HD#11 1 3 MBCLK MBCLK (21,26)
HA#15 A14# D11# HD#12
Y3 A15# D12# C26
HA#16 HD#13 2N7002
HA#17
AA2
AF4
A16#
A17#
D13#
D14#
B23
E23 HD#14 +3V 15 MIL +3V +3V
HA#18 AC4 C25 HD#15 R236 47_6 3V_THM
HA#19 A18# D15# HD#16 R238 R237 R248
AC7 A19# D16# H23
HA#20 AC3 G25 HD#17 C342
HA#21 A20# D17# HD#18
AD3 A21# D18# L23
HA#22 HD#19 .1U/10V_4 U14 10K_4 *10K_4 10K_4
AE4 A22# D19# M26 MAX6648_AL (21)
3
HA#23 AD2 H24 HD#20 1 6
HA#24 A23# D20# HD#21 THERMDC VCC -ALT KBSMDAT
AB4 A24# D21# F25 3 DXN SMDATA 7
HA#25 AC6 REQUEST DATA G24 HD#22 C336 2 8 KBSMCLK Q17
HA#26 A25# PHASE PHASE D22# HD#23 DXP SMCLK
AD5 A26# D23# J23 4 -OVT GND 5 2
HA#27 AE2 SIGNALS SIGNALS M23 HD#24 2200P_4
HA#28 A27# D24# HD#25 THERMDA G781 2N7002
AD6 A28# D25# J25
HA#29 AF3 L26 HD#26
A29# D26# MAX6648_OV# (22)
HA#30 AE1 N24 HD#27 10 mil trace /
1
HA#31 A30# D27# HD#28
AF1 M25
A31# D28#
H26 HD#29 10 mil space
D29# HD#30
D30# N25
K25 HD#31
D31# HD#32
(5) HADSTB0# U3 ADSTB0# D32# Y26
AE5 AA24 HD#33
(5) HADSTB1# ADSTB1# D33#
3 T25 HD#34 3
D34# HD#35
D35# U23
R2 V23 HD#36
(5) HREQ#0 REQ0# D36#
P3 R24 HD#37
(5) HREQ#1 REQ1# D37#
T2 R26 HD#38
(5) HREQ#2 REQ2# D38#
P1 R23 HD#39
(5) HREQ#3 REQ3# D39#
T1 AA23 HD#40
(5) HREQ#4 REQ4# D40#
U26 HD#41
D41# HD#42
D42# V24
N2 ERROR U25 HD#43
(5) ADS# ADS# D43#
SIGNALS V26 HD#44
D44# HD#45
D45# Y23
AA26 HD#46
+1.05V R31 56_4 H_IERR# D46# HD#47
A4 IERR# D47# Y25
AB25 HD#48
D48# HD#49
(5) HBREQ0# N4 BREQ0# D49# AC23
J3 ARBITRATION AB24 HD#50
(5) BPRI# BPRI# D50#
L1 PHASE AC20 HD#51
(5) BNR# BNR# D51#
J2 SIGNALS AC22 HD#52
(5) HLOCK# LOCK# D52#
AC25 HD#53
D53# HD#54
(5) HIT# K3 HIT# D54# AD23
K4 SNOOP PHASE AE22 HD#55
(5) HITM# HITM# D55# +1.05V
L4 SIGNALS AF23 HD#56
+1.05V (5) DEFER# DEFER# D56# +1.05V
AD24 HD#57
+1.05V R37 *54.9/F_4 BPM0# D57# HD#58
C8 BPM0# D58# AF20
2
R33 *54.9/F_4 BPM1# B8 RESPONSE AE21 HD#59 Q14
R38 *54.9/F_4 BPM2# BPM1# PHASE D59# HD#60 R231
A9 BPM2# D60# AD21
2 200/F_4 R30 *54.9/F_4 BPM3# C9 SIGNALS AF25 HD#61 2
BPM3# D61# HD#62 *56_4
(5) HTRDY# M3 TRDY# D62# AF22
H1 AF26 HD#63 THERMTRIP# R233 33_4 1 3
(5) RS#0 RS0# D63# 1999_SHT# (24)
R212 K1 PMBS3904
(5) RS#1 RS1#
(5) RS#2 L2 RS2#
A20M# C2 C23
CPUPWRGD
(12) A20M# A20M# DSTBN0# HDSTBN0# (5)
FERR# D3 PC C22
(12) FERR# FERR# DSTBP0# HDSTBP0# (5)
IGNNE# A3 COMPATIBILITY K24
(12) IGNNE# IGNNE# DSTBN1# HDSTBN1# (5)
CPUPWRGD E4 SIGNALS L24
(12) CPUPWRGD PWRGOOD DSTBP1# HDSTBP1# (5)
SMI# B4 W25
(12) SMI# SMI# DSTBN2# HDSTBN2# (5)
DSTBP2# W24 HDSTBP2# (5)
R229 27.4/F_4 TCK A13 AE24
TCK DSTBN3# HDSTBN3# (5)
R226 *54.9/F_4 TDO A12 DIAGNOSTIC AE25
TDO DSTBP3# HDSTBP3# (5)
+1.05V R227 150_4 TDI C12 & TEST
R224 39_4 TMS TDI SIGNALS
C11 TMS
R230 680_4 TRST# B13 D25
TRST# DBI0# HDBI0# (5)
HCLK_ITP A16 J26
T91 ITP_CLK0 DBI1# HDBI1# (5)
HCLK_ITP# A15 T24
T90 ITP_CLK1 DBI2# HDBI2# (5)
R219 56_4 PREQ# B10 AD20
PREQ# DBI3# HDBI3# (5)
+1.05V R222 56_4 PRDY# A10
+3V R217 150_4 DBR# PRDY#
A7 DBR# DBSY# M2 DBSY# (5)
(13) DBR# DRDY# H2 DRDY# (5)
INTR D1
(12) INTR LINT0
NMI D4 EXECUTION
(12) NMI LINT1
STPCLK# C6 CONTROL B14
(12) STPCLK# STPCLK# BCLK1 HCLK_CPU# (4)
CPUSLP# A6 SIGNALS B15
(5,12) CPUSLP# SLP# BCLK0 HCLK_CPU (4)
1 DPSLP# B7 1
(12) DPSLP# DPSLP#
THERMDA B18 B5
THERMDC THERMDA INIT# R225 54.9/F_4 +1.05V CPUINIT# (12)
A18 THERMDC
RESET# B11 CPURST# (5)
PROJECT : ZL8
THERMTRIP# C17
(6,12) THERMTRIP# THERMTRIP# THERMAL DIODE C19
+1.05V R45 56_4 CPU_PROCHOT# B17 PROCHOT#
DPWR# DPWR# (5) Quanta Computer Inc.
Size Document Number Rev
Banias_Processor CPU ( HOST BUS )-1 2A
Date: Tuesday, July 12, 2005 Sheet 2 of 26
A B C D E
A B C D E
18 MIL U13B U13C
R51 27.4/F_4 COMP0
COMP0 ~ 4 max length 500 MIL +1.05V
R19 27.4/F_4 COMP2 COMP0 P25 A2 W23
COMP1 COMP0 VSS VSS
P26 COMP1 VSS A5 D10 VCCP0 VSS W26
COMP2 AB2 A8 D12 Y2
R249 54.9/F_4 COMP1 COMP3 COMP2 VSS VCCP1 VSS
AB1 COMP3 VSS A11 D14 VCCP2 VSS Y5
R213 54.9/F_4 COMP3 A14 D16 Y21
+1.05V R250 1K/F_6 GTLREF0
Banias VSS
VSS A17 E11
VCCP3
VCCP4 Banias
VSS
VSS Y24
AD26 GTLREF0 VSS A20 E13 VCCP5 VSS AA1
T97
R251
E26 GTLREF1 2 OF 3 VSS A23 E15 VCCP6 VSS AA4
0.5" max (12) DPRSLP#
T86
G1 GTLREF2 VSS A26 F10 VCCP7 3 OF 3 VSS AA6
4 AC1 GTLREF3 VSS B3 F12 VCCP8 VSS AA8 4
2K/F_6 5 MIL B6 F14 AA10
R211 56_4 VSS VCCP9 VSS
+1.05V VSS B9 F16 VCCP10 VSS AA12
TEST1 C5 B12 K6 POWER, GROUND AND NC AA14
TEST2 F23 TEST1 VSS VCCP11 VSS
TEST2 VSS B16 L5 VCCP12 VSS AA16
VSS B19 L21 VCCP13 VSS AA18
VSS B22 M6 VCCP14 VSS AA20
A0 : STUFF R34 R52 B25 M22 AA22
POWER, VSS VCCP15 VSS
A1 : NC VSS C1 N5 VCCP16 VSS AA25
*1K_4 *1K_4 GROUND, C4 N21 AB3
VSS VCCP17 VSS
RESERVED C7 P6 AB5
VSS VCCP18 VSS
SIGNALS C10 P22 AB7
VSS VCCP19 VSS
AC26 VCCA3 VSS C13 R5 VCCP20 VSS AB9
R18 *0_8 CPU_VCCA N1 C15 R21 AB11
+1.8V VCCA2 VSS VCCP21 VSS
B1 VCCA1 VSS C18 T6 VCCP22 VSS AB13
R17 0_8 F26 C21 T22 AB15
+1.5V VCCA0 VSS VCCP23 VSS
VSS C24 U21 VCCP24 VSS AB17
VCC_CORE
at least 40 MIL shape VSS D2 P23 VCCP25 VSS AB19
VSS D5 W4 VCCP26 VSS AB21
D6 VCC00 VSS D7 VSS AB23
D8 VCC01 VSS D9 VSS AB26
D18 VCC02 VSS D11 VSS AC2
CPU_VCCA
PLACE one 10U & one 0.01U for each VCCA pin D20 VCC03 VSS D13 (23) CPU_VID0 E2 VID0 VSS AC5
D22 VCC04 VSS D15 (23) CPU_VID1 F2 VID1 VSS AC8
E5 VCC05 VSS D17 (23) CPU_VID2 F3 VID2 VSS AC10
C352 C39 C353 C40 C51 C351 C350 C50
E7
E9
VCC06
VCC07
VSS
VSS
D19
D21
(23)
(23)
CPU_VID3
CPU_VID4
G3
G4
VID3