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A B C D E
1 1
NSWAA/NTWAA
2
Liverpool 10G 2
Sunderland 10G
LA-5322P REV 1.0 Schematic
3
Intel Arrandale /IBEX PEAK 3
2009-12-22 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Schematic, LA5322P M/B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401717
Date: Monday, January 25, 2010 Sheet 1 of 58
A B C D E
A B C D E
Compal Confidential Fan Control VGA Thermal Sensor Clock Generator
Intel Arrandale APL5607 ADM1032ARMZ-2 SLG8SP587VTR
Model Name : NSWAA/NTWAA page 6 page 21 page 22
File Name : LA-5322P
1 PCIE-Express 16X 2.5GHz 1
rPGA-988 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
Dual Channel BANK 0, 1, 2, 3 page 11,12
page 5,6,7,8,9,10 1.5V DDRIII 800/1066 MT/s
VGA (DDR3)
ATI M92XTX,64bit with 256M/512MB USB/B BT conn
DMI X4 USB port 0,1 USB port 5
page 34 page 35
2.5GHz
ATI M96 Pro,128bit with 512MB/1GB
(Reserve) RTS5159E
3G 3IN1 Int. Camera
page 13,14,15,16,17,18,19,20,21 USB port 12 USB port 10 USB port 11
USB page 36 page 40 page 22
5V 480MHz
2 2
LCD Conn. CRT PCIeMini Card
page 22 page 23
WiMax
HDMI Conn. USB
USB port 13
5V 480MHz page 36
PCIe 1x PCIeMini Card
page 24 1.5V 2.5GHz(250MB/s) WLAN
PCIe port 1
page 36
Intel Ibex Peak
SATA port 1 SATA HDD0
Express Card (Reserve) 5V 3GHz(300MB/s) page 34
USB
USB port 8
5V 480MHz
Express Card (Reserve) PCIe 1x SATA port 4
BGA-951 SATA ODD
PCIe port 0 page 36 1.5V 2.5GHz(250MB/s) 5V 3GHz(300MB/s) page 34
3 3
RJ45 RTL8103EL-VB 10/100M PCIe 1x SATA port 5
page 37 PCIe port 2 page 37 1.5V 2.5GHz(250MB/s) 5V 3GHz(300MB/s)
page 25,26,27,28,29,30,31,32,33 eSATA USB
USB port 3 USB port 3
page 34 page 34
5V 480MHz
3.3V 33 MHz
LPC BUS
HD Audio 3.3V/1.5V 24MHz
Power/B RTC CKT. MDC 1.5 Conn HDA Codec AMP.
page 35 ALC272 TPA6017
page 28 SPI ROM Debug Port ENE KB926 D3 page 35 page 38 page 39
page 25 page 42 page 41
USB/B DC/DC Interface CKT.
page 34
page 44
Int.
Touch Pad EC ROM MIC CONN MIC CONN HP CONN SPK CONN
4
ODD/B for 17" Int.KBD page 39 page 39 page 39 page 39
4
page 34 page 35 page 35 page 42
Power Circuit DC/DC
page 45~54 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Schematic, LA5322P M/B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401717
Date: Monday, January 25, 2010 Sheet 2 of 58
A B C D E
5 4 3 2 1
NSWAA Liverpool Intel Arrandale (Discrete)
NTWAA Sunderland Intel Arrandale (Discrete) B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
SUSP
N-CHANNEL DESIGN CURRENT 4A +5VS
SI4800
D D
TPS51125RGER
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
SUSP
N-CHANNEL DESIGN CURRENT 5A +3VS
SI4800 VGA_ENVDD
P-CHANNEL
AO-3413
DESIGN CURRENT 1.5A +LCD_VDD
WOL_EN#
P-CHANNEL
AO-3413
DESIGN CURRENT 330mA +3V_LAN
BT_PWR#
P-CHANNEL
DESIGN CURRENT 180mA +BT_VCC
AO-3413
C C
PCIE_OK
P-CHANNEL
DESIGN CURRENT 100mA +3VS_DELAY
AO-3413
VR_ON
DESIGN CURRENT 48A +CPU_CORE
ISL62883
SUSP#
DESIGN CURRENT 26A +VGA_CORE
APW7138
VTTP_EN#
Ipeak=18A, Imax=12.6A, Iocp min=20.64 DESIGN CURRENT 18A +VTT
APW7138
B B
SYSON
Ipeak=15A, Imax=10.5A, Iocp min=18.14 DESIGN CURRENT 15A +1.5V
APW7138 SUSP
N-CHANNEL
DESIGN CURRENT 12A +1.5VS
SI4856 SUSP
DESIGN CURRENT 1.5A +0.75VS
PCIE_OK
G2992F1U
DESIGN CURRENT 2A +1.1VS
SUSP# APL5913
Ipeak=4A, Imax=2.8A, Iocp min=4.98 DESIGN CURRENT 8A +1.8VS
TPS51117RGYR
SUSP#
Ipeak=7A, Imax=4.9A, Iocp min=8.54 DESIGN CURRENT 7A +1.05VS
A TPS51117RGYR A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Schematic, LA5322P M/B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401717
Date: Monday, January 25, 2010 Sheet 3 of 58
5 4 3 2 1
A B C D E
( O MEANS ON X MEANS OFF )
Voltage Rails BTO Option Table
+RTCVCC +B +5VALW +1.5V +5VS
Function Bluetooth RJ11 Express Card MIC HDMI Panel M1/M3
+3VALW +3VS description (B) (E) (Y)
+VSB +1.5VS
1 power
+VGA_CORE
explain Bluetooth MDC New Card MIC HDMI 16" 17" M1 M3 1
plane
+CPU_CORE BTO BT@ MDC@ NEW@ MIC@ HDMI@ 16@ 17@ M1@ M3@
+VTT
+1.05VS
+1.8VS
Function Mini Card VRAM GPU
+1.1VS description
State +0.75VS
explain WIRELESS 256M 512M 1G M92 XTX M96 Pro
BTO WLAN@ 2PCS@ 4PCS@ 8PCS@ M92XTX@ M96PRO@
S0
O O O O O
SIGNAL
S1
2
O O O O O STATE SLP_S3# SLP_S4# SLP_S5# 2
Full ON HIGH HIGH HIGH
S3
O O O O X S1(Power On Suspend) HIGH HIGH HIGH
S5 S4/AC
O O O X X S3 (Suspend to RAM) LOW HIGH HIGH
S5 S4/ Battery only
O O X X X S4 (Suspend to Disk) LOW LOW HIGH
S5 (Soft OFF) LOW LOW LOW
S5 S4/AC & Battery
don't exist
O X X X X G3 LOW LOW LOW
3 3
EC SM Bus1 address EC SM Bus2 address
Power Device Address Power Device Address
+3VALW EC KB926 D3 +3VS EC KB926 D3
+3VALW Smart Battery 0001 011x b +3VS VGA THM Sensor 1001 110x b
ADM1032ARMZ
+3VS PCH 0100 110x b
PCH SM Bus address
Power Device Address
+3VALW PCH
+3VS Clock Generator 1101 001x b
4 +3VS DDR DIMM0 1001 000x b 4
+3VS DDR DIMM1 1001 010x b
+3VS Express
+3VS WLAN/Wimax/3G
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Schematic, LA5322P M/B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401717
Date: Monday, January 25, 2010 Sheet 4 of 58
A B C D E
5 4 3 2 1
JCPUB
1 2 H_COMP3 AT23
R1 20_0402_1% COMP3
BCLK A16 CLK_CPU_BCLK 30 2 1
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# 30 R19 0_0402_5%
R2 20_0402_1% COMP2 BCLK#
CLOCKS
1 2 H_COMP1 G16 AR30 CLK_CPU_XDP_R 1 2 CLK_CPU_XDP
R4 49.9_0402_1% COMP1 BCLK_ITP CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP#
BCLK_ITP# AT30
S
D
1 2 H_COMP0 AT26 R42 @ 0_0402_5% SM_DRAMRST#_CPU 3 1
COMP0 SM_DRAMRST# 11,12
R3 49.9_0402_1% E16 CLK_PEG 26
PEG_CLK
1
D16 CLK_PEG# 26 Q41 @
TP_SKTOCC# PEG_CLK# BSS138_NL_SOT23-3
G
G
PAD T41 AH24
2
+VTT SKTOCC# @ R123
DPLL_REF_SSCLK A18 Unused by Clarksfield rPGA989
A17 100K_0402_5% RST_GATE 11,30
CATERR# DPLL_REF_SSCLK#
D 1 2 AK14 D
2
+VTT CATERR#
THERMAL
R18 49.9_0402_1%
2
C301 @
F6 SM_DRAMRST#_CPU 0.047U_0402_16V7K
SM_DRAMRST# C301 M96@
30 PECI AT15
1
PECI
2
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1% 10K_0402_5%
R10 1 2 AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% DDR3 Compensation Signals
+VTT SM_RCOMP[1] Layout Note:Please these +VTT
68_0402_5% R9 68_0402_5% AN1 SM_RCOMP_2 R8 1 2 130_0402_1% 12/22: Modify for M96 and M96 Pro select
SM_RCOMP[2] resistors near Processor
@ 41,53 H_PROCHOT# 1 2H_PROCHOT#_D AN26 PROCHOT#
R40 0_0402_5% AN15 PM_EXTTS#0
DDR3
MISC
1
PM_EXT_TS#[0]
PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# 11,12 PM_EXTTS#0 R15 2 1 10K_0402_5%
H_CPURST# R12 0_0402_5%
AK15 PM_EXTTS#_R R13 2 1 10K_0402_5%
30 H_THERMTRIP# THERMTRIP#
AT28 XDP_PRDY#
@ PRDY# XDP_PREQ# XDP_TDI_R XDP_TDI
13,29,36,37,41,42 PLT_RST# 2 1 PREQ# AP27 1 2
0_0402_5% R37 R20 0_0402_5%
AN28 XDP_TCK
XDP_RST#_R H_CPURST# TCK XDP_TMS XDP_TDO_M
1 2 AP26 RESET_OBS# TMS AP28 1 @ 2 XDP_TDO
PWR MANAGEMENT
PWR MANAGEMENT
R36 1K_0402_5% AT27 XDP_TRST# Routed as a single daisy chain R21 0_0402_5%
TRST#
1
JTAG & BPM
1 2 H_PMSYNCH AL15 AT29 XDP_TDI_R R23
27 PMSYNCH PM_SYNC TDI
R43 0_0402_5% AR27 XDP_TDO_R 0_0402_5%
TDO XDP_TDI_M
TDI_M AR29 2 1 +3VS
2 1 H_PWRGOOD1_R AN14 AP29 XDP_TDO_M R312 1K_0402_5%
2
+1.5V_CPU 0_0402_5% R25 VCCPWRGOOD_1 TDO_M XDP_TDI_M 1 @ 2
AN25 R26 0_0402_5%
DBR# XDP_DBRESET# 27
H_PWRGOOD 2 1 H_PWRGOOD0_R AN27
30 H_PWRGOOD VCCPWRGOOD_0
C 0_0402_5% R24 XDP_TDO_R 1