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Trident L32A9-AK
5 4 3 2 1
C306 C308 C310 C313 C315 C317 C319 C311
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF Connector for Amtel AT76C112 Video Output
VDDMQ if not a test pad, an enlarged via
VDDM VCC
underneath the chip or exposed
trace. Possible DQS MCLK
exposed trace, DQ enlarged via
E_PWM
C305 C307 C309 C312 C314 C316 C318 C320 R1 R2
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF VDDMQ MPUGPIO0 P_17 GPIO PWM
MPUGPIO1 1K5 4K7
D VDDMQ MPUGPIO2 R3 0R_DNS D
MPUGPIO3 R4 0R_DNS R5 4K7
BRT_CNTL
3
MPUGPIO4 R7
179
175
171
161
157
153
136
134
124
119
103
173
176
169
155
158
151
132
129
121
116
105
101
139
141
192
193
191
190
189
188
P_17 R6 10R Q1 C1 + C2
99
95
85
81
77
98
87
80
83
MD[0..31] U1A 1
10K MMBT3904 10uF/16V 100nF
MPUGPIO0
MPUGPIO1
MPUGPIO2
MPUGPIO3
MPUGPIO4
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VDDR
VSSR
NC
MD0 C3
2
73 MD0
MD1 75 100pF
MD2 MD1
76 MD2
MD3 78
MD4 MD3
84 MD4 P_17 17 P_17
MD5 86 18 R8 0R_DNS
Test pads for DDR MD6
MD7
88
MD5
MD6
FLD/IO FIELD
AD[0..7]
90 MD7 SDA 16 SDA_EX
MD8 91 14 SCL_EX SDA_EX R9 68R
MCLK0# MD9 MD8 SCL SCL_EX 3V_SDA
TP25 93 RP1 R10 68R
MD10 94 MD9 AD7 3V_SCL
TP_T_C30 203 5 4 100Rx4
MCLK0 TP1 MD11 96 MD10 A_D7 AD6 C4
MD11 A_D6 202 6 3
TP_T_C30 MD12 102 201 7 2 AD5 C5
MD13 104 MD12 A_D5 AD4 68pF
MD13 A_D4 200 8 1
DQS0 TP2 MD14 106 197 5 4 AD3 68pF VD3_3
C
DQM0
TP_T_C30
TP3
MD15 108
MD16 148
MD17 150
MD14
MD15
MD16
SVP-EX [256] A_D3
A_D2
A_D1
196
195
194
6
7
8
3
2
1
AD2
AD1
AD0 C
TP_T_C30 MD18 152 MD17 A_D0 RP2 100Rx4
MD0 TP4
TP_T_C30
MD19 154
MD20 160
MD21 162
MD18
MD19
MD20
(1 of 2) RD#
WR#
216
217
218
RD_EX
WR
33RX4 TO 100RX4
5V-1_CPU
R12
MD22 163 MD21 ALE ALE MPUCS0N
219 10K
MD23 165 MD22 MPUCS0N
MD23 INT# 220 INT# P_39
TP5 MD24 166
TP_T_C30 MD25 168 MD24 For EX52 to use
MD25 V5SF 15
MD26 170 this table
TP6 MD27 172 MD26
MD27 TESTMODE 12
TP_T_C30 MD28 178 C6
MD29 180 MD28
MD30 181 MD29 R13 100nF
MD31 183 MD30 RESET 13 INPUT OUTPUT
DQM0 79 MD31
DQM0 BA1 147 BA1 MPUGPIO1 MPUGPIO0 MPUCS0N *CS1N MPUGPIO2 MPUGPIO3
DQM1 97 145 4K7
DQM2 159 DQM1 BA0 BA0
144 0 0 0 1 1 1
MVREF
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
MCK0#
DQM2 CLKE CLKE
MCK0
DQM3 177
DQS0
DQS1
DQS2
DQS3
MA11
MA10
RAS#
CAS#
CS0#
CS1#
142
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
DQM3 WE# WE#
0 1 1 0 1 1
1 0 1 1 0 1
100
156
174
109
111
112
114
115
117
118
120
122
123
125
126
213
212
211
210
209
208
207
206
130
131
133
135
137
138
140
82
DQM[0..3] SVP-EX_256
MVREF
B 1 1 1 1 1 0 B
DQS0
DQS1
DQS2
DQS3
CAS#
RAS#
4
3
2
1
4
3
2
1
TP24 R14 0R VDDH3_3
MA11
MA10
100Rx4
100Rx4
TP_T_C30
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
CS0# *CS1N is not a input or output pin
RP43
RP42
DQS[0..3] MCLK0# R14 MOVED PAGE 5. CS1N=0: SVP-EX CPU access enabled
MCLK0 R15 CS1N=1:SVP-EX CPU access disabled
33RX4 TO 100RX4
5
6
7
8
5
6
7
8
MA[0..11] 10K_DNS
MPUGPIO0
A7
A6
A5
A4
A3
A2
A1
A0
R16
A[0..7]
MPUGPIO1 R17 0R CS
1K RST_SVP
VDDH3_3 VDDH3_3
I2C Address:
Data/Address
R18 R19 multiplex
MPU has
MPUGPIO0
7E/7F
MPUGPIO0
10K 10K_DNS
MPUCS0N MPUGPIO4
A
PRELIMINARY A
I2C Address:
Address/Data
Populated
R20 R21
separated
Qingdao Haier Electronics Co.,Ltd.
MPU has
7C/7D
10K_DNS
Not
1K Title
SVP-EX 1 of 2
Size Document Number Rev
B W90DL-288---Q A-01
Date: 2005-07-21 Sheet 4 of 25
5 4 3 2 1
Trident L32A9-AK
5 4 3 2 1
C7 100nF C8 100nF P_24
P_24
64 P_64
63 P_63
62 P_62
61 P_61
60 P_60
59 P_59
58 P_58
57 P_57
56 P_56
55 P_55
54 P_54
53 P_53
52 P_52
51 P_51
50 P_50
49 P_49
48 P_48
47 P_47
46 P_46
45 P_45
44 P_44
43 P_43
42 P_42
41 P_41
40 P_40
39 P_39
38 P_38
37 P_37
36 P_36
35 P_35
34 P_34
33 P_33
32 P_32
31 P_31
30 P_30
29 P_29
28 P_28
27 P_27
26 P_26
25 P_25
24 P_24
CVBS2 Y_G1 P_25
CVBS HD_Y P_26 P_25
P_27 P_26
DIN[0..23] U1B R22
Place 75 ohm R23 P_28 P_27
P_28
resistors close P_29
P_64
P_63
P_62
P_61
P_60
P_59
P_58
P_57
P_56
P_55
P_54
P_53
P_52
P_51
P_50
P_49
P_48
P_47
P_46
P_45
P_44
P_43
P_42
P_41
P_40
P_39
P_38
P_37
P_36
P_35
P_34
P_33
P_32
P_31
P_30
P_29
P_28
P_27
P_26
P_25
P_24
DIN23