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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Table of Contents D
Page. 1 Cover
RIO Page. 2
Page. 3
Operation Block diagram
Power Sequence
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Page. 4 Clock distribution
Page. 5 Board Information
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Page. 6 Clock Generator
Page. 7~8 CPU
CPU :C7-M Page. 9 THERMAL SENSOR & FAN
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Page. 10~14 VIA VX700
Chip Set :VIA VX700 Page. 15 DDR-2 SODIMM
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C
Page. 16 FWH
Remarks : 7" LCD & Wibro Page. 17 LVDS to LVTTL & Tcon
Page. 18 LCD ANALOG POWER
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Page. 19 LCD GAMMA & CONNECTOR & INVERTER POWER
Page. 20 VGA CONNECTOR & LEVEL SHIFT
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Page. 21 HDD CONNECTOR
Model Name : RIO Page. 22 MICOM
Page. 23 WIBRO Conn.
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PBA Name : BA92-04225B Page. 24 SIM CONN. & USB
Page. 25 MINI PCI Conn.
Page. 26 TSP CONTROLLER & SUB B'D CONN. & SWITCH
Page. 27 AUDIO CODEC(Realtek) & ARRAY MIC
Dev. Step : PR Page. 28 AMP & HP & SPEAKER
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Page. 29 CHARGER B
Revision : 1.0 Page. 30 P3.3V_AUX & P5V_AUX
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Page. 31 P1.5V & VCCP
T.R. Date : 2006.05.16 Page. 32 DDR2 POWER
Page. 33 CPU VRM
C
Page. 34 SWTICHED POWER
Page. 35 MOUNT HOLE & RHE PEM & EMI FINGER & TP
Page. 36 SUB BOARD LEFT
DRAW CHECK APPROVAL Page. 37 SUB BOARD RIGHT
Page. 38 POWER DIAGRAM
Page. 39 TEST POINTS
Page. 40 POWER RAIL STAGE
S.Y. Kim S.K.Park J.S Euh
A
SAMSUNG
ELECTRONICS
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
OPERATION BLOCK DIAGRAM
FAN THERMAL 400 nanoBGA Type CLOCK
D Page 9 MONITOR CPU2_THERMDA/DC CPU GENERATOR D
VIA C7-M ICS952906
ADM1032 Refer to Page4
Page 9 Page 7,8 Page 6
400MHz FSB
VGA
USB Jack Right 964 uFCBGA Type CRT
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Page 20 Right Sub B'd
port0
Page 24 LVDS LVDS TO LVTTL LVTTL TCON
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7" WVGA LCD
SN75LVDS76ADGG CS5845
USB Jack Left Page 17 Page 17
Page 19
u ti
port1
VX700 User Button
Page 24
Page 10, 11, 12, 13, 14
TSP
s n
C 200P Enter C
400 MHz
Left Sub B'd ODD Power
SODIMM Menu
single CH DDR2 400MHz TSP Controller
MAX 1 GB
m e
port6 USB AD converter
Page 26 Page 15 CY7C63743-QXC ADS7846
Page 26 Page 37
USB port2
a id
4 WAY port4 USB SPI
Slide Button
ANT
Bluetooth
module Azalia
S f
Auto Scaler LPC
Page 36 IDE
FWH
PCI HD Audio
HEADPHONE
BlueTooth ALC262GR
Page 27 MIC
Page 36
B
ANT
USB
MINI PCI
Express
slot
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HDD-PATA
1.8" SFF
FWH
SST49LF008A
Page 16
MICOM
H8S-2110B MINI PCI CARD
Page 25
AMP
TPA0211
Page 28 SPK_2W
B
C
HGST Page 22
Page 23 Goldcrest slim
USIM Wireless LAN
Wibro Ready Page 21
Page 24
POWER & MIO S/W
HOLD S/W
Ctrl+Alt+Del
A A
LED FPC HDD RF CHG PWR Volumn +
SAMSUNG
ELECTRONICS
Volumn -
Page 26
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Power Sequence Block Diagram
16)P1.5V
31)CPU1_CPURST#
D 1)PRTC_BAT D
29)CPU1_PWRGD
24)VCC_CORE
19)VCCP 27)CPU1_CPURST#
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28-1)KBC3_CPURST#
8)P3.3V_AUX
10)KBC3_PWRBTN*
17)P3.3V
28)KBC3_VXPWRGD
7)P1.5V_AUX
9)KBC3_RSMRST
27)KBC3_IMVP4_PWRGD
30)PCI_RST#
n a
7)P1.5V_AUX
3)MICOM_P3V
11)CHP3_SLPS3*
12)CHP3_SLPS5*
C
u ti
30)PCI_RST#
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27)KBC3_IMVP4_PWRGD
26)IMVP4_PWRGD
17)P3.3V
25)CLK3_PWRGD*
C
4)KBC3_PWRSW*
3)MICOM_P3V
m e
a id
20)VTTPWRGD
22)P1.8V_MEM
S f
23)P0.9V
5)KBC3_SUSPWR 18)KBC3_VRON
21)KBC3_MEMON
7)P1.5V_AUX
8)P3.3V_AUX 7)P1.5V_AUX
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6)P5V_AUX
B 5)KBC3_SUSPWR B
16)P1.5V
6)P5V_AUX
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7)P1.5V_AUX 13)KBC3_PWRON
C
2)VDC
14)PWRON* 14)PWRON*
2)VDC
2)VDC
15)P5V
17)P3.3V
A A
SAMSUNG
ELECTRONICS
30)PCI_RST#
4 3 2 1
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CLOCK DISTRIBUTION
D D
CLK0_HOST_CPU
CLK0_HOST_CPU* CPU
100 MHz
CLK0_HOST_GMCH
CLK0_HOST_GMCH* 400 MHz
CLK1_MCLK0/0*
100 MHz
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CLK1_MCLK1/1* SODIMM
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CLK3_SMBCLK
CLK3_PCLKVX
33 MHz
u ti
LVDS to. LVTTL LCD T-CON
CLOCK GENERATOR
CLK3_GCLK TCON3_VCLK
s n
C
VX700 LCD1_CLK+ SN75LVDS86A TCON3_MCLK_IN
C
66MHz CS5845 LCD Panel
CY28411 or ICS954201
CLK3_XIN LCD1_CLK- DGG TCON3_HCLK
14.31818MHz
m e
AUDIO CODEC
CHP3_AZ_AUD_BCLK
ALC262-GR
a id
24MHz
CK-410M
CLK3_USB48
48 MHz
S f
Page 6
RTC Clock
CLK3_SMBCLK SMB3_CLK 32.786KHz USB
MAX100KHz
TSP
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B Wibro USIM_CLK CY7C63743 B
USIM
o
CLK3_PCLKMIN (MINI-E SLOT)
MINIPCI ADC
33 MHz TSP5_DCLK
C
LDS7846IRGVR
CLK3_PCLKFWH
FWH
33 MHz
KBC3_THERM_SMCLK
ADM1032ARM
KBC3_SMCLK Battery
CLK3_PCLKMICOM
MICOM 10MHz
A 33 MHz A
SAMSUNG
14.318MHz ELECTRONICS
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
BOARD INFORMATION
D D
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
PCI Devices Voltage Rails
Power Rail Descriptions
Devices IDSEL# REQ/GNT# Interrupts
PRTC_BAT 3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
g l
MINI PCI AD20 (14h) 3 B, C VDC Primary DC system power supply (9 to 19V)
P5V_AUX 5.0V power rail (off in S4-S5)
P3.3V_AUX 3.3V power rail (off in S4-S5)
EIDE AD15 (0Fh) P1.5V_AUX VX700 Power Source(off in S4-S5)
USB AD16 (10h) Programable P1.8_MEM DDR2 Memory Power(off in S4-S5)
n a
LPC AD17 (11h) P0.9V 0.9V DDR II Reference(off in S3-S5)
PCI to PCI AD19 (13h)
P5V 5.0V switched power rail (off in S3-S5)
P3.3V 3.3V switched power rail (off in S3-S5)
P1.5V 1.5V switched power rail (off in S3-S5)
u ti
P2.5V 2.5V switched power rail (off in S3-S5)
I2C / SMB Address VCCP
VCC_CORE
1.05V power ralil for VIA C7-M, VX700
Core voltage for VIA C7-M CPU
s n
C Devices Address Hex Bus MICOM_P3V 3.3V for MICOM C
INV_VDC DC power (Inverter)
VX700 Master - SMBUS Master LCD_VDD3V 3.3V (LCD)
VCC_CRT 5V (CRT)
CK-410M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable AUD_P5V 5V Audio Voltage
SODIMM0 1010 000X A0h - AVDD 4.75V (Audio AMP)
AMP_VDD 5V (Audio AMP)
m e
MICOM Master 3.3V_SUB 3.3V for BLUETOOTH
5.5V_SUB 5.5V for Touch_Screen
BATTERY 0001 011h 16h -
THERMAL MORNITOR x100 1100 4Ch -
USB PORT Assign
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
RIGHT SIDE USB PORT
LEFT SIDE USB PORT
TSP CONTROLLER
BLUETOOTH
WIBRO
EMPTY
a id
S f
CPU Core Voltage Table
VID5 VID4 VID3 VID2 VID1 VID0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
Voltage
1.708 V
1.692 V
1.676 V
1.660 V
1.644 V
VID5 VID4 VID3 VID2 VID1 VID0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
Voltage
1.196 V
1.180 V
1.164 V
1.148 V
1.132 V
n
0 0 0 1 0 1 1.628 V 1 0 0 1 0 1 1.116 V
0 0 0 1 1 0 1.612 V 1 0 0 1 1 0 1.100 V
B -
0 -
0 0 1 1 1 1.596 V 1 -
0 0 1 1 1 1.084 V B
0 0 1 0 0 0 1.580 V 1 0 1 0 0 0 1.068 V
0 0 1 0 0 1 1.564 V 1 0 1 0 0 1 1.052 V
o
System Power States 0