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1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
Soyuz 2.0 SYSTEM DIAGRAM 01
DDRII-SODIMM1 DDRII 667/800 MHz
LAYER 2 : SGND1 AMD Lion CPU THERMAL
PAGE 8,9 Sabie SENSOR
A
LAYER 3 : IN1 Griffin A
S1G2 Processor PAGE 7 14.318MHz
LAYER 4 : IN2 DDRII-SODIMM2 DDRII 667/800 MHz
638P (uPGA)/35W
LAYER 5 : VCC PAGE 8,9 PAGE 5,6,7 CPU_CLK
NBGFX_CLK CLOCK GEN
LAYER 6 : IN3 NBGPP_CLK ICS9LPRS476AKLFT-->HP
LAYER 7 : SGND2 SBLINK_CLK SLG8SP626VTR-->HP
HT3 RTM880N-795 -->HP
LAYER 8 : BOT PAGE 4
PCI-E CRT
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PAGE 20
NORTH BRIDGE
TV_OUT Express Mini PCI-E
LVDS
LAN RS780M
Cable VGA Realtek Card Card PAGE 19
Docking RJ-45 PCIE-LAN
21mm X 21mm, 528pin BGA
(NEW CARD) (Wireless
CIR/Pwr btn RTL8111C S-Vidio
B
LAN/ROBSON/TV) B
SPDIF Out (10/100/GagaLAN)
Side port
PAGE 20 (2.0/1.1)
Stereo MIC PAGE 26,27 PAGE 28 PAGE 31
Headphone Jack Express Card x1
PAGE 10,11,12,13 Cable Docking x1
USB Port 256mb RAM
WLAN X1
VOL Cntr RJ45 PCIE X4 PAGE 10 PAGE 28,32
PAGE 32 SBSRC_CLK
PAGE 26 2,4,8
USB2.0
SATA - HDD
SATA0 150MB 0,1,6 7 12 13 9 3
USB2.0 Ports Camera Fingerprint Touch Bluetooth Card Reader
PAGE 28 SOUTH BRIDGE Screen RTS5158
SYSTEM CHARGER(ISL6251A) X3
PAGE 25 PAGE 19 PAGE 19 PAGE 19 PAGE 25 PAGE 21
PAGE 39 SB700
SATA - CD-ROM
SATA0 150MB (2.0/1.1) (2.0) (1.1) (1.1) (2.0) (2.0)
21mm X 21mm, 528pin BGA
SYSTEM POWER MAX1631A PAGE 28
4.5W(Ext) Memory
PAGE 33 CardReader
C 4.3W(Int) C
Azalia PAGE 21
DDR II SMDDR_VTERM PAGE 14,15.16.17.18
1.8V/1.8VSUS
PAGE 36
VCCP +1.1V AND +1.2V(RT8204)
LPC ALC268
Digitally signed b
MDC DAA
PAGE 34
Keyboard PAGE 24
PAGE 22
DN: cn=dd, o=dd
PAGE 29 ENE KBC
ou=dd,
CPU CORE ISL6265A
PAGE 35 CIR X2 KB3926 Bx AUDIO
Amplifier
email=dddd@ya
PAGE 30
Touch Pad PAGE 23
com, c=US
PAGE 30 PAGE 30
Date: 2009.11.20
D D
Digital MIC AUDIO CONN SPEAKER
(Phone/ MIC) Conn
20:46:17 +07'00'
PAGE 22 PAGE 22 PAGE 23
FAN SPI PROJECT : TT9
Quanta Computer Inc.
PAGE 32 PAGE 30 Size Document Number Rev
Custom Block Diagram 1A
NB5/RD2/HW1
Date: Wednesday, January 23, 2008 Sheet 1 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1
INDEX Power & Ground
Pg# Description NOTE Label
+VIN
ACTIVE
S0, S3, S4, S5
Description
AC ADAPTER (18.5V)
Control
Signal 02
1 Schematic Block Diagram
+BATT S0, S3, S4, S5 MAIN BATTERY + (6.2V-8.4V)
2 System Information
D D
+AVBAT S0, S3, S4, S5 RTC & KBC POWER (3.3V)
3 Power sequence chart
+12VALW S0, S3, S4, S5 +12V
4 CLOCL GENERATOR
+VCORE S0 CPU CORE POWER (0.375-1.5V) VRON
5-7 AMD CPU S1G2 Griffin
+CPUVDDNB S0 CPU CORE POWER (1.375-1.5V) VRON
8-9 DDR II SO-DIMM
+1.1V_NB S0 +1.1 to +1.0 DYN VRON
10-13 RS780M
+1.1V S0 +1.1V VRON
14-18 SB700
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+1.2VS5 S0, S3, S4, S5 S5_ON
19 LCD CONNECTOR / LCD PWR / LID
+1.2V S0 +1.2V VRON
20 20--CRT,TV_OUT
+3V S0 MAINON
21 RTS5158E & CR SOCKET
+3VSUS S0, S3 SUSON
22 Azalia ALC268
C C
+3VS5 S0, S3, S4, S5 S5_ON
23 JACK/AMP_TPA0312
+3VPCU S0, S3, S4, S5 ALWAYS POWER (3V)
24 Si3080 and MDC1.5 Connector
+5V S0 MAIND
25 Blue Tooth / USBX3 / TPM
+5VSUS S0, S3 SUSON
26 RTL8111C/RJ45
+5VPCU S0, S3, S4, S5 ALWAYS POWER (5V)
27 LAN Power
+1.5V S0 MAIND
28 NEW CARD/SATA ODD/SATA HDD
+1.8VSUS S0, S3 DDR CORE POWER SUSON
29 LED/KEYBOARD/SW
+1.8V S0 MAINON
30 KB3926/ROM/TP
+2.5V S0 CPU VDDA VR2.5_ON
31 Mini CARD/Hole
+0.9VSMVTT S0 DDR COMMAND & CONTROL PULL UP POWER MAINON
B 32 CABLE DOCKING/FAN B
+0.9VSMVREF_DIMM S0, S3 DDR REF POWER SUSON
33 3V/5V(MAX1631A)
+AVDD S0 AUDIO ANALOG POWER (5V) MAINON
34 +1.2V/+1.1V (RT8204)
+3VLANVCC S0, S3, S4, S5 LAN Power LAN_ON
35 +CPU_CORE ISL6265
36 +1.8VSUS/+1.8V/+2.5V
GND ALL PAGES DIGITAL GROUND
37 +1.1V/+1.2V_S5/+1.5V
38 DISCHARGE AGND AUDIO GND
39 Charger (ISL6251)
SMBUS SMBUS function define
SMBCLK0
* --> Un-stuff (ex. *1K/04) DDR / DDR THER / CLOCK GEN (+3V)
A
SMBDAT0 A
04-- 0402 footprint SMBCLK1
06-- 0603 footprint Mini Card (+3VS5)
SMBDAT1
08-- 0805 footprint
SMBCLK2
12-- 1206 footprint
SMBDAT2
New CARD (+3VS5) PROJECT : TT9
F-- 1% tolerance Quanta Computer Inc.
Size Document Number Rev
Custom System Information 1A
NB5/RD2/HW1
Date: Wednesday, January 23, 2008 Sheet 2 of 41
5 4 3 2 1
5 4 3 2 1
03
CPU Power Group A CPU Power Group B 3VPCU/5VPCU
D EC Pin98 D
SUSON HWPG VRM_PWRGD NBSWON1#
+VCORE0
+1.8VSUS
DNBSWON#
EC Pin33
S5_ON
VR_ON
+VCORE1
RSMRST#
+0.9VSMVTT
SUSC
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+CPUVDDNB
EC Pin102 SUSB
VR2.5_ON
+2.5V SUSON
HWPG
+1.2V
C MAINON C
EC Pin33 VR_ON
EC Pin101
VR_ON HWPG
S5_ON S5_OND +1.1V
VR2.5_ON
Delay +3VS5
HWPG
EC Pin101
EC Pin33
S5_ON HWPG
VR_ON VRM_PWRGD
+1.2VS5 +1.1V DYN
ECPWROK
NB_PWRGD_IN
+5VSUS EC Pin99
HWPG
MAINON
+1.5V SB_PWRGD_IN
B B
EC Pin98
SUSON SUSD CPU CLK IN
Delay +3VSUS
CPU RESET
EC Pin99
MAINON 1.8V_OND +1.8V CPU POWER OK
+5V Delay
CPU_LDTSTOP#
EC Pin99 EC Pin100
MAINON MAIND LAN_POWER LAN_ON
Delay +3V Delay +3VLANVCC
A A
PROJECT : TT9
Quanta Computer Inc.
Size Document Number Rev
Custom Power control 1A
NB5/RD2/HW1
Date: Wednesday, January 23, 2008 Sheet 3 of 41
5 4 3 2 1
5 4 3 2 1
0.2A NB CLOCK INPUT TABLE
60 ohm, 0.5A
+1.2V L29
600 ohms@100Mhz
FBM-11-160808
C273
22U/6.3VC_8
C542
0.1U/10VC_4
C539
0.1U/10VC_4
C541
+1.2V_CLKVDDIO
C269
0.1U/10VC_4 0.1U/10VC_4
C563
0.1U/10VC_4
C548
0.1U/10VC_4
Clock chip has internal serial
terminations
for differencial pairs, external resistors
are
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
RX780
100M DIFF
100M DIFF
RS780
100M DIFF
100M DIFF
04
reserved for debug purpose. 14M SE (1.8V) 14M SE (1.1V)
0.5A REFCLK_N NC vref
DCR: 0.5 ohm GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
D +3V_CLKVDD D
600 ohms@100Mhz
GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT
+3V L30 FBM-11-160808 +3V_CLKVDD
GPPSB_REFCLK 100M DIFF 100M DIFF
60 ohm, 0.5A
C276 C284 C567 C565 C547 C544 C540 C545 C569 C557
22U/6.3VC_8 2.2U/6.3VC_6 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4 0.1U/10VC_4
+3V_CLKVDD
Place very
close to
C/G Place within 0.5"
L31 +3V_CLK_VDDA U31A
BLM18PG221SN1D of CLKGEN R418 *261/F_4
C551
C295 49 56 CPUCLK0P RP37 4 3 0X2_4P2R_4 CPUCLKP
VDDA CPUKG0T_LPRS CPUCLKP 5
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22U/6.3VC_8 2.2U/6.3VC_6 48 55 CPUCLK0N 2 1 CPUCLKN
GNDA CPUKG0C_LPRS CPUCLKN 5
+3V_CLK_VDDA 62 33 NBGFXCLK0P RP32 4 3 0X2_4P2R_4 NBGFX_CLKP
VDDREF ATIG0T_LPRS NBGFX_CLKP 12
66 32 NBGFXCLK0N 2 1 NBGFX_CLKN
GNDREF ATIG0C_LPRS NBGFX_CLKN 12
C570 31
ATIG1T_LPRS
69 VDD48 ATIG1C_LPRS 30
2.2U/6.3VC_6 29 26
VDDATIG ATIG2T_LPRS
54 VDDCPU ATIG2C_LPRS 25
61 VDDHTT
38 VDDSB_SRC SB_SRC0T_LPRS 40
17 VDDSRC SB_SRC0C_LPRS 39
C 44 VDDSATA SB_SRC1T_LPRS 35 C
+3V_CLKVDD 3 34
VDDDOT SB_SRC1C_LPRS
28 VDDATIG_IO SRC0T_LPRS 23
53 VDDCPU_IO SRC0C_LPRS 22
37 21 PCIENEWCLK0P RP31 4 3 0X2_4P2R_4PCIE_NEW_CLKP
VDDSB_SRC_IO SRC1T_LPRS PCIE_NEW_CLKP 28
12 20 PCIENEWCLK0N 2 1 PCIE_NEW_CLKN
VDDSRC_IO1 SRC1C_LPRS PCIE_NEW_CLKN 28
+1.2V_CLKVDDIO 18 16 PCIEMINICLK1P RP33 4 3 0X2_4P2R_4PCIE_MINI1_CLKP
VDDSRC_IO2 SRC2T_LPRS PCIE_MINI1_CLKP 31
15 PCIEMINICLK1N 2 1 PCIE_MINI1_CLKN
SRC2C_LPRS PCIE_MINI1_CLKN 31
14 PCILANCLK0P RP34 4 3 0X2_4P2R_4PCIE_LAN_CLKP
SRC3T_LPRS PCIE_LAN_CLKP 26
72 13 PCILANCLK0N 2 1 PCIE_LAN_CLKN
GND48 SRC3C_LPRS PCIE_LAN_CLKN 26
27 10 SBLINKCLK0P RP36 4 3 0X2_4P2R_4SBLINK_CLKP
GNDATIG1 SRC4T_LPRS SBLINK_CLKP 12
6 9 SBLINKCLK0N 2 1 SBLINK_CLKN
GNDDOT SRC4C_LPRS SBLINK_CLKN 12
52 GNDCPU SRC5T_LPRS 8
PV Modify for RTC problem 58 7
GNDHTT SRC5C_LPRS SBSRCCLK0P RP35
47 GNDSATA SRC6T/SATAT_LPRS 46 4 3 0X2_4P2R_4SBSRC_CLKP SBSRC_CLKP 14
36 45 SBSRCCLK0N 2 1 SBSRC_CLKN
GNDSB_SRC SRC6C/SATAC_LPRS SBSRC_CLKN 14
11 GNDSRC1 SRC7T_LPRS/27Mhz_SS 5
19 4 SI EMI request
GNDSRC2 SRC7C_LPRS/27Mhz_NS
60 NBHTREFCLK0P R416 0_4 NBHT_REFCLKP
HTT0T/66M_LPRS NBHT_REFCLKP 12
C299 22P/50VA_4 CG_XIN CG_XIN 67 59 NBHTREFCLK0N R417 0_4 NBHT_REFCLKN
X1 HTT0C/66M_LPRS NBHT_REFCLKN 12
CG_XOUT 68 71 CLK48MUSBCR R405 33_4 CLK_48M_USB_CR
X2 48MHz_0 CLK_48M_USB_CR 21
2
70 CLK48MUSB R412 33_4 CLK_48M_USB
48MHz_1 CLK_48M_USB 15
Y3 CLK_PD# 57
14.318MHZ PD# SEL_HT66
REF0/SEL_HTT66 65
64 SEL_SATA
1
C300 22P/50VA_4 CG_XOUT PCLK_SMB REF1/SEL_SATA SEL_27 R415 158/F_4
8,9,15 PCLK_SMB 1 SMBCLK REF2/SEL_27 63 EXT_NB_OSC 12
PDAT_SMB 2 R165 1 2 90.9/F_4
8,9,15 PDAT_SMB SMBDAT
24 CLKREQ0#
B CLKREQ0# EXT_NWD_CLK_REQ# B
CLKREQ1# 51 EXT_NWD_CLK_REQ# 28
50 CLK_MINI_OE#
CLKREQ2# CLK_MINI_OE# 31
1 2 SB_SRC_SLOW# 41 43 CLKREQ3# For RS780 1.1V
16 CHIPSET_PCIE_SLOW_SB# SB_SRC_SLOW# CLKREQ3#
D10 *CH501H-40PT L-F 42 CLKREQ4#
CLKREQ4#
+3V
RTM880N-795-VB-GR
SI Fix SRC signal use
73 THERMAL GND 77 CLKREQ0# 8.2K_4 R496
eGND73 eGND77
74 eGND74 eGND76 76
75 78 CLKREQ3# *8.2K_4 R497
eGND75 eGND78
CLKREQ4# *8.2K_4 R498
U31B
RTM880N-795-VB-GR CLK_MINI_OE# 8.2K_4 R499
+3V_CLKVDD SI Fix bios can not write
SI Modified -- add clock
request pin pull Hi for new
version clock gen