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Compal Confidential 2
DAT20 Schematics Document
Banias uFCPGA Package with 855PM(Odem) + ICH4-M
2003-09-25
3 3
REV: 0.3
4 4
Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom DAT20 LA-1971 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, September 26, 2003 Sheet 1 of 42
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A B C D E
Compal confidential Block Diagram
Model Name : DAT20
File Name : LA-1971 Rev:0.3 Mobile Banias Thermal Sensor Clock Generator
Part Number : DA8AT20L000
uFCPGA CPU ADM1032ARM ICS950810CG
page 4,5
1 478pin page 4 page 12 1
HA#(3..31)
Fan Control CRT System Bus HD#(0..63)
page 29 400MHz
TV-OUT CONN.18
page
Memory
BUS(DDR) DDR-SO-DIMM X2
AGP4X(1.5V)
Odem-B 2.5V 200/266/333MHz BANK 0, 1, 2, 3 page 9,10,11
VGA
Board AGP Conn uFCBGA-593 pin
page 17
PIRQA#
page 6,7,8
2 HUB-LINK 2
IDSEL: AD20
IDSEL: AD18 PIRQA# USB port 4 USB port 5
PIRQG#, PIRQH# USB port 0, 2 USBx2
IDSEL: AD16 IDSEL: AD17 GNT#2, REQ#2
GNT#1, REQ#1 SERIRQ
GNT#4, REQ#4
PIRQE#
GNT#0, REQ#0
PIRQF#
GNT#3, REQ#3 PCI BUS BlueTooth I/F I-Stick
3.3V 33MHz 3.3V 48MHz
USB conn page 24
ICH4-M page 24
page 26
3.3V 24.576MHz AC-LINK
MINI 1394 Controller LAN CardBus BGA-421
PCI I/F TI TSB43AB21A RTL 8101L ENE CB1410 page 13,14,15
3.3V ATA100
page 23 page 22 page 21 page 19
3 1394 3
Connector
RJ45 Slot 0 LPC BUS
page 21 page 20
page 22 3.3V 33MHz
DC/DC Interface LED INDICATOR
Suspend SIO LPC47N217 TPM MS/SD/MMC ENE KB910 AC97
HDD CDROM
page 33 page 17 page 29 Base I/O Address 2Eh SLD9630TT W83L518D LPC to X-BUS Codec
page 25
Base I/O Address 4Eh Base I/O Address 4Eh
& KBC page 16 page 16
ALC250
page 30
page 24 page 32 page 27
Power Circuit Power On/Off PARALLEL
DC/DC
page
Reset & RTC page 26 AMP& Phone
34,35,36,37,38,39,40
BIOS Touch Pad
page 29 page 28 page 17 Jack
4 page 31 4
FIR Int.KBD
page 24 page 17
Compal Electronics, Inc.
Title
Legacy I/O Option Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom DAT20 LA-1971 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, September 26, 2003 Sheet 2 of 42
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A B C D E
Voltage Rails Board ID Table for AD channel
Power Plane Description S0-S1 S3 S5
Vcc 3.3V +/- 5%
Ra 100K +/- 5%
VIN Adapter power supply (19V) N/A N/A N/A Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 0 0 0 V 0 V 0 V 1
+CPU_CORE Core voltage for CPU ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+VCCP 1.05V rail for Processor I/O ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.2VS 1.2VS switched power rail for MCH ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.25VS 1.25V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.5VALW 1.5V power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+1.5VS AGP 4X ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+1.8VS 1.8V switched power rail ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V
+2.5V 2.5V power rail ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3V 3.3V power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5V 5V power rail ON ON OFF
Board ID PCB Revision
2 2
+5VS 5V switched power rail ON OFF OFF
0 0.1
+12VALW 12V always on power rail ON ON ON* * 1 0.2
+RTCVCC RTC power ON ON ON
2 0.3
3 0.4
4
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 5
6
7
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
VGA PIRQA
C ardBus AD20 2 PIRQA
LAN AD17 3 PIRQF
3
Mini-PCI AD18,AD22 1/4 PIRQG/PIRQH 3
1394 AD16 0 PIRQE
EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Smart Battery 0001 011X b ADM1032 1001 110X b
EEPROM(24C16/02) 1010 000X b
(24C04) 1011 000Xb
ICH4-M SM Bus address
Device Address
Clock Generator (
ICS950810CG) 1101 001Xb
DDR DIMM0 1010 000Xb
4 4
DDR DIMM1 1010 001Xb
Compal Electronics, Inc.
Title
Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom DAT20 LA-1971 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, September 26, 2003 Sheet 3 of 42
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A B C D E
H_RS#[0..2] HD#[0..63]
H_RS#[0..2] 6 HD#[0..63] 6
+3VS
HA#[3..31]
6 HA#[3..31]
H_REQ#[0..4]
6 H_REQ#[0..4]
JP11A 1
1
HA#3 P4 A19 HD#0 C50
HA#4
HA#5
U4
A3#
A4#
Banias D0#
D1# A25 HD#1
HD#2
Place closed to
2
0.1U_0402_16V4Z R27
@10K_0402_5%
V3 A5# D2# A22 CPU related Pin
HA#6 R3 B21 HD#3 1 C49
HA#7 A6# D3# HD#4 A18 / B18 2200P_0402_50V7K
V2 A24
2
HA#8 A7# D4# HD#5 U9
1 W1 A8# D5# B26 1
HA#9 T4 A21 HD#6 THERMDA 2 1
+VCCP HA#10 A9# D6# HD#7 2 D+ VDD1
W2 A10# D7# B20
HA#11 Y4 C20 HD#8 THERMDC 3 6
HA#12 A11# D8# HD#9 D- ALERT#
Y1 A12# D9# B24
1 R216
2 ITP_TDI HA#13 U1 D24 HD#10 8 4 1032_THERM#
A13# D10# 27 EC_SMC2 SCLK THERM#
150_0402_5% HA#14 AA3 E24 HD#11
HA#15 A14# D11# HD#12
Y3 A15# D12# C26 27 EC_SMD2 7 SDATA GND 5
1 R214
2 ITP_TRST# HA#16 AA2 B23 HD#13
680_0402_5% HA#17 A16# D13# HD#14
AF4 A17# D14# E23
HA#18 AC4 C25 HD#15 ADM1032ARM_RM8
HA#19 A18# D15# HD#16
AC7 A19# D16# H23
HA#20 AC3 G25 HD#17
HA#21 A20# D17# HD#18
AD3 A21# D18# L23
Note: HA#22 AE4 M26 HD#19
HA#23 A22# D19# HD#20
Placement near to CPU Conn AD2 A23# D20# H24
HA#24 AB4 F25 HD#21
HA#25 A24# D21# HD#22
AC6 A25# ADDR GROUP DATA GROUP D22# G24
HA#26 AD5 J23 HD#23
HA#27 A26# D23# HD#24
AE2 A27# D24# M23
HA#28 AD6 J25 HD#25
HA#29 A28# D25# HD#26
AF3 A29# D26# L26
HA#30 AE1 N24 HD#27
HA#31 A30# D27# HD#28
AF1 A31# D28# M25
H26 HD#29
H_REQ#0 D29# HD#30
R2 REQ0# D30# N25
H_REQ#1 P3 K25 HD#31
H_REQ#2 REQ1# D31# HD#32
T2 REQ2# D32# Y26
H_REQ#3 P1 AA24 HD#33
2 H_REQ#4 REQ3# D33# HD#34 2
T1 REQ4# D34# T25
U23 HD#35
D35# HD#36
6 H_ADSTB#0 U3 ADSTB0# D36# V23
AE5 R24 HD#37
6 H_ADSTB#1 ADSTB1# D37#
R26 HD#38
D38# HD#39
D39# R23
A16 AA23 HD#40
12 CLK_CPU_ITP ITP_CLK0 D40#
A15 U26 HD#41
12 CLK_CPU_ITP# ITP_CLK1 D41#
V24 HD#42
D42# HD#43
12 CLK_CPU_BCLK B15 BCLK0 D43# U25
B14 HOST CLK V26 HD#44
12 CLK_CPU_BCLK# BCLK1 D44#
Y23 HD#45
D45# HD#46
D46# AA26
Y25 HD#47 +VCCP
D47# HD#48
6 H_ADS# N2 ADS# D48# AB25
L1 AC23 HD#49
6 H_BNR# BNR# D49#
J3 AB24 HD#50 1 2 ITP_TDO
6 H_BPRI# BPRI# D50# HD#51 R217 @54.9_0402_1%
6 H_BR0# N4 BR0# D51# AC20
L4 AC22 HD#52 1 2 H_CPURST#
6 H_DEFER# DEFER# D52# HD#53 R219 @54.9_0402_1%
6 H_DRDY# H2 DRDY# D53# AC25
K3 AD23 HD#54 1 2 ITP_TMS
6 H_HIT# HIT# D54#
K4 CONTROL GROUP AE22 HD#55 R220 39.2_0603_1%
6 H_HITM# HITM# D55#
1 2 H_IERR# A4 AF23 HD#56
+VCCP R228 IERR# D56# HD#57 ITP_TCK
6 H_LOCK# J2 LOCK# D57# AD24 1 2
56_0402_5% H_CPURST# B11 AF20 HD#58 R215 27.4_0402_1%
6 H_CPURST# RESET# D58# HD#59
D59# AE21
AD21 HD#60
H_RS#0 D60# HD#61
H1 RS0# D61# AF25
H_RS#1 K1 AF22 HD#62 Note:
3 H_RS#2 RS1# D62# HD#63 3
L2 RS2# D63# AF26 Placement near to ITP Conn
6 H_TRDY# M3 TRDY#
DINV0# D25 H_DINV#0 6 Place closed to CPU pin B17
DINV1# J26 H_DINV#1 6
T1 @PAD BPM0# C8 T24
BPM0# DINV2# H_DINV#2 6
R224 T2 @PAD BPM1# B8 AD20 1 2 H_PROCHOT#
BPM1# DINV3# H_DINV#3 6 +VCCP
150_0402_5% T3 @PAD BPM2# A9 R209 56_0402_5%
R223 T4 @PAD BPM3# BPM2#
+3VALW 1 2 C9 BPM3#
0_0402_5% C23
DSTBN0# H_DSTBN#0 6
ITP_DBRESET# 1 2 A7 K24
14 ITP_DBRESET# DBR# DSTBN1# H_DSTBN#1 6
6 H_DBSY# M2 DBSY# DSTBN2# W25 H_DSTBN#2 6
7,13 H_DPSLP# B7 DPSLP# DSTBN3# AE24 H_DSTBN#3 6
7 H_DPWR# C19 DPWR# DSTBP0# C22 H_DSTBP#0 6
A10 PRDY# DSTBP1# L24 H_DSTBP#1 6
+VCCP 1 2 B10 PREQ# MISC DSTBP2# W24 H_DSTBP#2 6
R227 H_PROCHOT# B17 AE25
PROCHOT# DSTBP3# H_DSTBP#3 6
330_0402_5%
13 H_PW RGD E4 PWRGOOD
13 H_CPUSLP# A6 SLP#
ITP_TCK A13
R226 ITP_TDI TCK
C12 TDI
@1K_0402_5% ITP_TDO A12 C2
TDO A20M# H_A20M# 13
1 2 TEST1 C5 D3
TEST1 FERR# H_FERR# 13
1 2 TEST2 F23 A3
TEST2 IGNNE# H_IGNNE# 13
R208 ITP_TMS C11 B5
TMS INIT# H_INIT# 13
@1K_0402_5% ITP_TRST# B13 D1
TRST# LINT0 H_INTR 13
LINT1 D4 H_NMI 13
4 LEGACY CPU 4
THERMAL STPCLK# C6 H_STPCLK# 13
THERMDA B18 B4
THERMDC A18 THERMDA DIODE SMI# H_SMI# 13
THERMDC
14 H_THERMTRIP# C17 THERMTRIP#
AMP_1473129-1 Compal Electronics, Inc.
Title
Banias Processor in mFCPGA479 (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom DAT20 LA-1971 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, September 26, 2003 Sheet 4 of 42
A B C D E
A B C D E
+CPU_CORE
+CPU_CORE
JP11C
1 1 1 1
F20 VCC VSS T26
JP11B + C341 + C347 + C357 + C363 F22 U2
VCC VSS
G5 VCC VSS U6
R222 1 2 @54.9_0402_1% VCCSENSE AE7 A2 G21 U22
R225 1 VCCSENSE VSS 2 2 2 2 VCC VSS
2 @54.9_0402_1% VSSSENSE AF6 VSSSENSE VSS A5 H6 VCC VSS U24
A8 220U_D2_4VM_R12 220U_D2_4VM_R12 H22 V1
VSS 220U_D2_4VM_R12 220U_D2_4VM_R12 VCC VSS
VSS