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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

Table of Contents D

Sheet 1. Cover
Sheet 2 - 7. Diagram (Block/Power) & annotations

CICHLID 3 Sheet 8. Clock genertor
Sheet 9 - 11. YONAH667 / MEROM CPU(TBD)
Sheet 12. Thermal Sensor / FAN Control
Sheet 13 - 17. CALISTOGA-PM
Sheet18. DDR II SODIMM
Sheet19. DDR Termination
CPU :Intel Yonah 533/667(Merom) Sheet20 - 23. ICH7-M
Sheet24. FWH
Chip Set :Intel Calistoga PM & ICH7-M(B/H) Sheet25 - 28. NVIDIA G73M graphic controller
Sheet29. Video Moad Strap
Remarks : Mobility Platform Sheet30 - 31. Video memory C
Sheet32. VIDEO S.S / T.S / LCD connector
Sheet33. VGA EXT./INT. Switch
Sheet34 - 35. CARDBUS / 1394 / Media Card
Sheet36. eXpress card
Model Name : CICHLID 3 Sheet37. miniPCI & miniPCI express
Sheet38. AUDIO CODEC(AD1986A)
Sheet39. AUDIO AGC / AMP
PBA Name : MAIN Sheet40. AUDIO WOPER & AUDIO Connector
Sheet41. HDD, ODD connector & remote controller
PCB Code : BA41-00645A Sheet42. MICOM(2111B)
Dev. Step : PRR Sheet43. LAN (Broadcom 5751M)
Sheet44. MDC MODEM / USB0 / LAN connector
Revision : 1.4 Sheet45. B'D to B'D Connector
Sheet46. Charger B
Sheet47. P3.3V_ALWS / P5V_AUX Power
T.R. Date : Sheet48. P1.5V_AUX, VCCP
Sheet49. DDR2 Power
Sheet50. CPU VRM (VCC_CORE)
Sheet51. Switched Power
DRAW CHECK APPROVAL Sheet52. Graphic Core Power / P1.2V / P2.5V
Sheet53. HDD parking, TPM1.2 , Mount hole
Sheet54. DOCKING Connector , SUPER I/O
Sheet55. AUDIO Sub-B'D
Sheet56. Test point

A

SAMSUNG
Owner : SESC R&D TEAM_3 Signature : ELECTRONICS

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D

PCI Devices Crystal / Oscillator
Devices IDSEL# REQ/GNT# Interrupts TYPE FREQUENCY DEVICE USAGE
Cardbus AD25 0 E,F,G Crystal 32.768KHz ICH7-M Real Time Clock
LAN AD21 1 G Crystal 10MHz MICOM HD64F2169/2160
MiniPCI SLOT1 AD23 2 D,E Crystal 14.318MHz CLOCK-Generator CK-410M
USB AD29(internal) - USB2.0 #0 : A Crystal 24.576MHz Cardbus Controller 1394
USB2.0 #1 : D Crystal 25MHz LAN Intel LAN
USB2.0 #2 : C Crystal 27MHz VIDEO PEG (G73m)
Hub to PCI AD30(internal) - -
LPC bridge/IDE/AC97/SMBUS AD31(internal) - B
Internal MAC AD24(internal) - E
AC Link - - B

CPU Core Voltage Table IMVP-6
Voltage Rails
VDC Primary DC system power supply (7 to 21V) Active/Deeper Sleep
VCC_CORE Core voltage for YONAH (1.308~1.068V) Active Mode Deeper Sleep/Extended Deeper Sleep
C Dual Mode Region Dual Mode Region C
VCCP YONAH/CALISTOGA Processor System Bus(PSB) Termination (1.05V)
MCH-M Core Voltage
VID(6:0) Voltage VID(6:0) Voltage VID(6:0) Voltage
P0.9V 0.9V switched power rail (off in S3-S5)
P1.2V 1.2V switched power rail (off in S3-S5) 0 0 0 0 0 0 0 1.5000 V 0 1 0 1 0 0 0 1.0000 V 1 0 1 0 0 0 1 0.4875 V
P1.5V 1.5V switched power rail (off in S3-S5) 0 0 0 0 0 0 1 1.4875 V 0 1 0 1 0 0 1 0.9875 V 1 0 1 0 0 1 0 0.4750 V
0 0 0 0 0 1 0 1.4750 V 0 1 0 1 0 1 0 0.9750 V 1 0 1 0 0 1 1 0.4625 V
P1.8V 1.8V switched power rail (off in S3-S5) 0 0 0 0 0 1 1 1.4625 V 0 1 0 1 0 1 1 0.9625 V 1 0 1 0 1 0 0 0.4500 V
P1.8V_AUX 1.8V power rail(off in S4-S5) 0 0 0 0 1 0 0 1.4500 V 0 1 0 1 1 0 0 0.9500 V 1 0 1 0 1 0 1 0.4375 V
P2.5V 2.5V switched power rail (off in S3-S5) 0 0 0 0 1 0 1 1.4375 V 0 1 0 1 1 0 1 0.9375 V 1 0 1 0 1 1 0 0.4250 V
0 0 0 0 1 1 0 1.4250 V 0 1 0 1 1 1 0 0.9250 V 1 0 1 0 1 1 1 0.4125 V
MICOM_P3V 3.3V always on power rail for MICOM 0 0 0 0 1 1 1 1.4125 V 0 1 0 1 1 1 1 0.9125 V 1 0 1 1 0 0 0 0.4000 V
P3.3V 3.3V switched power rail (off in S3-S5) 0 0 0 1 0 0 0 1.4000 V 0 1 1 0 0 0 0 0.9000 V 1 0 1 1 0 0 1 0.3875 V
P3.3V_AUX 3.3V power rail (off in S4-S5) 0 0 0 1 0 0 1 1.3875 V 0 1 1 0 0 0 1 0.8875 V 1 0 1 1 0 1 0 0.3750 V
0 0 0 1 0 1 0 1.3750 V 0 1 1 0 0 1 0 0.8750 V 1 0 1 1 0 1 1 0.3625 V
P5V 5.0V switched power rail (off in S3-S5) 0 0 0 1 0 1 1 1.3625 V 0 1 1 0 0 1 1 0.8625 V 1 0 1 1 1 0 0 0.3500 V
P5V_AUX 5.0V power rail (off in S4-S5) 0 0 0 1 1 0 0 1.3500 V 0 1 1 0 1 0 0 0.8500 V 1 0 1 1 1 0 1 0.3375 V
0 0 0 1 1 0 1 1.3375 V 0 1 1 0 1 0 1 0.8375 V 1 0 1 1 1 1 0 0.3250 V
0 0 0 1 1 1 0 1.3250 V 0 1 1 0 1 1 0 0.8250 V 1 0 1 1 1 1 1 0.3125 V
P2.5V_ALWS 2.5V power rail (Always On)
0 0 0 1 1 1 1 1.3125 V 0 1 1 0 1 1 1 0.8125 V 1 1 0 0 0 0 0 0.3000 V
P3.3V_ALWS 3.3V power rail (Always On)
0 0 1 0 0 0 0 1.3000 V 0 1 1 1 0 0 0 0.8000 V 1 1 0 0 0 0 1 0.2875 V
P5V_ALWS 5V power rail (Always On) 0 0 1 0 0 0 1 1.2875 V 0 1 1 1 0 0 1 0.7875 V 1 1 0 0 0 1 0 0.2750 V
P12V_ALWS 12V power rail (Always On) 0 0 1 0 0 1 0 1.2750 V 0 1 1 1 0 1 0 0.7750 V 1 1 0 0 0 1 1 0.2625 V
0 0 1 0 0 1 1 1.2625 V 0 1 1 1 0 1 1 0.7625 V 1 1 0 0 1 0 0 0.2500 V
2 0 0 1 0 1 0 0 1.2500 V 0 1 1 1 1 0 0 0.7500 V 1 1 0 0 1 0 1 0.2375 V
0 0 1 0 1 0 1 1.2375 V 0 1 1 1 1 0 1 0.7375 V 1 1 0 0 1 1 0 0.2250 V
I C / SMB Address 0
0
0 1
1
0 1 1 0 1.2250 V 0
0
1 1
1
1 1 1 0 0.7250 V 1
1
1 0
0
0 1 1 1 0.2125 V
0 0 1 1 1 1.2125 V 1 1 1 1 1 0.7125 V 1 1 0 0 0
1 0.2000 V
Devices Address Hex Bus
B 0 0 1 1 0 0 0 1.2000 V 1 0 0 0 0 0 0 0.7000 V 1 1 0 1 0 0 1 0.1875 V B
0 0 1 1 0 0 1 1.1875 V 1 0 0 0 0 0 1 0.6875 V 1 1 0 1 0 1 0 0.1750 V
ICH7 Master - SMBUS Master 0 0 1 1 0 1 0 1.1750 V 1 0 0 0 0 1 0 0.6750 V 1 1 0 1 0 1 1 0.1625 V
EMC6N300(CPU Thermal Sensor) 1001 110X 9Ch Thermal Sensor 0 0 1 1 0 1 1 1.1625 V 1 0 0 0 0 1 1 0.6625 V 1 1 0 1 1 0 0 0.1500 V
SODIMM0 1010 0000 A0h - 0 0 1 1 1 0 0 1.1500 V 1 0 0 0 1 0 0 0.6500 V 1 1 0 1 1 0 1 0.1375 V
SODIMM1 1010 001X A2h - 0 0 1 1 1 0 1 1.1375 V 1 0 0 0 1 0 1 0.6375 V 1 1 0 1 1 1 0 0.1250 V
CK-410M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable 0 0 1 1 1 1 0 1.1250 V 1 0 0 0 1 1 0 0.6250 V 1 1 0 1 1 1 1 0.1125 V
0 0 1 1 1 1 1 1.1125 V 1 0 0 0 1 1 1 0.6125 V 1 1 1 0 0 0 0 0.1000 V
0 1 0 0 0 0 0 1.1000 V 1 0 0 1 0 0 0 0.6000 V 1 1 1 0 0 0 1 0.0875 V
0 1 0 0 0 0 1 1.0875 V 1 0 0 1 0 0 1 0.5875 V 1 1 1 0 0 1 0 0.0750 V
0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V
0 1 0 0 0 1 1 1.0625 V 1 0 0 1 0 1 1 0.5625 V 1 1 1 0 1 0 0 0.0500 V
USB PORT Assign 0
0
1
1
0
0
0
0
1
1
0
0
0
1
1.0500 V
1.0375 V
1
1
0
0
0
0
1
1
1
1
0
0
0
1
0.5500 V
0.5375 V
1
1
1
1
1
1
0
0
1
1
0
1
1
0
0.0375 V
0.0250 V
0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V
PORT NUMBER ASSIGNED TO 0 1 0 0 1 1 1 1.0125 V 1 0 0 1 1 1 1 0.5125 V 1 1 1 1 0 1
0 0 0.0000 V
1 0
1 1 0 0 0 0 0.5000 V 1 1 1 1 0 0 1 0.0000 V
0 SYSTEM PORT A 1 1 1 1 0 1 0 0.0000 V
1,2 SYSTEM PORT B Deeper Slp 1 1 1 1 0 1 1 0.0000 V
3 SYSTEM PORT C Active 1 1 1 1 1 0 0 0.0000 V
4 BLUETOOTH DPRSLPVR 0 DPRSLPVR 1 1 1 1 1 1 0 1 0.0000 V
5 PORT REPLICATOR DPRSTP* 0 1 1 1 1 1 1 0 0.0000 V
6 MINI PCIEXPRESS FINGER PRINT DPRSTP* 1 1 1 1 1 1 1 1 0.0000 V
7 EXPRESS CARD PSI2* 0 or 1 PSI2* 0 or 1
*"1111111" : 0V power good asserted.

System Power States
A CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped. *Yonah Processor (2.33 GHz / 800 MHz : TBD)
A
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power. SAMSUNG
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits. ELECTRONICS
Memory is retained, and refreshes continue. All clocks stop except RTC clock.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
Externally appears same as S5, but may have different wake events.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL B34 P3.3V
PROPRIETARY INFORMATION THAT IS MMZ1608S121AT
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. R310 2.2 B24
R364 2.2 MMZ1608S121AT
R337 2.2
FSA FSB FSC C259 R365 2.2
B25
HOST CLK 100nF C257 C258
CPU BSEL0 BSEL1 BSEL2 100nF 10000NF
MMZ1608S121AT
D D

10000NF
10V

100nF

100nF

100nF

100nF
0 0 0 266 MHz

10nF

10nF
C290 C292

10V
0 0 1 333 MHz 100nF 10000NF
10V

10K
10K
0 1 0 200 MHz

NO_STUFF
U20

C288

C311

C289

C310

C312
C287
C291
0 1 1 400 MHz
1 0 0 133 MHz ICS954305D

R339
R343
1 0 1 100 MHz 12 VDDCPU VDDREF 18
30 40
1 1 0 166 MHz 36 VDDPCI_1 VDD48 7
VDDPCI_2 VDDA
1 1 1 RSVD 49
VDDSRC_1
54
VDDSRC_2 CPU0
14 R361 33 1% 10-C3
CLK0_HCLK0
33 R342 1% 65 VDDSRC_3 CPU0* 13 R360 33 1% 10-C3
CLK0_HCLK0*
1
CLK3_FM48 VDDSRC_4
1% R336 2K 11 R362 33 1% 13-B2
CLK3_USB48 CPU1 CLK0_HCLK1
CPU1_BSEL0
21-B?
33 R338 1%
41
48M_FSA CPU1*
10 R359 33 1% 13-C2
CLK0_HCLK1*
10-B3 10-D4 14-A3 45
CPU1_BSEL1 FSB_TEST_MODE
10-B3 10-D4 14-A3 23 6 R418 33 1% 11-C4
CPU1_BSEL2
10-C3 10-D4 14-A3
REF0_FSC_TEST_SEL CPU2_ITP_SRC_10 5 33 1% 11-C4
CLK0_ITP
10K R355 CPU2*_ITP_SRC_10* R419 CLK0_ITP*
CHP3_CPUSTP*
24 CPU_STP*
CHP3_PCISTP*
21-C? 25
PCI_STP* CLKREQ1*
46 R393 10K 1%
21-C?
100 R347 1% CLKREQ2* 26 R356 10K 1%
39 28
CLK3_PWRGD*
12-C4 36-C2 42-?2 51-C3
VTT_PWRGD*_PD CLKREQ3* 57 14-D4