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5 4 3 2 1




D D




C
www.kythuatvitinh.com
Wistron Confidential C




MV
2008/05/15 REV :-1
B B




A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Karia
Size Document Number Rev
A3
KARIA - DISCRETE SH
Date: Friday, May 16, 2008 Sheet 1 of 58
5 4 3 2 1




KARIA DESCRETE BLOCK DIAGRAM
SYSTEM DC/DC SYSTEM DC/DC
TPS51120
SC471AML
INPUTS OUTPUTS
Project code : INPUTS OUTPUTS
91.4V901.001 B+ VGA_CORE 45
Intel CPU B+ +5VALW 7A
PCB P/N :
CLK GEN
Penryn
SYSTEM DC/DC +3VALW 6A
46
D
Revision : MV TPS5116
D

SLG8SP553 SYSTEM DC/DC
16
5,6,7 VRAM 0 58 INPUTS OUTPUTS SC412A
GDDR 3 B+ +1.8V 7A 47 INPUTS OUTPUTS
FSB VRAM 1 58 +0.9V 1A
HOST BUS
667/800/1067MHz +1.5VS 3A
B+ 50
+1.05VM 13A
48
DDRII Slot 0
800 14
DDRII 667/800 Channel A Cantiga PM ATI RGB CRT CRT




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AGTL+ CPU I/F 17
CHARGER
DDR Memory I/F M82-SCE
DDRII Slot 1 BQ27470
DDR II 667/800 Channel B INTEGRATED GRAHPICS PCIE x 16 LVDS LCD
800 15 18
LVDS, CRT I/F 52,53,54,55,56,57 INPUTS OUTPUTS
8,9,10,11,12,13

Smart Card Fingerprinter BATT
ISO7816 37 Ricoh Controller Thermal Sensor AES2810B BATT_A 18V 3.0A
C C

DMI x4 38
link 0 EMC2103 39 BATT_B 5V 100mA
1394 37
5C835 51
Accelerometer CAMERA38
CardReader PCI
INTEL
SD/MMC 37
SMBus LIS302DLTR24
CPU DC/DC
ICH9-M
36,37
Blue Tooth ISL6260A
12 USB 2.0/1.1 ports INPUTS OUTPUTS
Intel Ninevah-MM GLCI ETHERNET (10/100/1000Mb) USB 2.0 USB x 3 28
(BOAZ) High Definition Audio +VCC_CORE
RJ45 B+
10/100/1000 25 Serial Peripheral I/F 0.844~1.3V
CONN 26 HDD Cnn 44A
ACPI 1.1 SATA 43

LPC I/F
SATA 24
RJ11
MODEM
CONN 31 MDC V1.5 HD Audio
4 SATA
SATA ODD Cnn24 PCB LAYER
B
31 PCI/PCI BRIDGE B
L1: Signal 1
LPC Bus
AUDIO CODEC L2: GND
INTERNAL MIC 19,20,21,22,23
L3: Signal 2
ADI 1984A SPI
L4: Signal 3
L5: GND
C-LINK




PCIE x 2




PRE-AMP PCIE+USB 2.0 KBC TPM SMSC Super I/O
MIC IN TLV2462 SMSC KBC1091 SLB9635TT LPC47N217 40 L6: VCC
TI2231 30 29
L7: Signal 4
Headphone
SPI L8: Signal 5
L9: GND
Mini-Card*2 Flash ROM
Tauch Int. Capacitive
OP AMP Express Card 54 802.11abg/n 32Mb x 1(AMT) L10: Signal 6
A Pad 31 KB31 Button 38 A
TI 6041A WWAN 27 29

Digitally signed by dd
Wistron Corporation
DOCK
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DN: cn=dd, o=dd, ou=dd,
Taipei Hsien 221, Taiwan, R.O.C.


SPEAKER Title
[email protected],
PCIE*2 PS2 SATA*1 USB*2 Serial Port Parallel Port LINE IN/Out RJ45/RJ11 VGA DVI-D Block Diagram
Size Document Number c=US Rev
A3
KARIA - DISCRETE SH
Date: Friday, May 16, 2008
Date: 2009.12.04 20:27:18
Sheet 2 of 58

+07'00'
5 4 3 2 1
Discrete PV 5 4 3 2 1
03/11/08:
- Page 51 - Change R118 to 287K ohm from Vox information.
- Page 43 - Change R582.2 to +3VALW from +3VS to power U89.39 (3V3)
- Page 45 - Change R232 to NO INSTALL
- Page 30 - Remove D48, connect signal directly to ADP_PRES, and uninstall R558
- Page 27 - Reserve a 1u 0603 cap (NO INSTALL) on MC2_DISALBE (same as MC1_DISABLE)
- Page 19 - Add a 0 ohm series on PLT_RST# at U113.4
- Page 33 - Add a 0 ohm series on PM_PWROK_R at R175.2
D - Page 13 - Uninstall BGA_CRACK circuit: U115, U116, R740, R744, R801, & R802 D
- Page 23 - Uninstall BGA_CRACK circuit: U117, U118, R803, R804, R805, & R806
- Page 39 - Change R710 (SHDN_SEL) to 15K 1% to use Internal Diode for H/W critical shutdown
- Page 57 - Add a discharging FET (gate connect to Q15.D) on 3.3V_DELAY at Q42.D
- Page 25 - May require a discharging FET for +3VM_LAN at Q39.D
- Page 32 - May need to change RGB q-switches power to +5VALW or +5VS (depending on wavy impact)
- Page 51 - Change R97 to 33K from 1.27K
- Page 41 - Change DAUGTH1 pin 52 and pin 54 to +5VS from +5VALW
- Page 41 - Remove ICH_SMB_CLK/DATA from DAUGTH1 pin 32 and 34




C
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B B




A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change Notes List
Size Document Number Rev
A3
KARIA - DISCRETE SH
Date: Friday, May 16, 2008 Sheet 3 of 58
5 4 3 2 1



Voltage Rails o MEANS ON x MEANS OFF

+5VS IRQ Device
power +3VS
+BB +3VALW +1.8V +3VM
plane +1.8VS CLOCK 0 System Timer
LDO3 +5VALW +5V +1.5VS +1.05VM
LDO5 +0.9V +VGA_CORE 1 Keyboard
State +CPU_CORE
D +VCCP 2 N/A D



S0 o o o o o o 3 Serial port (COM2) ,LAN/Modem

4 Serial port (COM1)
S3/M1 o o o x o o 5 Audio/VGA

S3 o o o x o o 6 Floppy

S5 S4/AC o o x x o o 7 Parallel port

8 System CMOS/Real-time clock




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S5 S4/Battery only o x x x x x 9 Microsoft ACPI
S5 S4/AC & Battery
x x x x x x 10 N/A,Modem,LAN
don't exist
11 Mass storage control/PCI simple communication control
C PCI Devices C
12 synactic PS2 port GlidePAD

EXTERNAL IDSEL# REQ/GNT# PIRQ 13 Numeric Data Process
Cardreader&1394 AD25 2 G,E 14 Primary IDE interface ,HDD

PCIE Devices 15 Secondary IDE interface ,CD-ROM

NUMBER CHANNEL Mobile Intel Crestline Express Chipset Family
DEVICE
UWB(no support) 1 1 Microsoft UAA Bus Drive for High Definition Audio
16
WLAN 1 2 Intel 82801H (ICH9 Family) PCI Express Root Port -27D0

EXPRESS CARD 1 3 Broadcom NetXtreme Gigabit Ethernet

WWLAN 1 4 Intel 82801H (ICH9 Family) PCI Express Root Port -27D2
DOCKING 1 5 17 Broadcom 802.11b/g WLAN
GIGA LAN 1 6 Intel 82801H (ICH9 Family) USB Universal Host Control

B
Intel 82801H (ICH9 Family) USB Universal Host Control B



18
Richo R5C835 Integrates FlashMedia Control
Richo R5C835 Gemcore based SmartCard Control

Intel 82801H (ICH9 Family) PCI Express Root Port -27D6
19
USB PORT Device Intel 82801H (ICH9 Family) USB Universal Host Control
0 USB1 Intel 82801H (ICH9 Family) USB Universal Host Control
Symbols Description 20
1 Free Intel 82801H (ICH9 Family) USB2 Enhanced Host Control
2 EX-P DY/DUMMY No install
21 Intel 82801H (ICH9 Family) USB Universal Host Control
3 WLAN
1KR2J Resistor 1K ohm ,Size 0402 ,5%
4 USB2 22 SDA Standard Compliant SD Host Control
5 USB3 1KR3F Resistor 1K ohm ,Size 0603 ,1%
23 HP Mobile Data Protection Sensor
6 BLUETOOTH
GP ROHS parts
7 WWAN
A A
8 FignerPrint NC Pin no connect to anything
9 Dock1
1U16V2ZY-2GP Caps 1U ,Size 0402 Y5V Wistron Corporation
10 WEBCAM 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
11 DOCK2 2D2U6D3V3MX Caps 2.2U ,Size 0603 X5R
Title

Karia List
Size Document Number Rev
A3
KARIA - DISCRETE SH
Date: Friday, May 16, 2008 Sheet 4 of 58
5 4 3 2 1
5 4 3 2 1
H_A#[35..3]
8 H_A#[35..3]


U50A 1 OF 4 4 WIRE PWM Fan Control circuit +5VS_FAN 1 PAD15
TP28-75-GP
H_A#3 J4 H1 H_ADS# 8
A3# ADS# +5VS
H_A#4 L5 A4# BNR# E2 H_BNR# 8 Reserve for ITP
H_A#5 L4 G5 H_BPRI# 8 FAN_PW M 1 PAD16
H_A#6 A5# BPRI# TP28-75-GP




ADDR GROUP 0
K5 A6#




K
H_A#7 M3 H5 H_DEFER# 8 C21
A7# DEFER# +VCCP




1




1
H_A#8 N2 F21 H_DRDY# 8 C18 D5




CONTROL
A8# DRDY#




1
H_A#9 J1 E1 H_DBSY# 8 SC4D7U10V5ZY-3GP 1SS355PT-GP FAN_TACH 1 PAD14
D H_A#10 A9# DBSY# R52 TP28-75-GP D




SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
N3 A10#




2




2
H_A#11 P5 F1 H_BREQ#0 8 0R3-0-U-GP
A11# BR0#




A
1
H_A#12 P2 56R2J-4-GP
A12#
H_A#13 L2 A13# IERR# D20 1 2 R758 +VCCP DY R660 1 PAD6




2
H_A#14 P4 B3 51R2F-2-GP TP28-75-GP
A14# INIT# H_INIT# 20
H_A#15 P1 A15#
H_A#16 R1 A16# LOCK# H4 H_LOCK# 8 1031, reserved for RF




2
M1 H_CPURST# H_CPURST# 8
8 H_ADSTB#0 ADSTB0#
8 H_REQ#[4..0] C1 H_RS#[2..0] 8 FAN1
H_REQ#0 RESET# H_RS#0
K3 REQ0# RS0# F3 6
H_REQ#1 H2 F4 H_RS#1 +5VS_FAN 1
H_REQ#2 REQ1# RS1# H_RS#2
K2 REQ2# RS2# G3
H_REQ#3 J3 G2 H_TRDY# 8 2
H_REQ#4 REQ3# TRDY# 39 FAN_PW M
L1 REQ4# 39 FAN_TACH 3
HIT# G6 H_HIT# 8 4 1 TDI
H_A#17 Y2 E4 5
H_A#18 A17# HITM# H_HITM# 8 2 TMS
U5
H_A#19 R3
A18#
AD4 XDP_BPM#0 ETY-CON4-15-GP-U 3 TRST#
A19# BPM0# 4 NC




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H_A#20 W6 AD3 XDP_BPM#1
A20# BPM1#



XDP/ITP SIGNALS
H_A#21 XDP_BPM#2
H_A#22
U4
Y5
A21# ADDR GROUP 1 BPM2# AD1
AC4 XDP_BPM#3
5 TCK
H_A#23 A22# BPM3# XDP_BPM#4 6 NC
U1 A23# PRDY# AC2
H_A#24 R4 AC1 XDP_BPM#5 7 TDO
A24# PREQ#
H_A#25 T5 A25# TCK AC5 XDP_TCK 8 BCLK#
H_A#26 T3 AA6 XDP_TDI
H_A#27 A26# TDI XDP_TDO
9 BCLK
W2 AB3
H_A#28 W5
A27# TDO
AB5 XDP_TMS 10 GND
H_A#29 A28# TMS XDP_TRST# 11 FBO
Y4 A29# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# 12 RESET#
A30# DBR# XDP_DBRESET# 21
C H_A#31
H_A#32
V4
W3
A31# 13 BPM5# C
H_A#33 A32# CPU_PROCHOT#_R 43 14 GND
AA4 A33# THERMAL
H_A#34 AB2 A34# 1 2 +VCCP 15 BPM4#
H_A#35 AA3 D21 H_PROCHOT# R766 68R2-GP
A35# PROCHOT# H_THERMDA
16 GND
8 H_ADSTB#1 V1 ADSTB1# THRMDA A24
H_THERMDC H_THERMDA 39 H_THERMDA, H_THERMDC routing together, 17 BPM3#
B25
20 H_A20M# A6
THRMDC H_THERMDC 39 Trace width / Spacing = 10 / 10 mil 18 GND
A20M# H_THERMTRIP#
20 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP-A# 9,20,39 19 BPM2#
ICH




20 H_IGNNE# C4 IGNNE#