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5 4 3 2 1
UL50AT CLOCK GENERATOR
RTM875T-336
D Penryn SFF FAN & THERMAL D
956 uFCBGA SENSOR
FSB 800MHz
IO BOARD
LVDS DDR3 SDRAM 800 MHz
CRT GS45 Express
1363 uFCBGA STANDARD REVERSE
HDMI DDR3 DIMM DDR3 DIMM
Azalia DMI 2X ONLY
C C
IO BOARD
SATA
2.5" HDD
USB
ALCOR AU-6433 CARD READER
IO BOARD ICH9M SFF
INT MIC 569 uFCBGA
10/100/1000
PCI-E LAN controller
ALC269 Azalia
Atheros RJ45
EXT MIC
Audio Codec AR8131
USB 2.0 X 8
POWER
LPC 33MHz
Line out
VCORE
MINICARD
B
INT SPK SYSTEM B
Half Mini Card
WiFi/WiMAX
EMBEDDED
I/O_1.05VS
CONTROLLER
IT8512E
USB2.0 * 2 I/O_DDR & VTT
BIOS ROM INTERNAL I/O_+1.8VS
BLUETOOTH
KB & TP
CHARGER
CAMERA
A USB2.0 * 1 A
Title : Block Diagram
ASUSTeK COMPUTER INC. Engineer: Jack Hsu
Size Project Name Rev
Custom UL50AT 2.0
Date: Friday, October 16, 2009 Sheet 1 of 97
5 4 3 2 1
A B C D E
UL50A SCHEMATIC Revision 2.1
1 1
PAGE Content PAGE Content
SYSTEM PAGE REF.
3 CPU-PENRYN ULV FSB (1)
4 CPU-PENRYN ULV POWER (2)
5 CPU-CAPACITORS
7 DIM-DDR3 SO-DIMM CHANNEL A
8 DIM-DDR3 SO-DIMM CHANNEL B
9 DIM-DDR3 VREF & TERMINATION POWER PAGE REF.
10 NB_-GS45-HOST (1)
2 11 NB_-GS45-DMI (2) 80_POWER_VCORE 2
12 NB_-GS45-DISPLAY (3) 81_POWER_SYSTEM
13 NB_-GS45-DDR2 BUS (4) 82_POWER_I/O_+1.05VS
14 NB_-GS45-POWER (5) 83_POWER_I/O_DDR & VTT
15 NB_-GS45-POWER (6) 84_POWER_I/O_+1.8VS
16 NB_-GS45-GND (7) 88_POWER_CHARGER
17 NB_-GS45-STRAPPING (8) 90_POWER_DETECT
20 SB_ICH9M-HDA, IDE, LPC (1) 91_POWER_LOAD SWITCH
21 SB_ICH9M-PCI,PCIE,DMI,USB(2) 92_POWER_PROTECT
22 SB_ICH9M-GPIO, PMGT (3) 93_POWER_SIGNAL
23 SB_ICH9M-POWER_GND (4) 94_POWER_FLOWCHART
24 SB_ICH9M-SPI ROM & HDCP (5)
3
29 CLK-RTM875T-336-GRT 3
30 KBC-ITE8512
31 ROM-BIOS ROM, KB CONNECTOR
38 INTERNAL SPEAKER CONNECTOR
44 DEBUG PORT
46 LVDS CONNECTOR
48 HYBIRD SWITCH
50 THERMAL SENSOR, FAN CONNECTOR
51 SATA HDD/ODD CONNECTOR
57 DISCHARGE CIRCUIT
60 DC-IN/BAT-IN CONNECTOR
61 BLUETOOTH CONNECTOR
4
65 ME_SCREW HOLE, SMT NUT 4
67 SUB BOARD CONNECTOR
68 BOARD to BOARD CONNECTOR
96 History
97 Power On Sequence
5 5
Title : Page Reference
ASUSTeK COMPUTER INC. Engineer: Jack Hsu
Size Project Name Rev
Custom UL50AT 2.0
Date: Friday, October 16, 2009 Sheet 2 of 97
A B C D E
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3] T0306
H_REQ#[4:0]
10 H_REQ#[4:0] T0307
1
U0301A
1
H_A#3 P2 M4 U0301B
A[3]# ADS# H_ADS# 10
H_A#4 V4 J5 H_D#0 F40 AP44 H_D#32
A[4]# BNR# H_BNR# 10 D[0]# D[32]#
H_A#5 W1 L5 H_D#1 G43 AR43 H_D#33
A[5]# BPRI# H_BPRI# 10 D[1]# D[33]#
H_A#6 T4 H_D#2 E43 AH40 H_D#34
H_A#7 A[6]# H_D#3 D[2]# D[34]# H_D#35
D AA1 N5 H_DEFER# 10 J43 AF40 D
H_A#8 A[7]# DEFER# H_D#4 D[3]# D[35]# H_D#36
AB4 A[8]# DRDY# F38 H_DRDY# 10 Reserved for the H40 D[4]# D[36]# AJ43
H_A#9 T2 J1 H_D#5 H44 AG41 H_D#37
H_A#10 AC5
A[9]# DBSY# H_DBSY# 10 S3 reboot issue H_D#6 G39
D[5]# D[37]#
AF44 H_D#38
H_A#11 A[10]# +VCCP H_D#7 D[6]# D[38]# H_D#39
AD2 M2 H_BR0# 10 E41 AH44
H_A#12 A[11]# BR0# H_CPURST# H_D#8 D[7]# D[39]# H_D#40
H_A#13
AD4
AA5
A[12]#
B40 H_IERR# 1 RN0302A
R2.1 H_D#9
L41 D[8]# D[40]# AM44
H_D#41
A[13]# IERR# 56OHM 2 K44 D[9]# D[41]# AN43
H_A#14 AE5 D8 H_D#10 N41 AM40 H_D#42
A[14]# INIT# H_INIT# 20 D[10]# D[42]#
H_A#15 AB2 H_D#11 T40 AK40 H_D#43
A[15]# D[11]# D[43]#
1
H_A#16 AC1 N1 H_D#12 M40 AG43 H_D#44
A[16]# LOCK# H_LOCK# 10 D[12]# D[44]#
Y4 C0303 H_D#13 G41 AP40 H_D#45
10 H_ADSTB#0 ADSTB[0]# D[13]# D[45]#
G5 H_CPURST# 0.1UF/10V H_D#14 M44 AN41 H_D#46
H_CPURST# 10
2
H_REQ#0 RESET# H_D#15 D[14]# D[46]# H_D#47
R1 K2 H_RS#0 10 L43 AL41
H_REQ#1 REQ[0]# RS[0]# D[15]# D[47]#
R5 H4 H_RS#1 10 10 H_DSTBN#0 K40 AK44 H_DSTBN#2 10
H_REQ#2 REQ[1]# RS[1]# GND DSTBN[0]# DSTBN[2]#
U1 K4 H_RS#2 10 10 H_DSTBP#0 J41 AL43 H_DSTBP#2 10
H_REQ#3 REQ[2]# RS[2]# DSTBP[0]# DSTBP[2]#
P4 REQ[3]# TRDY# L1 H_TRDY# 10 10 H_DINV#0 P40 DINV[0]# DINV[2]# AJ41 H_DINV#2 10
H_REQ#4 W5
REQ[4]# H_D#16 H_D#48
HIT# H2 H_HIT# 10 P44 D[16]# D[48]# AV38
H_A#17 AN1 F2 H_D#17 V40 AT44 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 AK4 H_D#18 V44 AV40 H_D#50
H_A#19 A[18]# XDP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
AG1 AY8 AB44 AU41
H_A#20 A[19]# BPM[0]# XDP_BPM#1 H_D#20 D[19]# D[51]# H_D#52
AT4 A[20]# BPM[1]# BA7 R41 D[20]# D[52]# AW41
H_A#21 AK2 BA5 XDP_BPM#2 H_D#21 W41 AR41 H_D#53
H_A#22 A[21]# BPM[2]# XDP_BPM#3 H_D#22 D[21]# D[53]# H_D#54
AT2 A[22]# BPM[3]# AY2 N43 D[22]# D[54]# BA37
H_A#23 AH2 AV10 XDP_BPM#4 H_D#23 U41 BB38 H_D#55
H_A#24 A[23]# PRDY# XDP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
AF4 AV2 AA41 AY36
H_A#25 A[24]# PREQ# XDP_TCK H_D#25 D[24]# D[56]# H_D#57
AJ5 AV4 AB40 AT40
H_A#26 A[25]# TCK XDP_TDI H_D#26 D[25]# D[57]# H_D#58
AH4 AW7 AD40 BC35
H_A#27 A[26]# TDI XDP_TDO +VCCP H_D#27 D[26]# D[58]# H_D#59
AM4 AU1 AC41 BC39
H_A#28 A[27]# TDO XDP_TMS H_D#28 D[27]# D[59]# H_D#60
AP4 AW5 AA43 BA41
H_A#29 A[28]# TMS XDP_TRST# T0313 H_D#29 D[28]# D[60]# H_D#61
AR5 A[29]# TRST# AV8 Y40 D[29]# D[61]# BB40
2
C C
H_A#30 AJ1 J7 XDP_DBR# 1 H_D#30 Y44 BA35 H_D#62
H_A#31 A[30]# DBR# R0302 H_D#31 D[30]# D[62]# H_D#63
AL1 A[31]# T44 D[31]# D[63]# AU43
H_A#32 AM2 1KOhm U43 AY40
A[32]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#33 AU5 1% W43 AY38
A[33]# 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10
H_A#34 AP2 R43 BC37
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AR1 D38 H_PROCHOT_S#
A[35]# PROCHOT# GTL_REF H_COMP0 R0306 27.4Ohm 1%
10 H_ADSTB#1 AN5 ADSTB[1]# THRMDA BB34 CPU_THRM_DXP 50 AW43 GTLREF COMP[0] AE43 1 2 GND
T0308 1 BD34 E37 AD44 H_COMP1 R0307 1 2 54.9Ohm 1%
THRMDC CPU_THRM_DXN 50 TEST1 COMP[1]
2
H_COMP2 R0308 27.4Ohm 1%
20 H_A20M# C7
A20M# R1.1 D40
TEST2 COMP[2]
AE1 1 2
1
D4 B10 C0301 R0303 C43 AF2 H_COMP3 R0309 1 2 54.9Ohm 1%
20 H_FERR# FERR# THERMTRIP# H_THRMTRIP# 5,11,20 TEST3 COMP[3]
F10 0.1UF/10V 2KOhm AE41 T0310 1
20 H_IGNNE# IGNNE# T0301 TEST4
@ 1% AY10 G7 H_DPRSTP#
H_DPRSTP# 11,20,80
2
TEST5 DPRSTP# H_DPSLP#
20 H_STPCLK# F8 AC43 B8 H_DPSLP# 20
1
STPCLK# TEST6 DPSLP# H_DPW R#
20 H_INTR C9 C41 H_DPW R# 10
1
LINT0 DPWR# H_PW RGD
20 H_NMI C5 LINT1 BCLK[0] A35 CLK_CPU_BCLK 29 29 CPU_BSEL0 A37 BSEL[0] PWRGOOD E7 H_PW RGD 20
E5 C35 GND GND C37 BSEL[1] D10
20 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 29 29 CPU_BSEL1 SLP# H_CPUSLP# 10
T0309 1 B38 BSEL[2] BD10 1
29 CPU_BSEL2 PSI#
1
V2 Close to CPU Zo=55 Ohm, 0.5" max T0311
RSVD01 SU9400/SU9300
Y2
AG5
RSVD02
T0302
for GTL_REF
RSVD03
AL5 RSVD04 BCLK FSB BSEL2 BSEL1 BSEL0 Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
J9
F4
RSVD05
166 667 0 1 1 Comp 1,3: Z0=55 Ohm, trace length < 0.5"
RSVD06
H8 RSVD07
200 800 0 1 0
+VCCP
266 1067 0 0 0
SU9400/SU9300
B
J0301 B
2 1 XDP_BPM#5
Stuff when use ITP : R0320,R0321, R0322,
GND1 BPM5#
R0320
XDP_BPM#3
XDP_BPM#2
4 BPM3# BPM4# 3 XDP_BPM#4 R0324, R0325, R0326, R0327, R0328, R0329,
6 BPM2# GND5 5
1KOhm 8
GND2 BPM1#
7 XDP_BPM#1 R0330, R0331, RN2916
H_PW RGD 1 2 @ XDP_PW RGD 10 9 XDP_BPM#0
H_TESTIN# PWRGOOD BPM0#
12 RESERVED GND6 11
+VCCP 14 13 CLK_ITP_BCLK
VTT BCLK0 CLK_ITP_BCLK 29
16 15 CLK_ITP_BCLK#
GCLKp BCKL1 CLK_ITP_BCLK# 29
18 17
GCLKn GND7 XDP_CPURST# R0321
20 19 1 2 1KOhm @ H_CPURST#
GND3 RESET# XDP_DBR# R0322 RSTCON#
12 L_CTRL_CLK 22 SCL DBR# 21 1 2 0Ohm @
RSTCON# 22
4
24 23 XDP_TDO R0323 1 2 1KOhm @
12 L_CTRL_DATA SDA TDO +3VS
RN0302B 26 25 XDP_TRST#
GND4 TRST#
56OHM 28 NC GND8 27
XDP_TCK 30 29 XDP_TDI
TCK TDI XDP_TMS
TMS 31
D0301 @
R0320, R0321 Place close to CPU
3
1SS355PT BTOB_CON_31P
H_PROCHOT_S# 2 1 @ GND
PW RLIMIT_CPU# 30 +VCCP
GND 12G161300310
6
3
Q0301A Q0301B H_TESTIN# R0324 1 2 54.9Ohm 1% @
UM6K1N UM6K1N XDP_BPM#1 R0325 1 2 54.9Ohm 1% @
2 5 XDP_BPM#5 R0326 1 2 54.9Ohm 1% @
THRO_CPU 30 PW RLIMIT_CPU 88
XDP_TDI R0327 1 2 54.9Ohm 1% @
1
4
XDP_TDO R0328 1 2 54.9Ohm 1% @
XDP_TMS R0329 1 2 54.9Ohm 1% @
XDP_TCK R0330 1 2 54.9Ohm 1% @
GND GND XDP_TRST# R0331 1 2 54.9Ohm 1% @
A A
GND
Title : PENRYN ULV FSB
ASUSTeK COMPUTER INC. Engineer: Jack Hsu
Size Project Name Rev
Custom UL50AT 2.0
Date: Friday, October 16, 2009 Sheet 3 of 97
5 4 3 2 1
5 4 3 2 1
+VCORE +VCCP
U0301F U0301E U0301D
BD28 AL37 G25 AA15 B42 AM36
VCC101 VCCP21 VSS164 VSS280 VSS1 VSS82
BB26 AN37 G23 AC15 F44 AR35
VCC102 VCCP22 VSS165 VSS281 VSS2 VSS83
BD26 AP38 G21 Y10 D44 AU35
VCC103 VCCP23 VSS166 VSS282 VSS3 VSS84
B22 B32 J25 AD10 D42 AV34
+VCORE +VCORE VCC104 VCCP24 VSS167 VSS283 VSS4 VSS85
B24 C33 J23 AH12 F42 AW35
D
U0301C VCC105 VCCP25 VSS168 VSS284