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File name 601tcf.pdf

1 2 3 4 A VIA Apollo ProMedia Board Schematics TITLE COVER SHEET SOCKET 370 PROCESSOR NORTH BRIDGE VT8601/A SOUTH BRIDGE VT82C686A/B CLOCK SYNTHESIZER 601TCF A SHEET No. 1 2,3 4,5 6,7 8 B B AGTL+ BUS AND PULL UP RESISTORS SDRAM DIMM SLOTS 1/2 PCI SLOT1 & PCI SLOT2 PCI SLOT3 & USB 2/3 ISA SLOT & SYSTEM ROM & AMR SLOT IDE CONNECTORS & WAKE UP CIRCUITRY FRONT PANEL & BACK PANEL CONNECTOR (USB 0/1) C 9 10 11 12 13 14 15 C FAN CONTROL CIRCUITRY & VGA CONNECTOR AC'97 AUDIO CODEC & AUDIO PORTS DC-DC CONVERTERS ATX POWER CONNECTORS & BYPASS CAPACITORS 16 17 18 19 D D VIA TECHNOLOGIES ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS. THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE. COPYRIGHT 2000 VIA TECHNOLOGIES INCORPORATED. 1 2 3 JETWAY INFORMATION Title COVER SHEET Size Document Number Custom Date: Thursday, March 21, 2002 4 601TCF Sheet 1 of 19 Rev 1.0 1 2 3 4 HD[0..63] HA[3..31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 -ADS -DRDY -DBSY -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -BREQ0 -BPRI -BNR -HLOCK -HIT -HITM -DEFER -RS0 -RS1 -RS2 R170 1K AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AN31 AN27 AL27 AN25 AK18 AH16 AH18 AL19 AL17 AN29 AN17 AH14 AK20 AL25 AL23 AN19 AH26 AH22 AK28 C35 E35 G33 E37 X4 AH4 J37 A35 -FERR_ -IGNNE -A20M PICD0 PICD1 APICCLK INTR NMI -SMI_ -STPCLK -SLP -FLUSH -CPUINIT AC35 AG37 AE33 J35 L35 J33 M36 L37 AJ35 AG35 AH30 AE37 AG33 AE35 E33 F18 K4 R6 V6 AD6 AK12 AK22 AD36 Z36 AB36 AH20 AK16 AL13 AL21 N37 AM2 X34 U4 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS DRDY DBSY TRDY REQ[0] REQ[1] REQ[2] REQ[3] REQ[4] BR0 BPRI BNR LOCK HIT HITM DEFER RS[0] RS[1] RS[2] BPM[0] BPM[1] BP[2] BP[3] RESET/GND* RESET CMOS I/O PREQ GTL PRDY FERR IGNNE A20M PICD[0] PICD[1] PICCLK INTR/LINT[0] NMI/LINT[1] SMI STPCLK SLP FLUSH INIT IERR VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7/VCMOSREF* VCC_1.5V/VTT* VCC_2.5V/RSV* VCC_CMOS/VTT* VTT VTT VTT VTT RSV/NCHCTRL* RSV/GND* VCC2/VTT* SOCKET 370_A GTL D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 BCLK *BCLK_/CLKREF BSEL0 PWRGOOD BSEL1 THERMDP THERMDN CMOS I/O * F o r intel FC-PGA2 cpu CPUPRES *VTT/EDGCTRL THERMTRIP VID[0] VID[1] VID[2] VID[3] *VID_25MV/GND TCK TDI TDO TMS TRST PLL1 PLL2 RSRVD48 RSRVD49 RSRVD51 VTT VTT VTT *VTT/RSV W1 T4 N1 M6 U1 S3 T6 J1 S1 P6 Q3 M4 Q1 L1 N3 U3 H4 R4 P4 H6 L3 G1 F8 G3 K6 E3 E1 F12 A5 A3 J3 C5 F6 C1 C7 B2 C9 A9 D8 D10 C15 D14 D12 A7 A11 C11 A21 A15 A17 C13 C25 A13 D16 A23 C21 C19 C27 A19 C23 C17 A25 A27 E25 F16 W37 Y33 AJ33 AK26 AJ31 AL31 AL29 C37 AG1 AH28 AL35 AM36 AL37 AJ37 AK36

File name 603tcf.pdf

1 2 3 4 A VIA Apollo ProMedia Board Schematics TITLE COVER SHEET SOCKET 370 PROCESSOR NORTH BRIDGE VT8601/A SOUTH BRIDGE VT82C686A/B CLOCK SYNTHESIZER 603TCF A SHEET No. 1 2,3 4,5 6,7 8 B B AGTL+ BUS AND PULL UP RESISTORS SDRAM DIMM SLOTS 1/2 PCI SLOT1 & PCI SLOT2 PCI SLOT3 & USB 2/3 ISA SLOT & SYSTEM ROM IDE CONNECTORS & WAKE UP CIRCUITRY FRONT PANEL & BACK PANEL CONNECTOR (USB 0/1) C 9 10 11 12 13 14 15 C FAN CONTROL CIRCUITRY & VGA CONNECTOR AC'97 AUDIO CODEC & AUDIO PORTS DC-DC CONVERTERS ATX POWER CONNECTORS & BYPASS CAPACITORS RTL 8100BL LAN 16 17 18 19 20 D D VIA TECHNOLOGIES ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS. THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE. COPYRIGHT 2000 VIA TECHNOLOGIES INCORPORATED. 1 2 3 JET WAY INFORMATION Title COVER SHEET Size Document Number Custom Date: Thursday, June 27, 2002 4 J603TCF Sheet 1 of 20 Rev 3.0 1 2 3 4 HD[0..63] HA[3..31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 -ADS -DRDY -DBSY -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -BREQ0 -BPRI -BNR -HLOCK -HIT -HITM -DEFER -RS0 -RS1 -RS2 R91 4,9 -CPURST -CPURST C102 .1u R35 330 -FERR_ -IGNNE -A20M PICD0 PICD1 APICCLK INTR NMI -SMI_ -STPCLK -SLP -FLUSH -CPUINIT 1K AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AN31 AN27 AL27 AN25 AK18 AH16 AH18 AL19 AL17 AN29 AN17 AH14 AK20 AL25 AL23 AN19 AH26 AH22 AK28 C35 E35 G33 E37 X4 AH4 J37 A35 AC35 AG37 AE33 J35 L35 J33 M36 L37 AJ35 AG35 AH30 AE37 AG33 AE35 E33 F18 K4 R6 V6 AD6 AK12 AK22 AD36 Z36 AB36 AH20 AK16 AL13 AL21 N37 AM2 X34 HD[0..63] 4,9 4,9 HA[3..31] U4 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS DRDY DBSY TRDY REQ[0] REQ[1] REQ[2] REQ[3] REQ[4] BR0 BPRI BNR LOCK HIT HITM DEFER RS[0] RS[1] RS[2] BPM[0] BPM[1] BP[2] BP[3] RESET/GND* RESET CMOS I/O PREQ GTL PRDY FERR IGNNE A20M PICD[0] PICD[1] PICCLK INTR/LINT[0] NMI/LINT[1] SMI STPCLK SLP FLUSH INIT IERR VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7/VCMOSREF* VCC_1.5V/VTT* VCC_2.5V/RSV* VCC_CMOS/VTT* VTT VTT VTT VTT RSV/NCHCTRL* RSV/GND* VCC2/VTT* SOCKET 370_A VCMOS TCK 6,9 NMI CB394 1U -TRST R49 NC-680 TDI TDO TMS R45 R43 R48 3 SOCKET 370 GND A37 AB32 AC5 AC33 AD2 AD34 AF32 AG5 AH2 AH34 AJ7 AJ11 AJ15 AJ19 AJ23 AJ27 AL3 AM6 AM10 AM14 AM18 AM22 AM26 AM30 AM34 B4 B8 B12 B16 B20 B24 B28 B32 D2 D4 D18 D22 D26 D30 D34 E7 E11 E15 E19 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y5 Y37 Z2 Z34 VCC2 AA5 AB2 AA37 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ5 AJ9 AJ13 AJ17 AJ21 AJ25 AJ29 AK2 AK34 AM4 AM8 AM12 AM16 AM20 AM24 AM28 B6 AM32 B10 B14 B18 B22 B26 B30 B34 C3 D6 D20 D24 D28 D32 E5 E9 E13 E17 F2 F4 F14 F22 F26 F30 F34 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 Y35 Z32 D36 C3 A 4,9 -ADS 4,9 -

File name 615tcf.pdf

55) 1)788 9 1) 1) 1)& 1) 1)2 1) 1) 1) 1)3 1)4 1) 1) 1)& 1) 1)2 1) 1) 1) 1)3 1)4 1)& 1)& 1)&& 1)& 1)&2 1)& 1)& 1)& 1)&3 1)&4 1) 1) 1)& 1) 1)2 1) 1) 1) 1)3 1)4 1)2 1)2 1)2& 1)2 1)22 1)2 1)2 1)2 1)23 1)24 1) 1) 1)& 1) 1)2 1) 1) 1) 1)3 1)4 1) 1) 1)& 1) 2 : 6 2 6 = : 12 2 2 1 = ; 3 ; &  & 4 4 )3 ) )2 )&  &  & ) & & 4 & 4 &  & & & 1)? 1)? 1)?& 1)? 1)?2 1)? 1)? 1)? 1)?3 1)?4 1)? 1)? 1)?& 1)? 1)?2 1)? 1)? 1)? 1)?3 1)?4 1)?& 1)?& 1)?&& 1)?& 1)?&2 1)?& 1)?& 1)?& 1)?&3 1)?&4 1)? 1)? 1)?& 1)? 1)?2 1)? 1)? 1)? 1)?3 1)?4 1)?2 1)?2 1)?2& 1)?2 1)?22 1)?2 1)?2 1)?2 1)?23 1)?24 1)? 1)? 1)?& 1)? 1)?2 1)? 1)? 1)? 1)?3 1)?4 1)? 1)? 1)?& 1)?      : 1 7889 1 ? 1 ?2 1 ? 1 ? 1 ? 1 ?3 1 ?4 1 ? 1 ? 1 ?& 1 ? 1 ?2 1 ? 1 ? 1 ? 1 ?3 1 ?4 1 ?& 1 ?& 1 ?&& 1 ?& 1 ?&2 1 ?& 1 ?& 1 ?& 1 ?&3 1 ?&4 1 ? 1 ? 5) 5) 5)& 5) ? ? ?& 6? 6? 6?& 6? 6?2 5 ? )? )? )&? ? ? ? 5 ? = ? 5 5 5 ? 3 1& 13 4 = 1 =4 1 = 2 =  > ; 2 >2 )2 = =  1& 1&& &3 3 1 13 =4 = 1& 12 &4  2 &2 = = =& 1 1 2 1 1 1  1 3 1 4 1 1 1 & 1 1 2 1 1 1  1 3 1 4 1 & 1 & 1 && 1 & 1 &2 1 & 1 & 1 & 1 &3 1 &4 1 1 5) 5) 5)& 5) & 16 16 16& 16 162 5 5)788 9 & & " !     |LINK |2.SCH |3.SCH |4.SCH |5.SCH |6.SCH |7.SCH |8.SCH |9.SCH |10.SCH |11.SCH |12.SCH |13.SCH |14.SCH |15.SCH |16.SCH |17.SCH |18.SCH |19.SCH |20.SCH |21.SCH |22.SCH |23.SCH |24.SCH |25.SCH |26.SCH |27.SCH |28.SCH |29.SCH |30.SCH |31.SCH |32.SCH |33.SCH 7&88 9 167288 9 & 3 5 : &  && 24 <  2  :5;) & AK4: TUALATIN AK4 VTTPWRGD COPPERMINE AK4 GND "'% (%   )#!*+%,"*+$% !"#$%& & % /%%" )"%. #0 AK22: TUALATIN AK22 CMOSREF COPPERMINE AK22 GTLREF && ;= 5 5 55) 5 INTEL AJ33 BSEL0 AJ31 BSEL1 2 & & &82++C1 ) JOSHUA 66 100 133 AJ33 0 1 1 AK30 0 0 = 1 2 5 5 & 2 3 5 2   32  = &  ;  & & &4 & &4 ; ; =  6 6 6 =  3 2 & C2 ;  < #  := : :&         "$ JS3 :1-2:133 MHz 2-3:100 MHz A  ? ? )? )? =? ))? 1? 1? )? )? =:1? =? ? 1) 1) 1? & ? =? =? ? = = ? ? ;? ? == ==& ? 2? 5)2 &? 5)2 5) == = 5) 5)& 12  & 4 & & =& =& =&  &4 = =&4 1&3 ; 1 = ; ; :  : : 52 C & & & C& *& B 5 1 2 =  @   @ & &2  & &2 & & = 2 & := & 2 & & 2 & 2 2 & ; 2 & 1 )C& 1) ) 1= )) 1 1 ) 1 ) =:1 2 5 & 2 3 & 32 ) ) ) ) ? 6? )? &? ? ? ? 5 ? ? )? )? ) ? )? )2? 5)&4 5 5) 5)& 5) 5)2 5) 5) 5) 5)3 ) ) = = ;) &? );=5= :? #

File name 630cfr3.pdf

VTT VTT AK30 CPURST# VCC3 R84 OPEN-220 630CF REV:3.0 Layout all Bead 0805-->0603 VCC2DET SLEWCTRL RTTCTRL VTT VCC2.5 VCC_CMOS VCC3 U4 R414 1K VCC_1.5V VCC_2.5V VCC_CMOS BP#[2] BP#[3] BPM#[0] BPM#[1] BSEL# AD36 Z36 AB36 G33 E37 C35 E35 AJ33 AE33 AC35 AE37 AE35 AG37 AG33 M36 L37 AH30 AJ35 AG35 J33 J35 L35 AK26 A35 J37 AL33 AN35 AN37 AK32 AN33 VCCCORE U5 AA37 AA5 AB2 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ13 AJ17 AJ21 AJ25 AJ29 AJ5 AJ9 AK2 AK34 AM12 AM16 AM20 AM24 AM28 AM32 AM4 AM8 B10 B14 B18 B22 B26 B30 B34 B6 C3 D20 D24 D28 D32 D36 D6 E13 E17 E5 E9 F14 F2 F22 F26 F30 F34 F4 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 X34 Y35 Z32 M E N DOCINO_2 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A37 AB32 AC33 AC5 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ11 AJ15 AJ19 AJ23 AJ27 AJ3 AJ7 AK36 AK4 AL1 AL3 AM10 AM14 AM18 AM2 AM22 AM26 AM30 AM34 AM6 AN3 B12 B16 B20 B24 B28 B32 B4 B8 D18 D2 D22 D26 D30 D34 D4 E11 E15 E19 E7 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y37 Y5 Z2 Z34 AJ31 Y33 VCC2.5 AH20 AH4 A29 A31 A33 AA33 AA35 AC1 AC37 AF4 AK16 AK24 AK30 AL11 AL13 AL21 AN11 AN13 AN15 AN21 AN23 B36 C29 C31 C33 E23 E29 E31 F10 G35 G37 L33 N33 N35 N37 Q33 Q35 Q37 S33 S37 U35 U37 V4 W3 X6 Y1 E21 E27 R2 S35 X2 W35 C37 TESTHI CPUPRES# RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED C15 NC-18P 23,26 23,26 8 370CPUCLK DXP DXN DXP DXN AL31 AL29 AH28 W37 AK20 AN19 AN25 X4 AN17 AN29 AK28 AH22 AH26 AN31 AL23 AL25 AN27 AL27 AH14 AL17 AL19 AH18 AH16 AK18 AD4 AA3 Z4 AK6 AA1 Y3 AF6 AB4 AB6 AE3 AJ1 AC3 AG3 Z6 AE1 AN7 AL5 AK14 AL7 AN5 AK10 AH6 AL9 AH10 AL15 AN9 AH8 AH12 AK8 THERMDP THERMDN THERMTRIP# BCLK LOCK# DEFER# TRDY# RESET# BPRI# BREQ0# RS#[2] RS#[1] RS#[0] ADS# HITM# HIT# DRDY# DBSY# BNR# REQ#[4] REQ#[3] REQ#[2] REQ#[1] REQ#[0] A#[31] A#[30] A#[29] A#[28] A#[27] A#[26] A#[25] A#[24] A#[23] A#[22] A#[21] A#[20] A#[19] A#[18] A#[17] A#[16] A#[15] A#[14] A#[13] A#[12] A#[11] A#[10] A#[9] A#[8] A#[7] A#[6] A#[5] A#[4] A#[3] JP11 BSEL0# A20M# FERR# FLUSH# IGNNE# INIT# INTR NMI SLP# SMI# STPCLK# PICCLK PICD0 PICD1 PWRGOOD PRDY# PREQ# HTCK HTDI HTDO HTMS HTRST# 1 HEADER 2 2 R411 1K FS0 8 370CPUCLK HLOCK# 2,3 HLOCK# DEFER# 2,3 DEFER# HTRDY# 2,3 HTRDY# CPURST# 2,3 CPURST# BPRI# 2,3 BPRI# BREQ0# 2,3 BREQ0# RS#2 2,3 RS#2 RS#1 2,3 RS#1

File name 6347v10.PDF

1 7/15/2000 Update Title Page 1 2 3 4,5 6,7,8 9,10 11 12,13,14 15,16 17 18 19 20 21 22 23 24 25 26 27 28 29,30 31,32,33 Version 100 MS-6347 Micro-ATX CPU: AMD Socket-462 Processor Cover Sheet Block Diagram Clock Synthesizer 462PGA Socket KT133(VT8363)---North Bridge System Memory AGPPRO 4X SLOT PCI Connectors 686A/B------------South Bridge ATA33/66/100 Connectors USB & KB & MS Parallel / Serial Port BIOS & FAN Size : 12"*9.6" Layer:4 Stack:Component/Gnd/Power/Solder 5 mils trace impenence 60 Ohms Dielectric ~ 4.1 Prepreq ~ 4.7 mils 6 7 8 9 10 11 12 25 mils mils mils mils mils mils mils mils --------55.74 51.64 48.14 45.11 42.46 40.12 38.03 22.90 Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm A A System Chipset: VIA KT133(North) + 686A (South) Expansion: AGP-pro SLOT* 1 PCI2.2 SLOT* 6 CNR SLOT * STANDARD VIA drill 20 mils, finished 16 mils All drill hole are with 13 mils clearance in Power & GND Layer only Front Panel Linear Regulator & STR(OPT) Power Good Circuit SC1155 CPU Power Bypass Capacitors ACPI & CNR Riser 1(shared) On Board: AC97 Codec SCSI AIC-7892+AIC_3860 1394 TSB12LV26+TSB41LV02 Option-C Option-A SCSI+1394 SCSI AC'97 Codec Audio/Game Port Ti 1394 7892 SCSI ECN 34 MICRO-STAR P01-6347100 Title MS-6347 Size Document Number COVER SHEET Thursday, July 27, 2000 Sheet 1 of 35 Rev 0A Date: 1 5 4 3 2 1 D D z10001 74f00 1 2 C C B B A A Title {Title} Size A Date: 5 4 3 Document Number {Doc} Thursday, July 27, 2000 2 Rev {RevCode} Sheet 1 1 of 1 1 Block Diagram VRM 9.0 K7 462-Pin Socket Processor Clock STR is optional INT & PWR-MNG Clock Buffer ADDR(In -Out) AGP 2X/4X KZ133 (8363) PWR-MNG DATA 16 Clock Buffer DIMM4 3 DIMM Modules PC-133 Share with DIMM3 PCI CNTRL PCI ADDR/DATA PCI Conn 1 PCI Conn 2 PCI Conn 3 PCI Conn 4 PCI Conn 5 PCI Conn 6 A IDE Primary IDE Secondary UltraDMA 33/66/100 PCI 2.2 686A A USB Port 1 USB Port 2 USB Port 3 USB Port 4 USB PCI CNTRL PCI ADDR/DATA Hardware Audio SCSI 1394 ISA Bus AC'97 L ink Onboard AC'97 Codec HomePNA/Ethernet interface BIOS CNR Keyboard Mouse Floopy Parallel Serial Game Conn MICRO-STAR Title MS-6347 Size Document Number Block Diagram Thursday, July 27, 2000 Sheet 2 of 35 Rev 0A Date: 1 A B C D E VCC3 * 25 mils Trace on Layer 4 with GND copper around it * put close to every power pin 100U/2 5V EC14 VCC3 MODE:1--pin2=REF0 (Default) 0--pin2=CPU_STP# U10 1 6 14 19 27 30 36 42 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ2 GND GND GND GND GND GND GND GND PCI0/MODE PCI1/FS1 PCI2 PCI3 PCI4 PCI5 SDRAMIN SDRAM_12 SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 CPU_CS CPUC0 CPUT0 X2 7 8 10 11 12 13 15 40 38 37 35 34 32 31 29 28 21 20 18 17 46 44 43 5 FS1 7 5 3 1 RN32 R98 8 6 4 2 8P4R-22 22 PCLKSB PCLKNB PCLKSC PCLKTI PCLKREF R101 10K PCLKSB 15 PCLKNB 7 PCLKSC 31 PCLKTI 29 CPUCLK CPUCLK# C103 X_10P C102 X_10P C110 X_10P C142 10P FB11 YUHBT-601S-B C105 104P VCCCLK C127 105P-C C133 103P C134 C13

File name 645_650em.pdf

8 7 6 5 4 3 2 1 JET WAY INFORMATION 645EM D SiS-645/650 for Pentium 4 (Desktop PC) Uniprocessor Reference Design Schematics PAG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Cover Page System Block Diagram Content D C B SOCKET 478 - 1 ( DIP ) SOCKET 478 -2 ( DIP ) SOCKET 478 BY-PASS CAP. SIS 645/650-1(HOST/AGP) SIS 645/650-2(MEMORY) SIS 645/650-3(VGA) SIS 645/650-4(POWER) SIS 961-1(PCI/IDE) SIS 961-2(MISC.) SIS 961-3(USB) SIS 961-4(POWER) Main Clock Generator SDR Clock Buffer AGP SLOT/ VB (645&650) VGA CONNECTOR SDR 1 & 2 SDR BY-PASS CAP. RESERVED PCI Slot 1 & 2 PCI Slot 3 IDE Connectors USB Connectors AC97 CODEC CNR SLOT ICS 1893 PHY RESERVED ITE 8705 FDC/COM1&2/IR CONN. GAME/PARALLEL CONN. FAN1&2/VOLTAGE/TEMP. BIOS & FRONT PANNEL RTC LINEAR REGULATORS CPU POWER ACPI POWER ATX POWER CONNECTOR C B A JET WAY INFORMATION Title A Cover Page Size B Date: Document Number 645EM Thursday, January 03, 2002 Sheet 1 of 38 Rev 0.1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 2*CPUs System Block Diagram D SOCKET-478 1*SDRAMs 6*PCIs 2*ASLs 1*48MHz 1*24/48MHz 2*REF 1*APIC Main Clock Gen. D 1*CLK IN/# Host Bus 9*CLK OUT/# FB OUT/# FB IN/# DDR Clock Buffer SDR SDRAM AGP SLOT SiS645 DIMM 1 DIMM 2 C Power HyperZip 512 MB Analog In RTCVDD RTC C Analog Out AC'97 Audio Codec PCI SLOT 3 PCI SLOT 2 PCI SLOT 1 3D Audio Out VCC2.5V CPU SB3V SB1.8V REGULATOR SiS961 IDE 1 IDE 2 KEYBOARD /MOUSE CNR MODEM DEVICE VDDV VCC1.8V VTT VCC VCORE VCMOS1.5V PWM B RJ45/PHY USB 0 USB 2 MII USB 1 USB 4 LPC Bus USB 3 USB 5 VCC3 DUAL VCC5 DUAL Voltage Switch B VCC M DDR VTT SB2.5V PWM VCC DIMM FAN 1 FAN 2 FAN CONTROL VOLTAGE MONITOR Voltage Switch LPC Super I/O TEMPERATURE MONITOR Legacy ROM FAN CONTROL VCC3 SB5V VCC5 +12V ATX POWER A GPIOs IR/CIR GAME/MIDI SERIAL PARALLEL FLOPPY A JET WAY INFORMATION Title System Block Diagram Size B Date: Document Number 645EM Thursday, January 03, 2002 Sheet 2 of 38 Rev 0.1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 VCCP D A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 L25 K26 K25 J26 U5 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC HD-0 HD-1 HD-2 HD-3 HD-4 HD-5 HD-6 HD-7 HD-8 HD-9 HD-10 HD-11 HD-12 HD-13 HD-14 HD-15 HD-16 HD-17 HD-18 HD-19 HD-20 HD-21 HD-22 HD-23 HD-24 HD-25 HD-26 HD-27 HD-28 HD-29 HD-30 HD-31 HD-32 HD-3

File name 6507-00b.pdf

8 7 6 5 4 3 2 1 Version 0B Cover Sheet Block Diagram 1 2 MS-6507 06/29/2001 Update INTEL (R) Brookdale Chipset GPIO Spec. 3 D Willamette/Northwood 478pin mPGA-B Processor Schematics D Clock CY28324 & ATA100 IDE CONNECTORS 4 mPGA478-B INTEL CPU Sockets 5-6 INTEL Brookdale MCH -- North Bridge 7-8 INTEL ICH2 -- South Bridge 9 - 10 LPC I/O W83627HF 11 CPU: Willamette/Northwood mPGA-478B Processor CNR RISER 12 AC'97 Codec 13 C System Brookdale Chipset: C Audio Amp TL072 & GAME 14 INTEL MCH (North Bridge) + FWH-- BIOS & VCCVID 15 INTEL ICH2 (South Bridge) SDR DIMM-168PIN DIMM1,2 16 On Board Chipset: AGP 4X SLOT (1.5V) 17 BIOS -- FWH PCI SLOT 1 & 2 & 3 18 LPC Super I/O -- W83627HF Front Panel & Connectors 19 Clock Generation -- CY28324 USB & FAN Connectors 20 PCI SOUND -- C-MEDIA CMI8738 B B D-LED & AUDIO 6 CHANNEL CONTROL 21 Votlage Regulator 22 Expansion Slots: AGP2.0 SLOT * 1 HIP6301V CPU Power ( PWM )-VRM9.2 23 PCI2.2 SLOT * 3 IO Connectors 24 Realtek RTL8100(L) LAN 25 DDR Damping 26 DDR Termination

File name 693as.pdf

J-693AS SOCKET 370 PROCESSOR NORTH BRIDGE (VT82C693A) SOUTH BRIDGE (VT82C686A) USB2,3 & FREQUENCY RATIO DIMM 1 & 2 ATX POWER CONNECT / VTT TERMINATOR / VCC3 2 3,4 5,6 7 8 9 10 11 12 13 14 15 16 17 18 19 PCI SLOT 1 & 2 PCI SLOT 3 & 4 AGP SLOT ISA SLOT IDE & FRONT PANNEL & BIOS & K.B CONNECTOR CLOCK SYNTHERSIZER FAN & BYPASS CAPACITOR DC-DC CONVERTER PRINTER / COM PORT AUDIO CODEC & AUDIO PORT & JOYSTICK PORT AMR SLOT 20    %&' %('  )*+,'-,.' !"#$! '/ 1'' )'0 *2 )<= < = 9 5 $ 4 8 5 $ 4 8 5 $ 4 8 ) )) ) ) ;<= ;< = ;<= ;<= ;<5= 6 73 ) <= < = <= 6<= 6< = 6<= 6<= BC 6; 6) : 6)<= 6)< = 673 B7<= B7< = 673 76 79 5 $ 4 > $ >$ > B C B C B C B C B69CC :)BC ACC 34 > > 8 43 Intel Old New Cyrix JC1 short open short JC2 open short open JC3 open open short JC4 2-3 2-3 1-2 8 GTL ) ) ) ) )5 )$ ) )4 )8 ) ) ) ) ) ) 5 ) $ ) ) 4 ) 8 ) ) ) ) ) )5 )$ ) )4 )8 ) ) ) ) ) )5 )$ ) )4 )8 ) )5 )5 )5 )5 )55 )5$ )5 )54 )58 )5 )$ )$ )$ )$ )$5 )$$ )$ )$4 )$8 )$ ) ) ) ) 73 CC7 7 6:) 7 )6 ) 696 ):7 6 )<= )< = )<= )<= CC )<5= 3 ) ) 677 677 )58 )5 )$ CB CB CB CB C:)B73 )<= ! ! < = BSEL0 BSEL1 Jumper function Short Short Bus freq. auto detected by CPU. Open Short Test 66/100 MHz CPU run 100/133 MHz. Short Open Test 100 MHz CPU run 133 MHz. 5 $ 4 8 5 $ 4 8 5 $ 4 8 ) )) ) ) ; ; ; ; ;5 ; 6 73 ) 38 8 7 $ 7 3 $ 74 3 5 7$ 4 @ : 5 3 @5 )5 4 74 $ 3 8 8 7 7 4 4 5 3 7$ 7 38 $ $ : 4 A5 5 4 $ SOCKET 370 GND A37 AB32 AC5 AC33 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ3 AJ7 AJ11 AJ15 AJ19 AJ23 AJ27 AK4 AL1 AL3 AM6 AM10 AM14 AM18 AM22 AM26 AM30 AM34 AN3 B4 B8 B12 B16 B20 B24 B28 B32 D2 D4 D18 D22 D26 D30 D34 E7 E11 E15 E19 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y5 Y37 Z2 Z34 VCCP AA5 AA37 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ5 AJ9 AJ13 AJ17 AJ21 AJ25 AJ29 AK2 AK34 AM4 AM8 AM12 AM16 AM20 AM24 AM28 AM32 B6 B10 B14 B18 B22 B26 B30 B34 C3 D6 D20 D24 D28 D32 D36 E5 E9 E13 E17 F2 F4 F14 F22 F26 F30 F34 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 X34 Y35 Z32 VCC_1.5V AD36 VCC_2.5V Z36 VCC_CMOS AB36 ! ! ) ! )) ! ) ! ) ;<5= ! ; ! 6 ! ! 73 ! ! ! ) ! <= ! > 69 69 8 : CMOS I/O GTL $ 4 : 4 $ $ $ 673 4 4 $ 673 $ 76 69 $ :4 $ 7$ 74 $ :$ 4 : $ 8 35 ) 3 3 ) @ 3 7 7 $ 5 9 6 ; 5 ; 7 9 5 5 65 7 : 8 : 3 $ $ 4 )8 ) $ ) 5 ) 4 $ 4 $ ) 4 4 $ 4 $ 4 3 3 7 7 4 : 8 7$ 74 4 3 7 $ 4 3 9 4 $ $ :$ :4 ) ) ) ) )5 )$ ) )4 )8 ) ) ) ) ) ) 5 ) $ ) ) 4 ) 8 ) ) ) ) ) )5 )$ ) )4 )8 ) ) ) ) ) )5 )$ ) )4 )8 ) )5 )5 )5 )5 )55 )5$ )5 )54 )58 )5 )$ )$ )$ )$ )$5 )$$ )$ )$4 )$8 )$ ) ) ) ) 673 76 69 : $ 8 4 5 5 5$ $? $? $? $? $? $? $? $? 5 4$ D C152,C153 near AB36 PIN 69 $

File name 694as.pdf

JET WAY INFORMATION MODEL:J-694AS TITLE COVER SHEET SOCKET 370 PROCESSOR NORTH BRIDGE (VT82C694X) SOUTH BRIDGE (VT82C686B) USB2,3 & FREQUENCY RATIO (SOCKET 370+VT82C694X+VT82C686B+AGP 4X+1 AMR) SHEET 1 2 3,4 5,6 7 SDRAM PCI SLOTS AGP SLOT ISA PULL UP RESISTANCE IDE & PANEL CLOCK SYNTHESIZER BYPASS CAPACITORS 8,9 10,11,12 13 14 15 16 17 DC-DC CONVERTER PRINTER / COM PORT AUDIO CODEC & AUDIO PORT & JOSTICK PORT AMR SLOT ATX POWER CONNECTOR / VTT TERMINATOR / VCC3 18 17 20 21 22 |LINK | 2.SCH | 3.SCH | 4.SCH | 5.SCH | 6.SCH | 7.SCH | 8.SCH | 9.SCH | 10.SCH | 11.SCH | 12.SCH | 13.SCH | 14.SCH | 15.SCH | 16.SCH | 17.SCH | 18.SCH | 19.SCH | 20.SCH | 21.SCH | 22.SCH  ()*$ (+$ ,)$/  ,"-%$.)%&$ !"#$%&$'! $# $$) "0 ,9': 9'' : 36 ' ; 2 < ' ; 2 < ' ; 2 < ' ' , ,, ,4 , =9: =9 : =9: =9': =9: 4 43 4 51 , 9: 9 : 9: 439: 439 : 439: 439': AB 3= 3, 7 3,9: 3,9 : 351 A59: A59 : 351 53 56 ' ; 2 8 ; 8; 8 A B A B A B A B A36BB 7,AB 1'2 ;; 8 21 3 ' BSEL0,BSEL1: Cyrix:Input Intel:Output CMOS I/O GTL , , , ,' , ,; , ,2 ,< , , , , , ' , , ; , , 2 , < , , , , ,' , ,; , ,2 ,< , ,' ,' ,' ,'' ,' ,'; ,' ,'2 ,'< ,' , , , ,' , ,; , ,2 ,< , ,; ,; ,; ,;' ,; ,;; ,; ,;2 ,;< ,; , , , ,' 451 BB45 45 37, 45 ,3 , 363 ,75 3 ,9: ,9 : ,9: ,9': BB ,9: 1 , , 355 355 ,< , ,; BA BA BA B7,A51 351 53 36 7 ,9': ; ; ; '2 '< < '! '! 9'' : BSEL0 BSEL1 Jumper function Short Short Bus freq. auto detected by CPU. Open Short Test 66/100 MHz CPU run 100/133 MHz. Short Open Test 100 MHz CPU run 133 MHz. ' ; 2 < ' ; 2 < ' ; 2 < ' ' , ,, ,4 , = = = =' = 4= 43 4 51 , 1< < 5 ; 5 1 ; 52 1 5; 2 ? 7' ' ' 4 4 ' 1 ? ' , ' 2 52 ; 1 < < 5 5 2 2 1 5; 5' 1< '; '; 7'' '2 @ '2 '; '; 7'2 '' '; 5'; '' ' 5'2 '; 7'; ' '2 7'' '; '' < 1 , 1 1 ,' ?' 4' 1 5 ' 5 '; SOCKET 370 GND A37 AB32 AC5 AC33 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ3 AJ7 AJ11 AJ15 AJ19 AJ23 AJ27 AK4 AL1 AL3 AM6 AM10 AM14 AM18 AM22 AM26 AM30 AM34 AN3 B4 B8 B12 B16 B20 B24 B28 B32 D2 D4 D18 D22 D26 D30 D34 E7 E11 E15 E19 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y5 Y37 Z2 Z34 VCCP AA5 AA37 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ5 AJ9 AJ13 AJ17 AJ21 AJ25 AJ29 AK2 AK34 AM4 AM8 AM12 AM16 AM20 AM24 AM28 AM32 B6 B10 B14 B18 B22 B26 B30 B34 C3 D6 D20 D24 D28 D32 D36 E5 E9 E13 E17 F2 F4 F14 F22 F26 F30 F34 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 X34 Y35 Z32 VCC_1.5V AD36 VCC_2.5V Z36 VCC_CMOS AB36 '! , '! ,, '! ,4 '! , '! =9: '! 4= '! 43 '! 4 '! 51 '! '! '! , '! 9: '! 8 36 36 ; ; 2 7 2 ;' ; 2 2 351 '' 7 CMOS I/O GTL 6 ' 3 =' = 5 ' 6' 3 5' 7 < 7' 1 ' ; ' ' ; 2 4 ,< , ; , , 2 ; 2 ' ; ' , ' 2 ' 2 ; 2 ; '2 1' '' 1 ' 5' 5 , , , ,' , ,; , ,2 ,< , , , , , ' , , ; , , 2 , < , , , ,

File name 694tasr1.pdf

4 3 2 1 JET WAY INFORMATION D MODEL:694TAS TITLE COVER SHEET REV: 1.0 (SOCKET 370+VT82C694T+VT82C686B+AGP 4X+1 AMR) D SHEET 1 2 3,4 5,6 7 C SOCKET 370 PROCESSOR NORTH BRIDGE (VT82C694T) SOUTH BRIDGE (VT82C686B) USB2,3 & FREQUENCY RATIO C SDRAM PCI SLOTS AGP SLOT ISA PULL UP RESISTANCE IDE & PANEL CLOCK SYNTHESIZER BYPASS CAPACITORS B 8,9 10,11,12 13 14 15 16 17 B DC-DC CONVERTER PRINTER / COM PORT AUDIO CODEC & AUDIO PORT & JOSTICK PORT AMR SLOT ATX POWER CONNECTOR / VTT TERMINATOR / VCC3 18 17 20 21 22 |LINK | 2.SCH | 3.SCH | 4.SCH | 5.SCH | 6.SCH | 7.SCH | 8.SCH | 9.SCH | 10.SCH | 11.SCH | 12.SCH | 13.SCH | 14.SCH | 15.SCH | 16.SCH | 17.SCH | 18.SCH | 19.SCH | 20.SCH | 21.SCH | 22.SCH A A JETWAY INFORMATION Title COVER SHEET Size Date: 4 3 2 Document Number J-694TAS REV:1.0 Tuesday, May 07, 2002 1 Rev 0.1 Sheet 1 of 23 4 3 2 1 23 23 VTTGD AK4 R286 1K 3,22 A[3..31] A[3..31] A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 -ADS -DRDY -DBSY -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -BREQ0 -BPRI -BNR -HLOCK -HIT -HITM -DEFER -RS0 -RS1 -RS2 AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AN31 AN27 AL27 AN25 AK18 AH16 AH18 AL19 AL17 AN29 AN17 AH14 AK20 AL25 AL23 AN19 AH26 AH22 AK28 C35 E35 G33 E37 1K X4 AH4 J37 A35 CPU A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS DRDY DBSY TRDY REQ[0] REQ[1] REQ[2] REQ[3] REQ[4] BR0 BPRI BNR LOCK HIT HITM DEFER RS[0] RS[1] RS[2] BPM[0] BPM[1] BP[2] BP[3] RESET NC/RESET* PREQ PRDY FERR IGNNE A20M GND/NC PICD[0] PICD[1] PICCLK VTT INTR/LINT[0] NMI/LINT[1] SMI STPCLK SLP FLUSH INIT IERR VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 VCC_1.5V VCC_2.5V VCC_CMOS NC/VTT* NC/VTT* NC/VTT* NC/VTT* NC/PU** GND/NC* NCHCTRL SOCKET 370T_1 R292 150_1% C280 0.1U VCC_CMOS C35 0.1u R291 14 C22 1u R55 VCC_CMOS NC-2.7K AF36 AF36 VTT D[0..63] AN3 U35 S33 S37 R287 1K -SMI D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 BCLK **BSEL1 BSEL0 PWRGOOD BSEL1 THERMDP THERMDN CPUPRES EDGCTRL THERMTRIP VID[0] VID[1] VID[2] VID[3] **VID[4] TCK TDI TDO TMS TRST PLL1 PLL2 RSRVD48 RSRVD49 RSRVD51 *NC/VTT *NC/VTT *NC/VTT *GND/CLKREF VTT VTT E23 VTT AN21VTT AA35VTT W1 T4 N1 M6 U1 S3 T6 J1 S1 P6 Q3 M4 Q1 L1 N3 U3 H4 R4 P4 H6 L3 G1 F8 G3 K6 E3 E1 F12 A5 A3 J3 C5 F6 C1 C7 B2 C9 A9 D8 D10 C15 D14 D12 A7 A11 C11 A21 A15 A17 C13 C25 A13 D16 A23 C21 C19 C27 A19 C23 C17 A25 A27 E25 F16 W37 AK30 AJ33 AK26 AJ31 AL31 AL29 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D

File name 845ca.pdf

8 7 6 5 4 3 2 1 845CA CPU1 NET CHANGE HDBI0 HDBI1 HDBI2 HDBI3 VID0 VID1 VID2 VID3 VID4 HDBI0 HDBI1 HDBI2 HDBI3 VID0 VID1 VID2 VID3 VID4 D 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 HOST_ADDRESS MCH <--> CPU 2"~10"+/-200mil REF. TO GND C HOST_DATA MCH <--> CPU 2"~10"+/-100mil REF. TO GND B VCC3 R14 1K HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 BSEL1 3 BSEL0 B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 V3 W2 Y1 AB1 AE25 AD6 AD5 A22 A7 AD2 AD3 AE21 AF24 AF25 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 RSVD/A32RSVD/A33RSVD/A34RSVD/A35DBRESET# BSEL0 BSEL1 RESEV0 RESEV1 RESEV2 RESEV3 RESEV4 RESEV5 RESEV6 F478A + HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 K2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 GTLREF0 GTLREF1 GTLREF2 GTLREF3 BPM0 BPM1 BPM2 BPM3 BPM4 BPM5 REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 TESTHI4 TESTHI5 TESTHI7 TESTHI2 BCLK0 BCLK1 RS0 RS1 RS2 AP0 AP1 COMP0 COMP1 DEP0 DEP1 DEP2 DEP3 ADSTB0 ADSTB1 STBP#0 STBP#1 STBP#2 STBP#3 STBN#0 STBN#1 STBN#2 STBN#3 LINT0 LINT1 IERR# MCERR# FERR# STPCLK# BINIT# INIT# RSP# DBSY# DRDY# TRDY# ADS# LOCK# BR0# BNR# HIT# HITM# BPRI# DEFER# TCK TDI TMS TRST# TDO THERMDA THERMDC THERMTRIP PROCHOT# IGNNE# SMI# A20M# SLP# PWRGOOD RESET# TESTHI1 TESTHI0 VCC_SENSE VSS_SENSE ITPCLK0 ITPCLK1 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI3 TESTHI6 TESTHI12 AA21 AA6 F20 F6 AC6 AB5 AC4 Y6 AA5 AB4 J1 K5 J4 J3 H3 AC24 AC23 AB22 A

File name 845EIClient_guide.pdf

Intel® 845E Interactive Client Reference Design User's Guide October 2002 Order Number: 273782-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel 845E chipset may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. AlertVIEW, AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Connect, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, LANDesk, LanRover, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, Shiva, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, Trillium, VoiceBrick, Vtune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © Intel Corporation, 2002 2 Intel® 845E Reference Design User's Guide Contents Contents 1 Term Definitions ...

File name 845eiclient_schem_pdf.pdf

5 4 3 2 1 Intel (R) 845E Interactive Client Reference Design D Revision X2 Last Change : 2002-09-26 D # 1 2 3 4 5 6 7 8 9 10 11 C Schematic Page COVER SHEET BLOCK DIAGRAM BLOCK-POWER MECH-ROUTE NOTES CPU-P4 BUS CPU-P4 POWER CPU-ITP MCH-SYSBUS & CLOCK MCH-AGP & DDR MCH-POWER CLK-ICS950201 DDR-DIMM 0 DDR-DIMM 1 ICH4-SYSBUS & PCI ICH4-LPC & IDE & USB ICH4-POWER GLUE LOGIC SIO0-LPC47M107 SIO1-LPC47N227 CONN-COM1/COM2/LPT CONN-COM3/COM4/KBC AC97-AD1885 LAN-10/100/1000 BUS LAN-10/100/1000 CONN VGA-COUGAR-01 VGA-COUGAR-02 VGA-COUGAR-03 CONN-PCI CONN-01 IDE-FLOPPY USB0-USB1-LAN0 USB2-USB5 SYSTEM CONTROL DDR-POWER POWER Prefix A_ AC_ APIC_ AUD_ CK_ EEn_ EN_ F_ FWH_ G_ GND_ GND H_ I2C_ IDE_ INT_ KB_ L_ LANn_ LP_ M_ MIDI_ MS_ P_ SPn_ USB_ V_ ZV_ Netobject CRITICAL ANALOG TRACES AC97 SIGNAL APIC SIGNAL ANALOG AUDIO SIGNAL CLOCK SIGNAL SERIAL EEPROM LANn ENABLE FOR POWER SOURCES FLOPPY DISK SIGNAL FIRMWARE HUB SIGNAL AGP BUS SIGNAL GND SIGNAL DERIVED GND POWER P4 HOSTBUS SIGNAL I2C BUS SIGNAL IDE SIGNAL INTERRUPT SIGNAL KEYBOARD SIGNAL LPC BUS SIGNAL LAN CONTROLLER n SIGNAL LPT1284 SIGNAL MEMORY BUS SIGNAL MIDI SIGNAL MOUSE SIGNAL PCI BUS SIGNAL SERIAL PORT n SIGNAL USB PORT SIGNAL POWER ZV VIDEO PORT SIGNAL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Changes from X1 to X2 All BAT54A (0-0031-1261) changed to BAT54 (0-0031-1104) due to wrong polarity R712 changed from 10k to 15k to adjust voltage PU R756 and R757 added @ U38.15 (PG_VDDR) and U38.16 (PG_V1V5) Net on pins U3.54 and U3.55 separated (BSEL[0..1]) due to naming error PU R758 added at CN34.7 (SYS_RESET#) PU R759 added at U39.4 (VIDPWRGD) C717 changed from 4u7 to 1u R607 not populated R571 and R572 not populated (FWH Test Pins) R585 and R586 not populated (for LVDS 18 Bit) R760 and C741 added to U7.50 to generate a V_3V3SB input delay for resume reset R501 and R494 not populated due to PCI config of LAN 82540 U36 FWH symbol changed due to wrong pinout (Pin 23, 24 and 25) R496 changed to 4k7 and set to GND (PD M66EN) R525 and R499 is now populated R530 not populated due to wrong V_2V5LAN voltage U20.G4 is now 51R Pulldown to GND U20.H4 is now 33R Pullup to V_3V3LAN AC97 Fixup (AC_SDIN0 -> Changed to AC_SDIN2 on ICH4) Swap ICH4 Pin N20 and P21 (H_HISTB+ / H_HISTB-) due to wrong info in yellow cover LAN 82540 Fixup (R519 populated with 0R, R517 changed to 2K49 and R513 changed to 330R) R615 changed to 4K32 due to Cougar Bug HW Rev changed to 2 at Glue Logic R373 is now populated with 10M CN12.4 must be isolated cause of shortcut of AUD_MIC_BIAS to GND PU R761-R765 added to VID[0:4] PU R766 added to U23.15, PD R767 added to U23.14 (Panellink strapping options) HD-LED-power connected to V_5V0 instead of V_5V0SB PD R768 added to PS_ON PU R769 added to U3.28 (PGOOD408#) PD R770, R771, R772 added to power enables (default off, if CPLD not configured) PD R773-R776 added to serial port shut down pins Splitted SMI# and PME# s

File name 845gdmln.pdf

A JET WAY INFORMATION 845GDM/845GDML/845LDM/845LDML PAGE01 PAGE02 PAGE03 PAGE04 PAGE05 PAGE06 PAGE07 PAGE08 PAGE09 PAGE10 PAGE11 PAGE12 PAGE13 PAGE14 PAGE15 PAGE16 PAGE17 PAGE18 PAGE19 PAGE20 PAGE21 PAGE22 PAGE23 PAGE24 PAGE25 PAGE26 PAGE27 PAGE28 PAGE29 PAGE30 PAGE31 PAGE32 PAGE33 PAGE34 COVER SHEET BLOCK DIAGRAM SOCKET 478 PROCESSOR: PART1 SOCKET 478 PROCESSOR: PART2 P4 CAPACITORS CLOCK SYNTHESIZER GMCH:PART1 GMCH:PART2 GMCH:PART3 DDR TERMINATOR 1 DIMM1 & DIMM2 DDR TERMINATOR 2 ICH4: PART1 ICH4: PART2 ICH4: PART3(POWER) FIRMWARE HUB (FWH) & IDE 4X AGP SLOT PCI SLOT 1 & 2 PCI SLOT 3 SUPER I/O (W83627HF) PRT & GAME PORT COM PORT & IR/CIR CONNECTOR H/W MONITORING USB & RJ45 PORT CNR SLOT & K/B PORT CODEC AUDIOI CONNECTOR SYSTEM1(FRONT PANEL) SYSTEM2(ATX POWER CONNECTOR) Processor VR VOLTAGE REGULATORS RTL 8100BL LAN VGA CONNECTOR W83L518D CARD READER A A Title Size Date: A JET WAY INFORMATION COVER SHEET Document Number 845GDM Friday, July 05, 2002 Rev 0 Sheet 1 of 34 A BLOCK DIAGRAM Processor VR 478-PIN P4 PROCESSOR ADDR ADDR CTRL DATA CK_408 AGTL+ BUS CTRL DATA VGA Connector GMCH AGP Connector BROOKDALE-G DDR266 Modules IDE Primary UDMA/100 PCI CONN 1 PCI CONN 2 PCI CONN 3 RTL8100 LAN IDE Secondary PCI CNTRL ICH4 A PCI ADDR/DATA A USB PORT 1-6 USB2.0 USB CNR Connector FirmWare Hub AC'97 LINK AC'97 CODEC SIO Floppy Game Port Keyboard Mouse Serial 1 Serial 2 Parallel Title Size Date: A JET WAY INFORMATION BLOCK DIAGRAM Document Number 845GDM Wednesday, May 01, 2002 Sheet Rev 0 34 2 of A B C D E VCCP A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 L25 K26 K25 J26 U5A A DEP3 DEP2 DEP1 DEP0 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC A B C H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8 H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63 7 H_RS0# 7 H_RS1# 7 H_RS2# F1 G5 F4 RS0 RS1 RS2 H1 VSS H4 VSS H23 VSS H26 VSS A11 VSS A13 VSS A15 VSS A17 VSS A19 VSS A21 VSS A24 VSS A26 VSS A3 VSS A9 VSS AA1 VSS AA11 VSS AA13 VSS AA15 VSS AA17 VSS AA19 VSS AA23 VSS AA26 AA4 VSS AA7 VSS AA9 VSS VSS AB10 VSS AB12 VSS AB14 VSS AB16 VSS

File name 845lda.pdf

A JET WAY INFORMATION 845LDA PAGE01 PAGE02 PAGE03 PAGE04 PAGE05 PAGE06 PAGE07 PAGE08 PAGE09 PAGE10 PAGE11 PAGE12 PAGE13 PAGE14 PAGE15 PAGE16 PAGE17 PAGE18 PAGE19 PAGE20 PAGE21 PAGE22 PAGE23 PAGE24 PAGE25 PAGE26 PAGE27 PAGE28 PAGE29 PAGE30 PAGE31 PAGE32 PAGE33 PAGE34 COVER SHEET BLOCK DIAGRAM SOCKET 478 PROCESSOR: PART1 SOCKET 478 PROCESSOR: PART2 P4 CAPACITORS CLOCK SYNTHESIZER GMCH:PART1 GMCH:PART2 GMCH:PART3 DDR TERMINATOR 1 DIMM1 & DIMM2 DDR TERMINATOR 2 ICH4: PART1 ICH4: PART2 ICH4: PART3(POWER) FIRMWARE HUB (FWH) & IDE 4X AGP SLOT PCI SLOT 1 & 2 PCI SLOT 3 SUPER I/O (W83627HF) PRT & GAME PORT COM PORT & IR/CIR CONNECTOR H/W MONITORING USB & RJ45 PORT CNR SLOT & K/B PORT CODEC AUDIOI CONNECTOR SYSTEM1(FRONT PANEL) SYSTEM2(ATX POWER CONNECTOR) Processor VR VOLTAGE REGULATORS RTL 8100BL LAN VGA CONNECTOR PCI SLOT 4 & 5 A A Title Size Date: A JET WAY INFORMATION COVER SHEET Document Number 845LDA Tuesday, May 07, 2002 Rev 0 Sheet 1 of 34 A BLOCK DIAGRAM Processor VR 478-PIN P4 PROCESSOR ADDR ADDR CTRL DATA CK_408 AGTL+ BUS CTRL DATA VGA Connector GMCH AGP Connector BROOKDALE-GL DDR266 Modules IDE Primary UDMA/100 PCI CONN 1 PCI CONN 2 PCI CONN 3 PCI CONN 4 PCI CONN 5 RTL8100 LAN IDE Secondary PCI CNTRL ICH4 A PCI ADDR/DATA A USB PORT 1-6 USB2.0 USB CNR Connector FirmWare Hub AC'97 LINK AC'97 CODEC SIO Floppy Game Port Keyboard Mouse Serial 1 Serial 2 Parallel Title Size Date: A JET WAY INFORMATION BLOCK DIAGRAM Document Number 845LDA Tuesday, May 07, 2002 Sheet Rev 0 34 2 of A B C D E VCCP A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 L25 K26 K25 J26 DEP3 DEP2 DEP1 DEP0 U100A A VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC A B C H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8 H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63 7 H_RS0# 7 H_RS1# 7 H_RS2# F1 G5 F4 RS0 RS1 RS2 H1 VSS H4 VSS H23 VSS H26 VSS A11 VSS A13 VSS A15 VSS A17 VSS A19 VSS A21 VSS A24 VSS A26 VSS A3 VSS A9 VSS AA1 VSS AA11 VSS AA13 VSS AA15 VSS AA17 VSS AA19 VSS AA23 VSS AA26 AA4 VSS AA7 VSS AA9 VSS VSS AB10 VSS AB12 VSS AB14 VSS AB16 VSS AB18

File name acer1670.pdf

A B C D E LA-2411 1 1 2 Compal confidential 2 Schematics Document DT TRANSPORT or Prescott uFCPGA with ATI-RC300M+SB200 core logic 3 2004-06-28 3 REV:0.3 4 4 Compal Electronics, Inc. Title Cover Sheet THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D LA-2411 0.1 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: ¬PґБ¤T ¤C¤л ,

File name an43.pdf

Application Note AN-43 TOPSwitch-HX Family ® Design Guide Introduction The TOPSwitch-HX is a highly integrated monolithic off-line switcher IC designed for off-line power supplies. TOPSwitch-HX integrated circuits enable design of power supplies up to 195 W, while providing high efficiency under all load conditions. TOPSwitch-HX also provides very good performance at low load and during standby (no load) operation. The TOPSwitch-HX family allows the designer to meet the efficiency requirements for the new energy-efficiency standards. Innovative and proprietary features enable design of compact and cost effective switching power supplies while reducing overall design cycle time and system cost. The TOPSwitch-HX family also enables the design of power supplies with robust functionality and provides enhanced safety features such as output overvoltage protection, overload power limiting and hysteretic thermal protection. Each member of the family has a high-voltage power MOSFET and its controller combined monolithically. Internal start-up bias current is drawn from a high-voltage current source connected to the DRAIN pin, eliminating the need for external start-up circuitry. The internal oscillator is frequency modulated (jitter) to reduce EMI. In addition, the ICs have integrated functions that provide system-level protection. The auto-restart function limits power dissipation in the MOSFET, the transformer and the output diode during overload, output short-circuit or open-loop conditions. The auto-recovering hysteretic thermal shutdown function also disables MOSFET switching if temperature exceeds safe limits. A programmable UV/OV detection feature allows glitch free start- up and shutdown of the power supply during line sag or line surge conditions. Power Integrations' EcoSmart® technology enables supplies designed around the TOPSwitch-HX family to consume less than 200 mW at no load and maintain constant efficiency over the full line and load range. TOPSwitch-HX family of solutions easily meets energy efficiency standards such as the California Energy Commission (CEC), European Code of Conduct and ENERGY STAR. Basic Circuit Configuration The discussion of the function of application-specific requirements, such as constant current, constant power outputs, etc., is beyond the scope of this design guide. However, such requirements may be satisfied by adding additional circuitry to the basic converter descriptions shown here. For more information on additional circuit capabilities, design examples and other information, visit the Power Integrations web site or contact your PI sales representative. Scope This application note is intended for engineers designing an isolated AC-DC flyback power supply using the TOPSwitch-HX family of devices. It provides guidelines to enable an engineer to quickly select key components and also complete a suitable transformer design. To help simplify the task, the application note refers directly to the PI Xls desi

File name ATX - Sunny 230.pdf

file:///C|/WINDOWS/Desktop/sunny_atx230.GIF file:///C|/WINDOWS/Desktop/sunny_atx230.GIF [05/05/04 12:58:40]

File name ATX 5400M Microlab 350W.pdf

1 2 C9 105K/250V 3 4 R30 4.7E ST1020 D23 D28 5 104/50V C21 L1 106-26 + 6 +12v.OUT 1UH L5 + 1 BD1-BD4 .47/275VAC C3 TH1 054 F1 5A/250V 222/275VAC CX1 .01 LF1 CX2 RV 1M C4 3 4 2 C5 220UF/200V SW1 5A/250V C6 220UF/200V R1 150K R2 150K D5 FR107 R3 2.7K E13007/F Q1 R5 1E 4.7E D9 4148 D10 4148 R31 FR107 D21 ST/2045D24 R35 C8 10/50V C21 T1 D25 FR104 L1 D20 L1 106-26 C28 FR107 L6 C27 + C24 C29 220/16V 220UF/16V D 1UH +5v.out C24 R33 27E R32 470E L4 FR105 D22 L3 34 34UH + + D + 2200/10V 2000UF/10V D6 FR107 R61E D7 4148 C7 D8 4148 L8 D26 FR104 50UH 106-26 L1 106-26 D27 FR105 -12v.out -5v.out C22 200/16V + E13007/F R7 2.7K Q2 C23 220/16V 10/50V T2 + D28 SBL2040 L2 62UH + L7 1/UH C31 2200/10 3.3v.out R43 R38 R41 10E 10E R39 1.2K 2.65K R42 27E C30 2200/10V + C 3 R51 1K R53 100E D50 4148 R55 47K R? 14 13 R72 1M 12 11 10 B R52 100K 9 8 R71 15K C45 103/50v R70 18K R50 270K C40 1/50v R63 27K 150K R69 D54 4148 D56 4148 ZD4 4.7V PS--ON R66 1.2K ZD3 13V ZD1 3.2V to.+5v 4 D55 4148 339/ST 6 7 R73 R25 3.9K 5.6K R59 10K + D29 4148 R54 47K D51 4148 C41 1/50V R58 1 2 3 D53 4148 4 5 R? RES2 R? RES2 R61 15K R26 27K R27 560K R28 1M 16 15 14 13 12 11 10 9 R15 2.7K R19 2.7K R18 4.7K 1 2 3 4 5 6 7 8 R10 24K R11 5.6K R12 47K R16 2.7k VR1 102/T R62 33K R57 27K C42 4.7UF 5.1K R56 D15 4148 D17 FR05 C44 103/50V D52 4148 1K R9 1.5K D16 4148 D13 4148 Q12 C945 R8 100 D21 4148 Q3 C945 D11 4148 Q4 C945 Q5 C11 1UF/50V + D14 4148 D30 IN4148 A928A R36 100E C C29 C224 R40 2.7K C32 R39 1.2K PG.OUT IC4 KA431 + 0.22UF/50V TO.5VSB-2 B R17 4.7k IC1 KA7500B C13 102/50v R13 33k R14 47K R15 16k 102/50VC12 1UF/50V C46 R21 47K R22 100K R23 R24 27K 1M R20 1K C7 47UF/50V C47 103 A R67 1.8K R68 1.5K D57 4148 to.+12v to.+3.3v to.--12v to.--5v Title Size B Date: File: 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-2.ddb Drawn By: 6 Number Revision A 1 2 3 1 2 3 4 5 6 D D VCC+ 1D4 1R2 270K D101 FR107 T1 C1C1 1R3 220 104/50V 1C2 104/50V IC4 LTV817 1R6 100K D102 IN4148 1R8 47E 4148 1R1 270K D105 FR104 HER204 L10 62UH 5vsB.out 1R12 150E C 1R13 510E 1000UF/160V Te C D1D3 to.5vsb-2 C14 47UF/50V 1R11 15K 1C7 104/50V 1Q2 2SC5027 KA431 1R11 2.7K 1R14 100E 1C3 103/1KV 2SC5344Y 1Q1 1D7 4148/ST B 1R14 1.5K 1R4 1K 1C4 1R13 2.5K B 1UF/50V 1C6 1R7 1.5E VCC- A Title Size B Date: File: 1 2 3 4 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-1.DDB Drawn By: 6 Number Revision A

File name ATX TopSwitchGX 180W.pdf

Design Idea DI-30 ® TOPSwitch-GX 180 W PC Main SFX Supply Application PC Main Device TOP249Y Power Output 180 W Input Voltage Output Voltage Topology Forward 90-130 VAC / 180-265 VAC 3.3 V / 5 V / 12 V / -12 V ® Design Highlights · 180 W cont. (200 W peak) in PC SFX form factor · Includes passive power factor correction (PFC) · TOPSwitch-GX integrated features enable extremely low component count · Meets 1 W standby spec (0.91 W input, 0.5 W output) · High efficiency (71% minimum) · Integrated line undervoltage and overvoltage detection · Low EMI due to frequency jitter · SOURCE referenced TO-220 tab lowers conducted EMI · Maximum duty cycle reduction (DCMAX) prevents transformer saturation for fault and transient loads · Uses conventional magamp for 3.3 V output · Meets CISPR22B/EN55022B conducted EMI C3) balancing circuit, operating only as needed to minimize zero-load power consumption. Resistors R3, R5 and R6 implement start-up undervoltage lockout, which prevents the supply from starting below 180 VDC. Components R4, R14, Q1 and R30 implement an independent undervoltage using the X pin, which allows the supply to continue delivering power all the way down to 140 VDC (increasing holdup time). Resistor R7 provides additional hysteresis. The primary side components D1, VR3-5 and C4, along with secondary side C9 and R30, implement the Zener/capacitor reset/clamp circuit. This circuit provides reset voltage for the transformer and clamps the DRAIN pin voltage to a safe level (<~600 V) under all conditions. The reset circuit works in conjunction with the DCMAX reduction circuit (R8, R36, C22, VR19 and D18) to limit the maximum duty cycle and prevent transformer saturation under fault and transient conditions. C10 1 nF 50 V 5 R1 330 k C4 2.2 nF 1 kV D1 1N5407 2 R3 2.2 M R4 2.2 M R5 180 k 1 14 D7 MBR3045 13 R30 1 1W 8, 9, 10 R6 2.2 M C20 330 pF 50 V 11,12 3 R13 10 D8 MBR6045 C12 2200 µF 6.3 V R21 270 C9 47 nF 50 V 7, 8 Coupled choke L1 13 µH Operation TOPSwitch-GX integrates many features designed for use with forward converters. Passive power factor correction (PFC) is implemented using inductors LPFC1 and LPFC2. Transistors Q4, Q6, R1, R2, R3, R5, and R6 form an active capacitor (C2, 4 1, 2 C11 1000 µF 16 V L2 0.5 µH +12 V 6 3 +5 V C13 220 µF 63 V TO MAGAMP OUT (3.3 V) RTN C25 1 µF 50 V LM 320 - 12 V BR1 KBL06 CY3 2.2 nF (Safety) JP9 CX1 0.047 µF 250 VAC L7 8.2 mH CX2 0.33 µF 250V RT1 10 R10 560 K 1/2 W LPFC1 C2 470 µF 200 V Q4 MPSA42 LPFC2 CY4 2.2 nF (Safety) Q6 MPSA92 To AC Selector Switch VR3 BZY97C200 VR4 BZY97C180 VR5 BZY97CR2 180 330 k D L CONTROL C TOPSwitch-GX U1 TOP249 R8 130 k 1% R36 43.2 k 1% C22 100 pF 50 V R7 560 k D6 BAV20 D18 BAV20 4 C5 1 µF 100 V C27 330 pF 50 V R11 330 D20 UF4002 C24 330 µF 25 V R18 4.74 k 1% R15 1.8 k C17 100 nF 50 V R16 1 k C16 100 nF R17 50 V 15 k VR19 1N5229 C3 470 µF 200 V R20 270 k S X F C8 0.033 µF 50 V R9 47 C6 47 µF 16 V R11 300 Q1 2N3908 R14 75 k D105 1N4148 U2 SFH615A-

File name atx-5400m__microlab_350w_.pdf

1 2 C9 105K/250V 3 4 R30 4.7E ST1020 D23 D28 5 104/50V C21 L1 106-26 + 6 +12v.OUT 1UH L5 + 1 BD1-BD4 .47/275VAC C3 TH1 054 F1 5A/250V 222/275VAC CX1 .01 LF1 CX2 RV 1M C4 3 4 2 C5 220UF/200V SW1 5A/250V C6 220UF/200V R1 150K R2 150K D5 FR107 R3 2.7K E13007/F Q1 R5 1E 4.7E D9 4148 D10 4148 R31 FR107 D21 ST/2045D24 R35 C8 10/50V C21 T1 D25 FR104 L1 D20 L1 106-26 C28 FR107 L6 C27 + C24 C29 220/16V 220UF/16V D 1UH +5v.out C24 R33 27E R32 470E L4 FR105 D22 L3 34 34UH + + D + 2200/10V 2000UF/10V D6 FR107 R61E D7 4148 C7 D8 4148 L8 D26 FR104 50UH 106-26 L1 106-26 D27 FR105 -12v.out -5v.out C22 200/16V + E13007/F R7 2.7K Q2 C23 220/16V 10/50V T2 + D28 SBL2040 L2 62UH + L7 1/UH C31 2200/10 3.3v.out R43 R38 R41 10E 10E R39 1.2K 2.65K R42 27E C30 2200/10V + C 3 R51 1K R53 100E D50 4148 R55 47K R? 14 13 R72 1M 12 11 10 B R52 100K 9 8 R71 15K C45 103/50v R70 18K R50 270K C40 1/50v R63 27K 150K R69 D54 4148 D56 4148 ZD4 4.7V PS--ON R66 1.2K ZD3 13V ZD1 3.2V to.+5v 4 D55 4148 339/ST 6 7 R73 R25 3.9K 5.6K R59 10K + D29 4148 R54 47K D51 4148 C41 1/50V R58 1 2 3 D53 4148 4 5 R? RES2 R? RES2 R61 15K R26 27K R27 560K R28 1M 16 15 14 13 12 11 10 9 R15 2.7K R19 2.7K R18 4.7K 1 2 3 4 5 6 7 8 R10 24K R11 5.6K R12 47K R16 2.7k VR1 102/T R62 33K R57 27K C42 4.7UF 5.1K R56 D15 4148 D17 FR05 C44 103/50V D52 4148 1K R9 1.5K D16 4148 D13 4148 Q12 C945 R8 100 D21 4148 Q3 C945 D11 4148 Q4 C945 Q5 C11 1UF/50V + D14 4148 D30 IN4148 A928A R36 100E C C29 C224 R40 2.7K C32 R39 1.2K PG.OUT IC4 KA431 + 0.22UF/50V TO.5VSB-2 B R17 4.7k IC1 KA7500B C13 102/50v R13 33k R14 47K R15 16k 102/50VC12 1UF/50V C46 R21 47K R22 100K R23 R24 27K 1M R20 1K C7 47UF/50V C47 103 A R67 1.8K R68 1.5K D57 4148 to.+12v to.+3.3v to.--12v to.--5v Title Size B Date: File: 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-2.ddb Drawn By: 6 Number Revision A 1 2 3 1 2 3 4 5 6 D D VCC+ 1D4 1R2 270K D101 FR107 T1 C1C1 1R3 220 104/50V 1C2 104/50V IC4 LTV817 1R6 100K D102 IN4148 1R8 47E 4148 1R1 270K D105 FR104 HER204 L10 62UH 5vsB.out 1R12 150E C 1R13 510E 1000UF/160V Te C D1D3 to.5vsb-2 C14 47UF/50V 1R11 15K 1C7 104/50V 1Q2 2SC5027 KA431 1R11 2.7K 1R14 100E 1C3 103/1KV 2SC5344Y 1Q1 1D7 4148/ST B 1R14 1.5K 1R4 1K 1C4 1R13 2.5K B 1UF/50V 1C6 1R7 1.5E VCC- A Title Size B Date: File: 1 2 3 4 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-1.DDB Drawn By: 6 Number Revision A

File name ATX-5400X (Microlab 400W).pdf

1 2 C9 205K/250V 3 4 ST1020 D10A 5 L1 106-26 + 6 +12v.OUT + BD1-BD4 .47/275VAC C3 TH1 054 F1 5A/250V 222/275VAC CX1 .01 LF1 CX2 RV 1M 4 2 C7 470UF/200V SW1 C4 3 5A/250V C8 470UF/200V R3B 220K R3A 220K D1 FR107 R9 2.7K 2S2625 Q1 R6 2.2E R5 51E 1UH L5 1 R7A 4.7E D3A 4148 D3 4148 C21 104/50V R30 4.7E FR152 D12 ST/3040D11A L1 106-26 L6 C27 + C24 C29 220/16V 220UF/16V D R6A 2.2E 1UH +5v.out C24 R33 27E R32 470E L4 FR105 D22 34UH + + D + C8 C10 102/1KV 10/50V T1 C22 103 R23 4.7E D10B FR152 2200/10V L1 106-26 2000UF/10V -12v.out -5v.out D2 FR107 2S2625 Q2 R7 2.7K R8A 2.2E R8 2.2E C710/50V + L8 R9A 4.7E D3A 4148 T2 D3 4148 50UH D15A SBL2040 KA7905 IC6 C32 10/50V + C23 220/16V L2 62UH + L7 1/UH C25 2200/10 R43A 10E + 3.3v.out R29 10E 2200/10V C26 C PG.OUT 1UF/50V C42 3 R62 1K R37 22E R37A 22E D16 4148 R8 100 D21 4148 Q8 C945 R9 1.5K D16 4148 D26 4148 D11 4148 Q28 C945 R41 39E Q5 C37 4.7UF/50V + D27 4148 D17 IN4148 A928A IC4 KA431 R32 10E R31 100E C28 4.7UF/50V C R77 330K R68 4.7K 13 R64 15K D30 4148 11 Q11 A733 B D33 4148 10 R69 33K 9 8 R67 4.7K 339/ST 6 7 4 12 2 3 R? 14 1 R76 7.5K D22 IN418 3.3VS + R34 845EK R65 4.7K R38 22E C28A C104 R35 2.4K R74 1M R75 27K R39 4.7 C36 22UF/50V D17 FR05 5 R79 12K TO.5VSB-2 R43 2.7K R42 2.7K R46 2.7K 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 R40 1K R61 150E R47 2.7k C38 102/50v R81 27k R14 47K R45 16k 103/50VC39 R59 1.2K R57 R60 1.2K 1K B R48 51K VR1 101/T D23 IN4148 R72 56K C43 104 C45 103/50v IC1 KA7500B + R63 4.7K Q10 A733 R69 150K PS--ON C46 104 C40 R80 15K R71 220K R50 56K R20 1K C40 4.7UF/50V C7 47UF/50V C41 103 R16 47E A D18 4148 1/50v D32 4148 R70 12K C44 224 R56 5.6K 1 2 3 D56 4148 to.--5v R54 1.5K D18A4148 to.--12v to.+5v 1KR54A D19 4148 to.+12v ZD3 13V 4 5 3.2V ZD1 to.+3.3v Size B Date: File: 13-Aug-2004 Sheet of C:\DOCUME~1\WANGZH~1.000\LOCALS~1\Temp\5400X-2.ddb Drawn By: 6 Number Revision Title A R62 1.2K D23 4148 ZD4 4.7V 1 2 3 4 5 6 D D VCC+ D8 to.5vsb-2 R10A 220K D101 FR107 C C16 102/50V 14C2 104/50V IC4 LTV817 D6 IN4148 C13 103/1KV D4 T1 4148 R10B 220K R11 39K R18 47E R16 56E D9 FR104 SR560 C17 102/1KV C C21 47UF/50V L9 62UH 5vsB.out R17 51E R19 220E R22 3.9K C20 104/50V R20 2.6K R11A 120E R15 220 Q3 2SC5027 1000UF/10V C18 C19 1000UF/10V KA431 R21 2.5K R13 1K B 1Q1 2SC5344Y B 104/100v C15 R12 1.5E VCC- A Title Size B Date: File: 1 2 3 4 5 13-Aug-2004 Sheet of C:\DOCUME~1\WANGZH~1.000\LOCALS~1\Temp\5400X-1.DDB Drawn By: 6 Number Revision A

File name Dell-D600-www.lqv77.com.pdf

1 2 3 4 5 6 7 8 BONDI II A A AC/BATT CONNECTOR RUN POWER SW PG 47 BATT SELECTOR BATT CHARGER PG 49 Banias (Micro-FCPGA) DC/DC PG 46 CPU VR PG 43 CLOCKS PG 14 RESET CKT PG 41 PG 4,5 PG 40 PG 42 Panel Connector 4X100MHZ B PG 18 LVDS 266/200 MHZ DDR ODEM MCH-M 593 Micro-FCBGA PG 6,7, 8 Video Controller AGP PG 15,16,17 DVI B S-Video PG 31(IO) DDR-SODIMM1 266/200 MHZ DDR VGA PG 31 2 Rear Ports PG 31(IO) DDR-SODIMM2 66(266)MHZ, 1.8V HUB I/F IDE1 - HDD PG 20 C 1 Port for Bluetooth. PG 30(Bluetooth) 1 Port 33MHZ, 3.3V PCI ATA 66/100 Q-SWITCH PG 38 Internal Media Bay CD-ROM PG 20 ATA 66/100 USB2.0 1 port AC97 ICH4-M 421 BGA PG 9,10,11 DOCKING CONNECTOR PG 39 C BroadCom Lan(5702) PG 35 MINI-PCI Wireless LAN Bluetooth CARDBUS OZ711EC1 PG 22 PG 23 LPC AUDIO PG 33,34 MDC PG 24 Magnetics PG 36 RJ45 PG 36 SIO(Macallen) 256 Pins LBGA DOCK LPC X-Bus D S/PDIF to DOCK PG 39 Audio Jacks PG 34 RJ11 to DOCK PG 39 Tip Ring PG 24 PG 25,26 D PS/2 IrDA PG 37 1 2 QUANTA COMPUTER Flash PG 29 5 6 Keyboard PG 26 3 Serial PG 27 Parallel PG 28 4 Touchpad/ Stick point PG 30 Title Schematic Block Diagram1 Size Date: Document Number JM2 Monday, January 06, 2003 7 Rev 2E Sheet 1 8 of 49 PDF "pdfFactory Pro" www.fineprint.com.cn 1 2 3 4 5 6 7 8 A A Spread Spectrum PG 18 Embed 16MB Video RAM Memory Interface Integrated TMDS Interface DOCK Connector PG 39 DVI Connector in DOCK VGA Connector B DAC1 (CRT) Interface ATI Mobility M7D/M9CSP32 Core Logic PG 4, 5 External TMDS Interface B PG 19 S-Video PG 31 DAC2 (TV/CRT2)) Interface Power & Ground Interface PCI/AGP LVDS GPIOs LCD Connector PG 18 C Voltage Regulation PG 48 C D D QUANTA COMPUTER Title Schematic Block Diagram2 Size Date: 1 2 3 4 5 6 Document Number JM2 Monday, January 06, 2003 7 Rev 1A Sheet 2 8 of 49 PDF "pdfFactory Pro" www.fineprint.com.cn 1 2 3 4 5 6 7 8 INDEX Pg# 1 2 A Power & Ground DNI LIST Label DC_IN+ PBATT+ PWR_SRC RTC_PWR3_3V +12V VHCORE V1_2RUN Description Schematic Block Diagram 1 Schematic Block Diagram 2 FRONTPAGE Banias Odem MCH-M ICH4 DDR SO-DIMM(200P) CLOCK GENERATOR M7/M9 Graphics LCD CONN,CY25245 & CRT CONN IDE (HDD&CD_ROM) PAD& SCREW O2_OZ711E1&CONN Pg# Description AC ADAPTER (20V) MAIN BATTERY + (10~17V) Control Signal A 3 4-5 6-8 9-11 12-13 14 15-17 18-19 20 B MAIN POWER (10~20V) RTC & PCL POWER (3_3V) +12V DRUNPWROK CPU CORE POWER (1.25/1.15V) RUNPWROK AGTL+ POWER (1.2V) RUNPWROK +3VRUN +3VSUS +5VALW +5VRUN +5VSUS +5VHDD +5VMOD STRB#/5V +5VFAN1, +5VFAN2 VDDA 1_8VSUS 1_8VRUN +3VALW V1_5RUN SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER 8051 POWER (5V) SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER HDD POWER (5V) MODULE POWER (5V) EXTERNAL FDD POWER (5V) FAN POWER (5V) AUDIO ANALOG POWER (5V) RESUME WELL IN ICH SLP_S3# CTRLD POWER 8051 POWER (3V) AGP I/O POWER RUN_ON SUS_ON RUN_ON B 21 22 23-24 25-26 27-28 29 30-31 32 33-34 35-36 C SUS_ON HDDC_EN# MODC_EN# FDD/LPT# FAN_OFF/ON# RUN_ON MINI-P

File name EFL50-LS2766P-VGA-DDR2-R10-20051222.pdf

5 4 3 2 1 D D C Mini (EFL50) ATI VGA/B M52-P Revision 1.0 C B B A A Security Classification Issued Date 2005/12/22 Compal Secret Data Deciphered Date 2006/12/22 Title Size Date: Compal Electronics, Inc. Cover Sheet Document Number THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 EFL50 LS-2766P 12/23/05 14:40:19 Rev 1.0 Sheet 1 1 of 13 5 4 3 2 1 M54P/M52P BLOCK DIAGRAM GDDR1 D DDRA K4D553235F-GC2A 8M*32 MDA[0:63] DQ[0:31] A[0:11] NMAA[0:13] DQA[0:63] MAA[0:13] M54P/M52P PCIE_TX[0:15]P, PCIE_TX[0:15]N PCIE_RX[0:15]P, PCIE_RX[0:15]N PCIE_REFCLKP, PCIE_REFCLKN PWRGD PCIE Connector PCIE_MTX_C_GRX_P[0:15], PCIE_MTX_C_GRX_N[0:15] PCIE_GT_MRX_P[0:15], PCIE_GTX_MRX_N[0:15] CLK_PCIE_VGA CLK_PCIE_VGA# PLTRST_VGA# D Samsung CLK/CLK# PAGE 8 NMCLKA0/A0# NMCLKA1/A1# CLKA[0:1] CLKA[0:1]# DVI TV_OUT VGA_OUT DVI_TXD[0:2](+,-); DVI_TXC+(-) VGA_TV_LUMA,VGA_TV_CRMA VGA_CRT_R, VGA_CRT_G, VGA_CRT_B, DACA_HSYNC, DACA_VSYNC VGA_DDC_CLK, VGA_DDC_DAT DDRB C 8M*32 MDB[0:63] DQ[0:31] A[0:11] NMAB[0:13] MDB[0:63] NMAB[0:13] DDC1_I2C C K4D553235F-GC2A LVDS Bus DVPDATA[18:19] CLK/CLK# PAGE 9 NMCLKB0/B0# NMCLKB1/B1# CLKB[0:1] CLKB[0:1]# DIGON Samsung I2CC_SCL I2CC_SDA VGA_ENVDD 27MHz SPREAD CLOCK ASM3P1819N-SR PAGE 4 B BLON VGA_ENBKL OSC_IN OSC_SPREAD PCIE_VDDR PCIE_PVDD +1.2VS +1.2VS APW7057KC-TR PAGE 11 +1.5VS +5VS +1.5VS +5VS B+ +3VS +1.8VS +2.5VS B ACES 88069-1600A PAGE 3 THERMAL SENSOR MAX6649MUA PAGE 4 D+/DTHERM_SDA, THERM_SCL THER_ALERT GPIO_AUXWIN VDDR3 VDDR4 VDDR5 VDDR1 VDD25, LVDDR, TXVDDR, AVDD, A2VDD PAGE 4,5,6,7 +3.3VS VDDC GPIO5 +VDD_CORE POWER_SEL +VDD_CORE SL6225BCA-T PAGE 11 B+ +1.8VS +2.5VS A A Security Classification Issued Date 2005/12/22 Compal Secret Data Deciphered Date 2006/12/22 Title Size Date: Compal Electronics, Inc. Block Diagram Document Number THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 EFL50 LS-2766P 12/23/05 14:40:19 Rev 1.0 Sheet 1 2 of 13 5 4 3 2 1 PCIE_GTX_MRX_P[0:15] PCIE_GTX_MRX_N[0:15] PCIE_MTX_C_GRX_P[0:15] PCIE_MTX_C_GRX_N[0:15] PCIE_GTX_MRX_P[0:15] <4> PCIE_GTX_MRX_N[0:15] <4> PCIE_MTX_C_GRX_P[0:15] <4> PCIE_MTX_C_GRX_N[0:15] <4> 161 D JP1 <4> VGA_CRT_R <4> VG

File name EFL50-LS2766P-VGA-DDR2-R10-20051222A.pdf

5 4 3 2 1 D D C Mini (EFL50) ATI VGA/B M52-P Revision 1.0 C B B A A Security Classification Issued Date 2005/12/22 Compal Secret Data Deciphered Date 2006/12/22 Title Size Date: Compal Electronics, Inc. Cover Sheet Document Number THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 EFL50 LS-2766P 12/23/05 14:40:19 Rev 1.0 Sheet 1 1 of 13 5 4 3 2 1 M54P/M52P BLOCK DIAGRAM GDDR1 D DDRA K4D553235F-GC2A 8M*32 MDA[0:63] DQ[0:31] A[0:11] NMAA[0:13] DQA[0:63] MAA[0:13] M54P/M52P PCIE_TX[0:15]P, PCIE_TX[0:15]N PCIE_RX[0:15]P, PCIE_RX[0:15]N PCIE_REFCLKP, PCIE_REFCLKN PWRGD PCIE Connector PCIE_MTX_C_GRX_P[0:15], PCIE_MTX_C_GRX_N[0:15] PCIE_GT_MRX_P[0:15], PCIE_GTX_MRX_N[0:15] CLK_PCIE_VGA CLK_PCIE_VGA# PLTRST_VGA# D Samsung CLK/CLK# PAGE 8 NMCLKA0/A0# NMCLKA1/A1# CLKA[0:1] CLKA[0:1]# DVI TV_OUT VGA_OUT DVI_TXD[0:2](+,-); DVI_TXC+(-) VGA_TV_LUMA,VGA_TV_CRMA VGA_CRT_R, VGA_CRT_G, VGA_CRT_B, DACA_HSYNC, DACA_VSYNC VGA_DDC_CLK, VGA_DDC_DAT DDRB C 8M*32 MDB[0:63] DQ[0:31] A[0:11] NMAB[0:13] MDB[0:63] NMAB[0:13] DDC1_I2C C K4D553235F-GC2A LVDS Bus DVPDATA[18:19] CLK/CLK# PAGE 9 NMCLKB0/B0# NMCLKB1/B1# CLKB[0:1] CLKB[0:1]# DIGON Samsung I2CC_SCL I2CC_SDA VGA_ENVDD 27MHz SPREAD CLOCK ASM3P1819N-SR PAGE 4 B BLON VGA_ENBKL OSC_IN OSC_SPREAD PCIE_VDDR PCIE_PVDD +1.2VS +1.2VS APW7057KC-TR PAGE 11 +1.5VS +5VS +1.5VS +5VS B+ +3VS +1.8VS +2.5VS B ACES 88069-1600A PAGE 3 THERMAL SENSOR MAX6649MUA PAGE 4 D+/DTHERM_SDA, THERM_SCL THER_ALERT GPIO_AUXWIN VDDR3 VDDR4 VDDR5 VDDR1 VDD25, LVDDR, TXVDDR, AVDD, A2VDD PAGE 4,5,6,7 +3.3VS VDDC GPIO5 +VDD_CORE POWER_SEL +VDD_CORE SL6225BCA-T PAGE 11 B+ +1.8VS +2.5VS A A Security Classification Issued Date 2005/12/22 Compal Secret Data Deciphered Date 2006/12/22 Title Size Date: Compal Electronics, Inc. Block Diagram Document Number THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 EFL50 LS-2766P 12/23/05 14:40:19 Rev 1.0 Sheet 1 2 of 13 5 4 3 2 1 PCIE_GTX_MRX_P[0:15] PCIE_GTX_MRX_N[0:15] PCIE_MTX_C_GRX_P[0:15] PCIE_MTX_C_GRX_N[0:15] PCIE_GTX_MRX_P[0:15] <4> PCIE_GTX_MRX_N[0:15] <4> PCIE_MTX_C_GRX_P[0:15] <4> PCIE_MTX_C_GRX_N[0:15] <4> 161 D JP1 <4> VGA_CRT_R <4> VG

File name EFL50_0419_1.pdf

A B C D E Page Index =============== P01-Cover Page P02-Block Diagram P03-Notes List P04-Dothan(1/2) P05-Dothan(2/2) 1 1 P06-Alviso HOST(1/5) P07-Alviso DDR(2/5) P08-Alviso PCI-E(3/5) P09-Alviso POWER(4/5) P10-Alviso POWER(5/5) P11-DDRI-SODIMM0 Compal Confidential EFL50/ EFT51 Schematics Document 2 P12-DDRI-SODIMM1 P13-DDR Decoupling P14-Clock Generator P15-CRT Conn. P16-VGA / LCD Conn. P17-ICH6(1/4)_HUB,PCI,HOST P18-ICH6(2/4)_CPU,AC97,IDE,LPC P19-ICH6(3/4)_USB,PM,LAN,GPIO P20-ICH6(4/4)_POWER&GND 2 Intel Dothan/ Celeron M/ Alviso GM(PM) / DDR-2 / ICH6-M (Daughter Card: ATi M24P/ M26P) 2005 / 03 / 08 (B-Test EVT) Rev:0.2 3 P21-HDD/CDROM P22-DVI / TV_Out P24-PCMCIA SOCKET P25-TI 1394A TSB43AB21A P26-LAN BCM5788M P27-LAN Magnetic & RJ45/RJ11 P28-Mimi-PCI Slot P29-AC97 Codec_ALC250D P30-Audio Line in Switch P31-AMP & Audio Jack P32-Super IO SMC217 P33-ENE-KB910 P34-MDC / BT / KBD / TP Conn. P35-BIOS & I/O Port & SATA HDD P36-RJ11/LID Switch / Fan / FIR P37-USB2.0 Conn P38-Docking Conn. P39-PWR_OK / RTC P40-DC INTERFACE P41-Screws P42-PWR-DCIN / Precharge P43-PWR-Charger P44-PWR-Battery Select P45-PWR-3V/5V/12V P46-PWR-GMCH_CORE/1.8V/0.9V P47-PWR-1.5V/2.5V P48-PWR-CPU_CORE 3 Conn P23-PCMCIA ENE CB1410 & CB714 4 P49-PWR-OTP P50-PWR-PIR Security Classification Issued Date 2005/03/08 4 Compal Secret Data Deciphered Date 2006/03/08 Title Cover Sheet Size Document Number Custom EFL50 LA-2761 Date: Wednesday, April 20, 2005 Sheet E THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Rev 0.2 1 of 51 A B C D E Compal confidential Project Code: EFL50/ EFT51 File Name : LA-2761 CRT & TV-OUT 1 Intel Dothan/ Celeron M CPU page 4,5 Thermal Sensor ADM1032ARM page 4 Clock Generator ICS954226AGT page 14 1 page 15 H_A#(3..31) 400 / 533 Mhz FSB H_D#(0..63) Daughter Card Slot PCI-Express x16 ATi M24P/ M26P VGA Board page 16 PCI-E BUS page 15 Intel Alviso GM(PM) PCBGA 1257 page 6,7,8,9,10 DDR-2 Two Channel DDR-2 DDRII-SO-DIMM X2 BANK 0, 1, 2, 3page 11,12,13 DMI LCD CONN page 16 2 USB 2.0 USB conn x 3 BT Conn page 37 2 Intel ICH6-M PCI BUS BroadCOM BCM4401KFB BCM5788M page 26 USB 2.0 page 34 mBGA-609 AC-LINK page 17,18,19,20 Audio CKT ALC250-D page 29 AMP & Audio Jack page 31 Jack x2 page 36 Mini PCI Socket page 28 ENE Controller CB712 page 23,24 1394 Controller TSB43AB21 page 25 MDC Conn. RJ11 CONN page 36 page 36 SATA 3 SATA HDD Conn. page 21 RJ45 CONN page 27 Slot 0 page 24 3in1 CardReader page 24 Slot 1 394 Conn. LPC BUS PATA page 25 HDD Conn. CDROM Conn. page 21 Power On/Off CKT. page 39 SMsC LPC47N217 RTC

File name hpc-360-302-sg6105.pdf

File name HPC-360-302_SG6105.pdf

File name HPC-420-302_SG6105.pdf

File name i405.pdf

I405 12 #$% #$& #$ #$' #$( #$ #$) #$ #$ #$ #$% #$& #$ #$' #$( #$ #$) #$ #$ #$ #$% #$& #$ #$' #$( #$ #$) #$% #$% # # # #% #& # #' #( # #) # # # #% #& # #' #( # #) # # # #% #& # #' #( # #) #% #% #% #%% #%& #% #%' #%( #% #%) #& #& #& #&% #&& #& #&' #&( #& #&) # # # #% #& # #' #( # #) #' #' #' #'% NET CHANGE HOST_ADDRESS MCH <--> CPU 2"~10"+/-200mil REF. TO GND         HOST_DATA MCH <--> CPU 2"~10"+/-100mil REF. TO GND :% / =1'     ! ! ! ! ! ! # 4&($ +     ! ! ! "# "# "# "# " " " " " $# $# $# $# $# " " " " % % # # # # # # # # " " "# # # # ""# ""# # # # # # %# # # "# "# "# # " # % " %%# "# "# # # %% # " " & & " " " "! " " " " " #,-./ #,-./ #,-./ #,-./% #,-./& HOST --> GTerm FSB DATA ) &1 ' &1 &1 %& &1 &% &1 ) &1 + '& /&( ( + )% + & &( + #*+ #*+ #*+ #*+% :+  :+  :+  :+%  :+&  Assignment to DATA CPU <--> MCH D[0..15]# D[16..31]# D[32..47]# D[48..63]# :1 12 :1 :1 12% & + &( + ' + ( + North Decoupling &% & '' ( HOST --> VRM HOST <--> ITP CPU <--> MCH 012 % 012/ % #,/ #,/ #,/ HOST <-- CLOCK ! ! CPU <--> MCH HOST_ADDRESS_PARITY ->NC -- NOT SUPPORT HOST --> HTrem " " " " " " " # # # ! " ! " " !! "" $ % #,$*/ #,$*/ #,*1/ #,*1/ #,*1/ #,*1/% #,*/ #,*/ #,*/ #,*/% + ( 3+ ( 4-/ ( 150/ ( #,++/ ( #,*6/ #,6/ #,6/ #,$/ #,50/ #,*-./ #,*/ #,#+/ #,#+3/ #,*1+/ #,-4-/ CPU <--> MCH HOST ADDRESS Storbe REQ[0..4],A[16..3]# A[35..17]# D[0..15]# D[16..31]# D[32..47]# D[48..63]# D[0..15]# D[16..31]# D[32..47]# D[48..63]# CPU <--> MCH HOST_DATA_Strobe Wide->7mil,space->10mil,Max Length->12000mil Trace Length -- See Figure 1 Wide->7mil,space->10mil,Max Length->12000mil 4* ! ! ! ! ! ! " " "% 4&(* ! ! ! ! ! ! FSB ADDR&CNTL &1 % &1 %) &1 ( &1 ! ! ! ! ! ! !                                                                                                :1 # 4<';%: + 4

File name ibm-R40.pdf

1 HD#(0:63) 0 2 1 1 HA#(3:31) TP4698 TP4699 TP4700 TP4701 TP4702 TP4703 TP4658 TP4659 TP4660 TP4661 TP4662 TP4663 TP4681 TP4682 TP4683 TP4684 TP4685 TP4686 TP4687 TP4688 TP4689 TP4690 TP4691 TP4692 TP4693 TP4694 TP4695 TP4696 TP4697 0 1 2 3 4 3 4 5 6 A B C TP4707 TP4708 TP4709 TP4710 TP4711 TP4712 TP4704 TP4705 TP4706 TP4716 TP4717 TP4718 TP4719 TP4720 TP4721 TP4713 TP4714 TP4715 TP4725 TP4726 TP4727 TP4728 TP4729 TP4730 TP4722 TP4723 TP4724 TP4734 TP4735 TP4736 TP4737 TP4738 TP4739 TP4731 TP4732 TP4733 TP4743 TP4744 TP4745 TP4746 TP4747 TP4748 TP4740 TP4741 TP4742 TP4752 TP4753 TP4754 TP4755 TP4756 TP4757 TP4749 TP4750 TP4751 TP4761 TP4762 TP4763 TP4764 TP4765 TP4766 TP4759 TP4760 TP4758 TP4767 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 1, 4 HA#(3:31) 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 A K2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 V3 W2 Y1 AB1 DBI#(0:3) E21 DBI0# G25 DBI1# P26 DBI2# V21 DBI3# E22 F21 K22 J23 R22 P23 W22 W23 0 1 2 3 1 0 1 2 3 4 J1 K5 J4 J3 H3 H_ADSTB0# H_ADSTB1# H_ADS# REQ0# REQ1# REQ2# REQ3# REQ4# A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# H_REQ#(0:4) 1 ADDRESS LINES 1 1, 4 1 L5 ADSTB0# R5 ADSTB1# G1 AC1 V5 AA3 G2 D2 L25 K26 K25 J26 E2 H2 H5 ADS# AP0# AP1# BINIT# BNR# BPRI# DP3# DP2# DP1# DP0# DEFER# DRDY# DBSY# CONTROL U9 DSTBN0# DSTBP0# DSTBN1# DSTBP1# DSTBN2# DSTBP2# DSTBN3# DSTBP3# H_DSTBN0# H_DSTBP0# H_DSTBN1# H_DSTBP1# H_DSTBN2# H_DSTBP2# H_DSTBN3# H_DSTBP3# HD#(0:63) 1, 4 4 H_BNR# H_BPRI# 1, 4 1 1, 4 1 1, 4 1, 4 1 1, 4 1, 4 1,4 H_REQ#(0:4) 1,4 DBI#(0:3) 0 1 2 3 TP4680 TP4664 TP4665 TP4666 TP4667 TP4676 TP4677 TP4678 TP4679 TP4452 TP4453 TP4454 TP4456 TP4457 TP4458 TP4455 TP4459 TP4460 TP4461 TP4462 TP4463 TP4464 TP4465 TP4466 TP4467 TP4656 TP4657 TP4668 TP4669 TP4670 TP4671 TP4672 TP4673 TP4674 TP4675 CPU_COREVCC 4 1 1 R582 R634 1% H_DEFER# H_DRDY# H_DBSY# NORTHWOOD 49.9 TP4469 TP6228 1, 4 H_BREQ0# 220 R631 CPU_COREVCC R617 1% 56 2 1, 4 U6 TESTHI8 W4 TESTHI9 Y3 TESTHI10 H6 BR0# AC3 W5 G4 V6 AB25 F4 G5 F1 AB2 J6 IERR# INIT# LOCK# MCERR# RESET# RS2# RS1# RS0# RSP# TRDY# PART1/3 D 1, 4 1 1, 4 1 4 4 1, 4 1, 4 2 1 4 4 4 4 1, 4 1, 4 1 4 1 1, 4 1 1, 4 1 1 1, 4 1 H_ADSTB0# H_ADSTB1# H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# CPU_INIT# H_LOCK# H_RS2# H_RS1# H_RS0# H_TRDY# H_HIT# H_ITM# H_BREQ0# CPURESET# H_DSTBN0# H_DSTBP0# H_DSTBN1# H_DSTBP1# H_DSTBN2# H_DSTBP2# H_DSTBN3# H_DSTBP3# IERR# CPU_INIT# H_LOCK# 4 CPURESET# 51.1 4 4 4 4 1 1 H_RS2# H_RS1# H_RS0# H_TRDY# H_HIT# H_ITM# AA24 AA22 AA25 Y21 Y24 Y23 W25 Y26 W26 V24 V22 U21 V25 U23 U24 U26 T23 T22 T25 T26 R24 R25 P24 R21 N25 N26 M26 N23 M24 P21 N22 M23 D63# D62# D61# D60# D59# D58# D57# D56

File name iw-p300a2-sg6105.pdf

File name j601cfr2.pdf

1 2 3 4 A VIA Apollo ProMedia Board Schematics TITLE COVER SHEET SOCKET 370 PROCESSOR NORTH BRIDGE VT8601/A SOUTH BRIDGE VT82C686A/B CLOCK SYNTHESIZER 601CF REV:2.0 1 2 3,4 5,6 7 A SHEET No. B B AGTL+ BUS AND PULL UP RESISTORS SDRAM DIMM SLOTS 1/2 PCI SLOT1 & PCI SLOT2 PCI SLOT3 & USB 2/3 ISA SLOT & SYSTEM ROM & AMR SLOT IDE CONNECTORS & WAKE UP CIRCUITRY FRONT PANEL & BACK PANEL CONNECTOR (USB 0/1) C 8 9 10 11 12 13 14 C FAN CONTROL CIRCUITRY & VGA CONNECTOR AC'97 AUDIO CODEC & AUDIO PORTS DC-DC CONVERTERS ATX POWER CONNECTORS & BYPASS CAPACITORS 15 16 17 18 D D VIA TECHNOLOGIES ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS. THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE. COPYRIGHT 2000 VIA TECHNOLOGIES INCORPORATED. 1 2 3 JETWAY INFORMATION Title COVER SHEET Size Document Number Custom Date: Monday, March 25, 2002 4 J601CF REV:2.0 Sheet 1 of 18 Rev 0.1 1 2 3 4 HD[0..63] HA[3..31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 -ADS -DRDY -DBSY -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -BREQ0 -BPRI -BNR -HLOCK -HIT -HITM -DEFER -RS0 -RS1 -RS2 -CPURST C155 Thomas 33p (Cyrix III) R100 330 -FERR_ -IGNNE -A20M PICD0 PICD1 APICCLK INTR NMI -SMI_ -STPCLK -SLP -FLUSH -CPUINIT AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AN31 AN27 AL27 AN25 AK18 AH16 AH18 AL19 AL17 AN29 AN17 AH14 AK20 AL25 AL23 AN19 AH26 AH22 AK28 C35 E35 G33 E37 X4 AH4 J37 A35 AC35 AG37 AE33 J35 L35 J33 M36 L37 AJ35 AG35 AH30 AE37 AG33 AE35 E33 F18 K4 R6 V6 AD6 AK12 AK22 AD36 Z36 AB36 AH20 AK16 AL13 AL21 W35 AM2 AB2 R500 NC-0 T h omas modified Thomas Hsu Date: 1 2 3 HD[0..63] 3,8 3,8 HA[3..31] U4 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS DRDY DBSY TRDY REQ[0] REQ[1] REQ[2] REQ[3] REQ[4] BR0 BPRI BNR LOCK HIT HITM DEFER RS[0] RS[1] RS[2] BPM[0] BPM[1] BP[2] BP[3] RESET NC/RESET* PREQ PRDY FERR IGNNE A20M PICD[0] PICD[1] PICCLK INTR/LINT[0] NMI/LINT[1] SMI STPCLK SLP FLUSH INIT IERR VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 VCC_1.5V VCC_2.5V VCC_CMOS NC/VTT* NC/VTT* NC/VTT* NC/VTT* NC/PU** GND/NC* VCC2*/EXTRIO** SOCKET 370 VCC2 NMI C223 NC-1u Size C GTL D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 BCLK **BSEL1 BSEL0 PWRGOOD BSEL1 THERMDP THERMDN CPUPRES EDGCTRL THERMTRIP VID[0] VID[1] VID[2] VID[3] **VID[4] TCK TDI TDO TMS TRST PLL1 PLL2 RSRVD48 RSRVD49 RSRVD51 *NC/VTT *NC/VTT *NC/VTT *NC/VTT *GND/CLKREF W1 T4 N1 M6 U1 S3 T6 J1 S1 P6 Q3 M4 Q1 L1 N3 U3 H4 R4 P4 H6 L3 G1 F8 G3 K6 E3 E1 F12 A5 A3 J3 C5 F6 C1 C7 B2 C9 A9 D8 D10 C15 D14 D12 A7 A11 C11 A21 A15 A17 C13 C25 A13 D16 A23 C21 C19

File name j618tas.pdf

J618TAS 55) 1)7889 1) 1) 1)$ 1) 1)2 1)3 1) 1) 1) 1)4 1) 1) 1)$ 1) 1)2 1)3 1) 1) 1) 1)4 1)$ 1)$ 1)$$ 1)$ 1)$2 1)$3 1)$ 1)$ 1)$ 1)$4 1) 1) 1)$ 1) 1)2 1)3 1) 1) 1) 1)4 1)2 1)2 1)2$ 1)2 1)22 1)23 1)2 1)2 1)2 1)24 1)3 1)3 1)3$ 1)3 1)32 1)33 1)3 1)3 1)3 1)34 1) 1) 1)$ 1) 2 : 6 2 6 = : 12 2 2 1 = ; ; $ 3 3 $ 4 4 ) ) 3 )2 )$ $ 3 $3 ) $ $ 4 $ 4 $ $3 $ $3 1)? 1)? 1)?$ 1)? 1)?2 1)?3 1)? 1)? 1)? 1)?4 1)? 1)? 1)?$ 1)? 1)?2 1)?3 1)? 1)? 1)? 1)?4 1)?$ 1)?$ 1)?$$ 1)?$ 1)?$2 1)?$3 1)?$ 1)?$ 1)?$ 1)?$4 1)? 1)? 1)?$ 1)? 1)?2 1)?3 1)? 1)? 1)? 1)?4 1)?2 1)?2 1)?2$ 1)?2 1)?22 1)?23 1)?2 1)?2 1)?2 1)?24 1)?3 1)?3 1)?3$ 1)?3 1)?32 1)?33 1)?3 1)?3 1)?3 1)?34 1)? 1)? 1)?$ 1)? $ $ $ $ $ $ $ 2 3 2 3 3 3 3 3 3 $ 3 ) 4 4 $ 2 $ $ )$ $$ $2 $3 )$2 $ $ $4 )$ 2 $ 1$ >$ 5$ $ : 17889 1? 1?2 1?3 1? 1? 1? 1?4 1? 1? 1?$ 1? 1?2 1?3 1? 1? 1? 1?4 1?$ 1?$ 1?$$ 1?$ 1?$2 1?$3 1?$ 1?$ 1?$ 1?$4 1? 1? 5) 5) 5)$ 5) ? ? ?$ 6? 6? 6?$ 6? 6?2 5 ? ) ? ) ? ) $? @ @ ? ? 3? 5 ? @= ? 5 5 5 ? 1$ 1 4 =3 1 =4 1 3 = 2 =3 > ; 2 >2 )2 =3 = 1$ 1$$ $ 1 1 =4 = 1$ 12 $4 3 2 $2 = = =$ 1 12 13 1 1 1 14 1 1 1$ 1 12 13 1 1 1 14 1$ 1$ 1$$ 1$ 1$2 1$3 1$ 1$ 1$ 1$4 1 1 5) 5) 5)$ 5) $ 16 16 16$ 16 162 5 5 5$ 5 52 53 5 5 5 54 5 5 5$ 5 52 53 5 5 5 54 5$ 5$ 5$$ 5$ 5$2 5$3 5$ 5$ 5$ 5$4 5 5 5$ 5 52 53 5 5 5 54 52 52 52$ 52 522 523 52 52 52 524 53 53 53$ 5)7889 $ $ $ @ 2 ;)$ 1$ ;) )$ ;)2 >$ ;)3 5$ ;) $ ;) ) ;) 1$ ;)4 )$ ;) = ;) 2 ;)$ ;3 ;) 3 ;)2 3 ;)3 :3 ;) 63 ;) =3 ;) ;3 ;)4 )2 ;)$ 2 ;)$ ;)$$ ;)$ ;)$2 ;)$3 ;)$ ;)$ ;)$ $ ;)$4 2 ;) 3 ;) 3 ;)$ ;) ;)2 4 ;)3 4 ;) $ ;) $ ;) $$ ;)4 $ ;)2 )$$ ;)2 $2 ;)2$ $2 ;)2 $ ;)22 $ ;)23 )$ ;)2 $ ;)2 $ ;)2 ;)24 ) ;)3 |LINK |2.SCH |3.SCH |4.SCH |5.SCH |6.SCH |7.SCH |8.SCH |9.SCH |10.SCH |11.SCH |12.SCH |13.SCH |14.SCH |15.SCH |16.SCH |17.SCH |18.SCH |19.SCH |20.SCH |21.SCH |22.SCH |23.SCH |24.SCH |25.SCH |26.SCH |27.SCH |28.SCH |29.SCH |30.SCH |31.SCH |32.SCH |33.SCH 7$889 1672889 44 5 : $ 4 $$ 2 < 4  :5 ;) $ AK4: TUALATIN AK4 VTTPWRGD COPPERMINE AK4 GND  %&' %(    )*"+,&+,-! !"#$ $$ . #& )&/ *0 AK22: TUALATIN AK22 CMOSREF COPPERMINE AK22 GTLREF $$ ;= 5 5 55) 5 $ $ $832,,D1) = 2 5 5 2 3 3 3 $ 2 2 := 2 $ : $ ) > $ 1$ 2 2 D2 2 2 2 2 2 1 $$ 5 1 ) )$ )$ 1$2 2 $ 3 2 5 ) $ $$ : JS3 :1-2:133 MHz 2-3:100 MHz B 3 ? ? )? )? =? ))? 1? 1? )? )? =:1? =? ? 1) 1) 1 ? $? =? = ? ? =@ =@ ? ? ;? ? == ==$ @ @ @ ? 2? 5)23 $? 5)2 5) == = 5)3 5)3$ 12 $3 4 $ $ =$ =$3 =$ $4 = =$4 1$ ;3 1 3 = ; 3 ; 3 : :3 : 52 3 D $ $ $ 3 D$ = A A $ $2 $ $2 1 ? $ $ = 2 $ := $ 2 $ $ 2 $ 2 2 $ ; 2 $ 1) ) 1= )) 1 1 ) 1) =:1 2 5@ 553 5$53 5 5 5$ 5 52 53 5 5 5 5 3 $ 2 ) ) 3 = $ 3 ; 3 3 3 $ $ $4 $ $4 ;3 ; = 3 6 63 6 3 =3 ) ) ? 6? )? $? ? ? ? 5 @ ? ? ) 3? ) ? ) ? @ ) ? )

File name j630tcf.pdf

J630TCF 0 support Tualatin ULTRA ATA 100 68 6 '5 0 0 / 6 8 0 :8 @ 0 '11 1 0 0 8 A 3 6 6 6 3 6 3 13 4 6 6 6 16 / 6 3 1 6 3 / '15  5 4 5 1'45 5 5 '15 ' 5 '1/5  1/    5 75 4/ 4 4 4' 4'5 6 :/ 5 5 5 5 '15 ' 5 '1/5  1/ : 8 / ' : 06 0 6 88 / 3 6 8 6 8 48 4 4 3 6 9 6 9 / /8 8 : 8 : 8 : 8 8 : 3 6 9 8 8 8 4 4 6 / / /8 6  8 '6 8 0 0 6 28 6 A 6 > 3 6 8 6 4 48 6 9 3 3 / /8 1 1 8 : 8 8 : 8 : : 8 8 6 9 3 8 : 6 4 48 / 16 8   76 8 6 0 08 2 2 3 6 A A8 0 06 6 3 '4 '5 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 '0 6 @: 0>60 0>60 0>' 5;< 5;< 5;< 5;< '15 5 5 1'45 5 5 5 1 ;<= 1 ;<= '15 ' 5 '1/5  1/ 2 2 : 2 2 1 19 4: 4 4 4 5 1/ 1/5 5 5 '5  5 75 '5;< '5;< '5;< '5 4 5 4 5 5 '5 5 75;8< 75;< 75;< 75;< 75;< 5;< 5;< 5;9< 5;:< 5;3< 5;< 5;6< 5;8< 5;< 5;< 5;< 5;< 5;9< 5;:< 5;3< 5;< 5;6< 5;8< 5;< 5;< 5;< 5;< 5;9< 5;:< 5;3< 5;< 5;6< 5;8< 5;< 31/ 3 31/ 41/5 / 41/5 5 9 5 45 6 45 '5 28 '5  5 6: 3  5 75 / 9 75 '5 /: '5 '5 4 '5 '5 4 '5 '5 4 5 4 5 5 '5 5 '5 4 5 4 5 5 '5 5 4758 475 475 475 475 45 45 459 45: 453 45 456 458 45 45 45 45 459 45: 453 45 456 458 45 45 45 45 459 45: 453 45 456 458 45 1 16 3 13 48 13 19 4: 4 /: 8 A8 / 8 A 3 16 /8 13 6 / 4 19 4 16 9 4: 4 /: PPGA 370 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 VCC_CORE 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05  ;<  ;<  5 75 / ' '5  5 0>' 0 ;< 0 ;< 0 ;< 0 ;< 03 0 06 08 0 0 0 0 1 11 11 3 13 16 / / 0 /8 : 0 0 0 0 0 0 0 0 / 6 36>? 6 6>? 8 0 0 0 78 3 11 11 + 1 68 / 1 4@'@ 8 @'@ 0 0 86 / 6 3 6 3 9 3 9 6 3 6 3 8 6 : 9 9 3 6 6 / : 1 4 8 8 48 1 7 8 7  ' ' 8 > 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 0> 66 6 3/ / 7 98 63 3/ 06 : 1 1 4 48 9 6 3 8 / /8 / 1 1 1 6 9 9 6 3 1 6 3 7 76 73 ' '3 6 3 08 2 3 '6 2 7 3 MENDOCINO PPGA 15 0 6 15 0 6 0 69 / 0 6 / |LINK |2.SCH |3.SCH |4.SCH |5.SCH |6.SCH |7.SCH |8.SCH |9.SCH |10.SCH |11.SCH |12.SCH |13.SCH |14.SCH |15.SCH |16.SCH |17.SCH |18.SCH |19.SCH |20.SCH |21.SCH |22.SCH |23.SCH |24.SCH |25.SCH |26.SCH 5 5 5 5 569 56: 563 56 566 568 56 56 56 56 589 58: 583 58 586 588 58 58 58 58 59 5: 53 5 56 58 5 5 5 5 59 5: 53 5 56 58 5 5 5 5 59 5: 53 5 56 58 5 5 5 5 59 5: 53 5 56 58 5 5 5 5 06

File name j695as.pdf

8 7 6 5 4 3 2 1 D D J-695AS SOCKET 370 PROCESSOR NORTH BRIDGE (VT82C693A) SOUTH BRIDGE (VT82C686A) USB2,3 & FREQUENCY RATIO DIMM 1 & 2 ATX POWER CONNECT / VTT TERMINATOR / VCC3 C 2 3,4 5,6 7 8 9 10 11 12 13 14 15 16 17 18 19 B C PCI SLOT 1 & 2 PCI SLOT 3 & 4 AGP SLOT ISA SLOT IDE & FRONT PANNEL & BIOS & K.B CONNECTOR CLOCK SYNTHERSIZER FAN & BYPASS CAPACITOR DC-DC CONVERTER PRINTER / COM PORT AUDIO CODEC & AUDIO PORT & JOYSTICK PORT B AMR SLOT DIMM3 PCI SLOT5 20 21 22 A A J E T W A Y I N F ORMATION Title COVER SHEET Size B Date: 8 7 6 5 4 3 D o c u m e n t Number J-695AS M o n d a y , D e c e m b e r 1 1, 2000 2 Rev 0.1 Sheet 1 1 of 22 8 7 6 5 4 3 2 1 D[0..63] A[3..31] A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 -ADS -DRDY -DBSY -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -BREQ0 -BPRI -BNR -HLOCK -HIT -HITM -DEFER -RS0 -RS1 -RS2 -CPURST AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AN31 AN27 AL27 AN25 AK18 AH16 AH18 AL19 AL17 AN29 AN17 AH14 AK20 AL25 AL23 AN19 AH26 AH22 AK28 C35 E35 G33 E37 X4 AH4 J37 A35 -FERR -IGNNE -A20M AC35 AG37 AE33 J35 L35 J33 M36 L37 AJ35 AG35 AH30 AE37 AG33 AE35 E33 F18 K4 R6 V6 AD6 AK12 AK22 AD36 Z36 AB36 AH20 AK16 AL13 AL21 W35 AM2 AB2 U5 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS DRDY DBSY TRDY REQ[0] REQ[1] REQ[2] REQ[3] REQ[4] BR0 BPRI BNR LOCK HIT HITM DEFER RS[0] RS[1] RS[2] BPM[0] BPM[1] BP[2] BP[3] RESET NC/RESET* PREQ PRDY FERR IGNNE A20M PICD[0] PICD[1] PICCLK INTR/LINT[0] NMI/LINT[1] SMI STPCLK SLP FLUSH INIT IERR VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 VCC_1.5V VCC_2.5V VCC_CMOS NC/VTT* NC/VTT* NC/VTT* NC/VTT* NC/PU** GND/NC* EXTRIO** SOCKET 370 GTL D[0..63] 3,9 3,9 A[3..31] SOCKET 370 GND A37 AB32 AC5 AC33 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ3 AJ7 AJ11 AJ15 AJ19 AJ23 AJ27 AK4 AL1 AL3 AM6 AM10 AM14 AM18 AM22 AM26 AM30 AM34 AN3 B4 B8 B12 B16 B20 B24 B28 B32 D2 D4 D18 D22 D26 D30 D34 E7 E11 E15 E19 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y5 Y37 Z2 Z34 VCCP AA5 AA37 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ5 AJ9 AJ13 AJ17 AJ21 AJ25 AJ29 AK2 AK34 AM4 AM8 AM12 AM16 AM20 AM24 AM28 AM32 B6 B10 B14 B18 B22 B26 B30 B34 C3 D6 D20 D24 D28 D32 D36 E5 E9 E13 E17 F2 F4 F14 F22 F26 F30 F34 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 X34 Y35 Z32 VCC_1.5V AD36 VCC_2.5V Z36 VCC_CMOS AB36 D BSEL0 BSEL1 Short Short Open Short Short Open Jumper function Bus freq. auto detected by CPU. Test 66/100 MHz CPU run 100/133 MHz. Test 100 MHz CPU run 133 MHz. 3,9 C -ADS 3,9 -DRDY 3,9 -DBSY 3,9 -HTRDY -HREQ[0..4] 3,9 3,9 -BREQ0 3,9 -BPRI 3,9 -BNR 3,9 -HLOCK 3,9 -HIT 3,9 -HITM 3,9 -DEFER 3,9 -RS[0..2] 3,9 VCC_CMOS -CPURST R37 330 CMOS I/O GTL B 5 -FERR 7 -IGNNE 7 -A20M R35 R36 150 150 15 APICLK 7 INTR 7 NMI 5 -SMI -STPC

File name Mainboard_Biostar_Model-P4M8P-M7A.pdf

A B C D E 4 4 TITLE Cover Sheet Block Diagram General Spec Change List Processor North Bridge South Bridge Clock & Buffer DDR SDRAM AGP Slot PCI Slot IDE Connector ATX Power USB, Front Panel, FDD USB, PS2, COM, LPT AC97 CODEC VCC_CORE DC-DC Converter MIS DC-DC Converter LPC I/O, FDD, BIOS BLANK VGA Connector CNR Slot LAN RTL8201BL BOM SHEET 1 2 3 4 5,6 7,8,9,10 11,12,13 14 15~19 20 21,22,23 24 25 26 27 28 29 30 31 32 33 34 35 36 3 3 VER : 1.2 2 2 1 1 Title Size Document Number Custom Date: A B C D COVER SHEET P4M8P-M7A Sheet E Rev 1.2 of 36 Tuesday, April 18, 2006 1 A INTEL FSB 533/800MHZ CONTROL P4-775PIN PROCESSOR ADD DATA HOST BUS 64-Bit MEMORY 2 DDR DIMM CLOCK BUFFER ICS953001EF AGP 8X VGA CONN VIA P4M800 PRO PCI BUS AC' 97 CODEC A VIA VT8237R 8 USB CONN(V2.0) ADDR/DATA CNTL A USB USB USB USB KEYBOARD PCI CONN LAN RTL8201BL MOUSE LPC PCI CONN PCI CONN IDE IDE ITE BIOS RJ45 SATA SATA IT8705AF FLOPPY CONN. PRT CONN. SER. CONN. SER. CONN. Title Size Document Number Custom Date: A BLOCK DIAGRAM P4M8P-M7A Sheet 2 of 36 Rev 1.2 Tuesday, April 18, 2006 A B C D E 4 PCI Solt 1 2 3 4 5 6 IDE SEL INT# 19 A 20 B 21 C GNT# REQ# 0 0 1 1 2 2 CLOCK PCLK5 PCLK0 PCLK1 P4M80-M7 1. CPU --- INTEL P4 Socket 775(3-Phase Power) 4 2. CHIPSET --- VIA P4M800 CE PRO+ VT8237R 3. MEMORY --- 2 DDR SDRAM(Max. 2GB) 4. SLOTS --- AGP(8X)x1, PCIx3, CNRx1 5. CODEC --- Realtek ALC655 6-Channel Audio Chips LPC I/O LAN RAID S ATA WIRE LESS CARD READER IDE SEL INT# GNT# REQ# CLOCK PCLK3 6. LAN --- VT6103L 7. PCB Size --- 2438.4Mmx201.68mm, 4-Layer 3 3 S/B AT123S SPCLK 2 SLOT AMR CNR ACR H/W SOUND 22U/25DE GPIO PRI. SEC. 2 5*7 mm 6.3*11 mm 6.3*11 mm 8*11 mm G D D 100U/16DE 220U/10DE 470U/16DE O A D C KA I GO S G S A O I C SOT-23 LM431 R G SOT-23 2N7002 SI2303S SI2301S S B SOT-23 2N3904 2N3906 MMBT2907A 2N2222A E A SOT-23 BAT54C BAT54S K TO-92 LM431 78L05-D LM432 E BC ECB 1000U/10DE 8*14 mm 1500U/16DE 10*25 mm 3300U/25DE 10*25 mm TO-263 PHB55N03 90N02 TO-252 20N03 TM3055TL-S PHD55N03 SOT-223 AMS1117 TO-92 2N2222A 2N2097A TO-92 HSD882-D 1 1 Title Size Document Number Custom Date: A B C D GENERAL SPEC P4M8P-M7A Sheet E Rev 1.2 of 36 Tuesday, April 18, 2006 3 A B C D E 1 OF 7 7 HA[3:33] CPU1A HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -HA_STB0 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA32 HA33 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 AD5 ADS# A03# BNR# A04# HIT# A05# RSP# A06# BPRI# A07# DBSY# A08# DRDY# A09# HITM# A10# IERR# A11# INIT# A12# LOCK# A13# TRDY# A14# BINIT# A15# DEFER# A16# EDRDY# RSVD1 MCERR# RSVD2 REQ0# AP0# REQ1# AP1# REQ2# REQ3# BR0# REQ4# ADSTB0# TESTHI08 PCREQ# TESTHI09 TESTHI10 A17# DP0# A18# DP1# A19# DP2# A20# DP3# A21# A22# A23# MCH_GTLREF GTLREF0 A24# GTLR

File name Mainboard_ESC_Model-865G-M8.pdf

1 2 3 4 5 6 7 8 865G-M8 A Rev :1.0 Page Title of Schematic : Title Page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Title Size Custom Date: Document Number A Schematics Version History Table : Circuit Ver. PCB Ver. Total Page A 1.0 A 1.0 32 32 Title Page Modificatory Page uATX 244mmx220mm Date 01/17/ ' 06 02/17/ ' 06 B C D Cover Sheet System Block Diagram P4 775P Part A P4 775P Part B P4 775P Part C P4 775P Part C P4 775P Part C Clock Generator I865(MCH)Part A I865(MCH)Part B DDR Serial Resistors DDIMM 1&2 ( DDR SDRAMs ) DDR SSTL-2 Terminations DDR Power AGP 8X Slot 1.5V ICH5 Part A ICH5 Part B ICH5 Part C IDE Connector USB/FWH LPC_FDD/KB/M I/O Ports H/W Monitor AC97 Codec Audio Interface ATX Power & Front Panel LAN/CNR 775P Vcore DC-DC MIS DC-DC PCI Slot 1&2 PCI Slot 3 CNR B C D Elitegroup Computer Systems Cover Sheet 865G-M8 Sheet 1 8 Rev 1.0 of 32 Tuesday, February 21, 2006 7 1 2 3 4 5 6 A B C D E PCB : 244 x 220 mm ; 4 layers DEVICE PCI1 4 IDSEL 16 17 18 25 INT# C/D/E/F D/E/F/G E/F/G/H F REQ# PREQ-1 PREQ-2 PREQ-3 PREQ-4 GNT# PGNT-1 PGNT-2 PGNT-3 PGNT-4 intel P4 Processor Clock Gen ICS952647 48pin SSOP re.2.0 Prescoot, Cedar Mill & Smithfield 4 PCI2 PCI3 LAN 775 pin BW : 4.1GB/s @ FSB : 533MHz & Freq : 133MHz BW : 6.4GB/s @ FSB : 800MHz & Freq : 200MHz BW : 2.1GB/s @ DDR :200/266/333MHz & Freq : 133MHz BW : 3.2GB/s @ DDR : 266/333/400MHz & Freq : 200MHz BW : 1.066GB/s @ Freq : 66MHz AGP1 Slot 132p 8X / 1.5V 3 intel iSP/G 932pin FC-BGA BW : 266MB/s @ Freq : 66MHz USB V2.0 DDIMM1: DDR Socket 184P DDIMM2 : DDR Socket 184P 3 VGA (G only) USB1 2 ports USB2 2 ports USB3 2 ports USB4 USBLAN 2 ports 8 ports Up to Ultra ATA/100 IDE2 40pin IDE1 40pin Two IDE Channel AC' 97 & Lan I/F BW : 133MB/s @Freq : 33MHz intel ICH5 460pin EBGA SATA1 7Pin SATA2 7pin Lan Chip RTL8100C 100pin PCI1 Slot 120pin @ AD16 PCI2 Slot 120pin @ AD17 PCI3 Slot 120pin @ AD18 2 2 Audio Codec ALC655 USBLAN RJ45 intel FWH 32pin PLCC LPC bus Mic In Line Out Line In 1 Super I/O W83627EHF 128pin PQFP 1 Elitegroup Computer Systems Title Size B Date: A B C D Document Number System Block Diagram 865G-M8 2 of Tuesday, February 21, 2006 Sheet E Rev 1.0 32 5 4 3 2 1 VTT_OUT_L VTT_OUT_R 9 MCH_GTLREF_CPU VSSSEN R318 VCCSEN R317 0 VCC_SENSE_AN5 0 COMP7 CPU1A LGA775 D VTT_OUT_L R315 VTT_OUT_R R316 BC260 .1U-O 62-O 62-O RSVD_G6 RSVD_AK6 MCH_GTLREF_CPU VSS_SENSE_AN6 01/16/2006 MC118 10uF-08-O CPUGTLREF1 COMP4 CPUVID0 CPUVID1 CPUVID2 CPUVID3 CPUVID4 CPUVID5 CPUVID0 CPUVID1 CPUVID2 CPUVID3 CPUVID4 CPUVID5 21,29 21,29 21,29 21,29 21,29 21,29 29 VSSSEN 29 VCCSEN COMP5 MSID1 MSID0 COMP6 For Cedar Mill & SMITHFIELD Processor TRACE WIDTH 10 MIL SPACE 7 MIL ;FOR CEDAR&SMITH; R680 60-0402 R681 60-0402 12/08/2005 A20 AC4 AE3 AE4 AE6 AH2 AM5 AN5 AN6 C9 D1 D14 D16 E23 E24 E5 E6 E7 F23 F29 F6 G10 B13 H2 J2 J3 N4 N5 P5 T2 V1 W1 Y3 D23 AK6 G6 AM2 AL5 AM3 AL6 AK4 AL4 MSID1 MSID0 A3 A4 A5

File name Mainboard_ESC_Model-945G-M3.pdf

1 2 3 4 5 6 7 8 ( P4 LGA775P Processor with DDR2 SDRAM Mainboard ) A 945G-M3 Rev: 1.0B Page Title of Schematic : Title Page Title Page A Schematics Version History Table : Cover Sheet 1 Circuit Ver. PCB Ver. Total Page Modified Page(s) Date System Block Diagram 2 A A 36 02/24/' 05 P4 LGA775P Part A 3 1.0 1.0 36 04/01/' 05 P4 LGA775P Part B 4 1.0a 1.0a 36 05/10/' 05 P4 LGA775P Part C 5 1.0B 1.0B 36 24 06/14/' 05 P4 LGA775P Part D 6 P4 LGA775P Part E 7 Clock Generator(CK410) 8 I-LP(MCH)Part A & E & F 9 B I-LP(MCH)Part D 10 B I-LP(MCH)Part B & C 11 I-LP(MCH)Part G 12 DDIMM 1&2 ( DDR SDRAMs ) 13 DDIMM 3&4 ( DDR SDRAMs ) 14 DDR & V_FSB_VTT Power 15 PCI EXPRESS 16-PORT 16 ICH7 Part A & D (SATA-CONNECTOR) 17 ICH7 Part B & C (RTC) 18 ICH7 Part E & F (POWER & GND)

File name Mainboard_ESC_Model-945P-A.pdf

1 2 3 4 5 6 7 8 ( P4 LGA775P Processor with DDR2 SDRAM Mainboard ) Rev:3.0 Page Title of Schematic : A 945P-A/ 945PL-A Schematics Version History Table : Title Cover Sheet Page 1 Title PCI-E 88E8052 GIGA LAN Page 36 A Circuit Ver. PCB Ver. Total Page Modified Page(s) Date System Block Diagram 2 PCI-E SERIAL ATA SiI3132_1 37 A A 38 01/20/'05 P4 LGA775P Part A 3 PCI-E SERIAL ATA SiI3132_2 38 P4 LGA775P Part B 4 PCI EXPRESS EX2 39 B B 39 03/24/'05

File name Mainboard_ESC_Model-945PL-A.pdf

1 2 3 4 5 6 7 8 ( P4 LGA775P Processor with DDR2 SDRAM Mainboard ) A Schematics Version History Table : Circuit Ver. PCB Ver. Total Page A 1.0 1.1 A 1.0 1.1 37 37 37 945PL-A Modified Page(s) Add R657 Rev: 1.1 Date 09/20/'05 10/13/05 02/22/06 Page Title of Schematic : Title Cover Sheet System Block Diagram P4 LGA775P Part A P4 LGA775P Part B P4 LGA775P Part C P4 LGA775P Part D P4 LGA775P Part E Clock Generator(ICS954127) I-LP(MCH)Part A & E & F I-LP(MCH)Part D I-LP(MCH)Part B & C I-LP(MCH)Part G DDIMM 1( DDR SDRAMs ) DDIMM 2 ( DDR SDRAMs ) DDR & V_FSB_VTT Power PCI EXPRESS 16-PORT ICH7 Part A & D (SATA-CONNECTOR) ICH7 Part B & C (RTC) ICH7 Part E & F (POWER & GND) IDE1 Connector USB/FWH LPC_FDD/KB/M I/O Ports H/W Monitor Azalia Codec Audio Interface ATX Power & Front Panel LAN Vcore DC-DC MIS DC-DC(DUAL & VDDQ) PCI Slot 1&2 Back I/O PCI Slot 3 VT6307 (1394) PCIE X1 5 6 Page Title Page A B C D 36 1 PCI EXPRESS EX3 37 2 CPU OVER CLOCKING 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Elitegroup Computer Systems 34 Title Cover Sheet 35 Size Document Number Rev 1.1 Custom 945PL-A Date: Wednesday, February 22, 2006 7 B C D Sheet 1 8 of 37 1 2 3 4 A B C D E DEVICE PCI1 PCI2 PCI3 1394 LAN 4 IDSEL 17 18 19 20 21 INT# C/D/E/F D/E/F/G E/F/G/H G F REQ# PREQ-0 PREQ-1 PREQ-2 PREQ-3 PREQ-4 GNT# PGNT-0 PGNT-1 PGNT-2 PGNT-3 PGNT-4 PCB : 305 x 244 mm ; 4 layers INTEL P4 Processor PSC, Smithfield LGA 775 pin 4 BW :4.1GB/s @ FSB : 533MHz & Freq : 133MHz BW : 6.4GB/s @ FSB : 800MHz & Freq : 200MHz BW : 10.7GB/s @ DDR2 :400/533MHz DDIMM1: DDR2 Socket 240P PCIEx16 INTEL i945PL DDIMM2: DDR2 Socket 240P 1210pin FC-BGA BW : 2GB/s (Support Lsoch) 3 USB V2.0 3 USB1 2 ports USB2 2 ports USB3 2 ports IDE1 40pin USB4 2 ports Up to Ultra ATA/100 One IDE Channel INTEL ICH7R 652pin EBGA BW : 133MB/s @Freq : 33MHz PCIEX2 PCIEX3 Line in Line out Mic in Audio Codec ALC655 AC97 intel FWH 2 LPC bus SATA1 7Pin SATA2 7pin SATA3 7Pin SATA4 7pin 32pin PLCC BW : 150MB/s Super I/O W83627THF 128pin PQFP VIA 1394 10/100 Lan PCI1 Slot 120pin @ AD17 PCI2 Slot 120pin @ AD18 PCI3 Slot 120pin @ AD19 2 USBLAN CONN/ HEADER RJ45 1 1 Elitegroup Computer Systems Title Size Custom Date: A B C D Document Number System Block Diagram 945PL-A Sheet E Rev 1.1 37 Wednesday, February 22, 2006 2 of 5 4 3 2 1 ICT_775_E23 1 ICT_775_E7 1 ICT_775_F23 1 ICT_775_F6 STP1 STP2 VTT_OUT_R STP3 VID_0 VID_1 VID_2 VID_3 VID_4 R523 51-1-O R1 R4 COMP6 R5 62-1 2.2K 62-1 60.4-1 FORCEPH_N VID0 VID1 VID2 VID3 VID4 VID5 R12 AM2 AL5 AM3 AL6 AK4 AL4 AM5 AM7 AN7 62-1 VID4 VID5 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 BPM0 BPM1 BPM2 BPM3 BPM4 BPM5 DP0 DP1 DP2 DP3 REQ0 REQ1 REQ2 REQ3 REQ4 SKTOCC TESTH0 TESTH1 TESTH2 TESTH3 TESTH4 TESTH5 TESTH6 TESTH7 TESTH8 TESTH9 TESTH10 TESTH11 TESTH12 BOOTSELECT L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5

File name Mainboard_ESC_Model-946GZT-AM.pdf

5 4 3 2 1 946GZT-AM D Rev: A Date 06/05/10 Page Title of Schematic : Title Cover Sheet System Block Diagram P4 LGA775P Part A P4 LGA775P Part B P4 LGA775P Part C P4 LGA775P Part D P4 LGA775P Part E Clock ICS(9LPR505) BW(MCH)Part A & E BW(MCH)Part B BW(MCH)Part C&D BW(MCH)Part F BW(MCH)Part G MCH DCPL DIMM1 (DDR2 SDRAM) DIMM2 (DDR2 SDRAM) DIMM DECOUPING VGA CONNECT ICH7 Part A & D ICH7 Part B & C ICH7 Part E & F BMC5786 SATA & IDE Connector FMH&SPI H/W Monitor ITE8718 LPC I/O Audio Codec Audio Interface ATX Power & Front Panel PCI Slot 1&2 PCIE Slot 1 PCI Express 16-PORT Back I/O TI TSB43AB23 Page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Title ISL Vcore DC-DC ISL DDR& SYSTEM DC-DC MIS DC-DC POWER I/O Ports RTL8100C Lan TPM (TRUSTED PF-MODELE) Change list RESET Diagram CLOCK DISTRIBUTION Power Delivery Page D Schematics Version History Table : Circuit Ver. PCB Ver. Total Page 44 A A Modified Page(s) 35 36 37 38 39 40 41 42 43 44 C C B B A A Elitegroup Computer Systems Title Size Custom Date: Cover Sheet Document Number Tuesday, May 23, 2006 946GZT-AM Sheet 1 Rev A 1 of 44 5 4 3 2 5 4 3 2 1 PCI LAN ALC888 DEVICE D ICH7 IDSEL 17 18 19 20 INT# C/D/E/F D/E/F/G E F REQ# PREQ-0 PREQ-1 PREQ-2 PREQ-3 GNT# PGNT-0 PGNT-1 PGNT-2 PGNT-3 SIZE : Max 2GB (Four 512Mb X 8 Double-Sided DEVICES) PCI1 PCI2 1394 LAN INTEL P4 Processor PSC, Tejas LGA 775 pin D BW : 4.1GB/s @ FSB : 533MHz & Freq : 133MHz BW : 6.4GB/s @ FSB : 800MHz & Freq : 200MHz BW : 10.7GB/s @ DDR2 :533/667MHz Analong Display RAMDAC: 400MHz Resolutions Up To 2048x1536@75Hz C VGA (G only) PCIEx16 INTEL I-GDS/G 1210pin FC-BGA DDIMM1: DDR Socket 184P C DDIMM2 : DDR Socket 184P BW : 2GB/s (Support Lsoch) USB V2.0 PCIEX1 INTEL PCIEx1 LAN BMC5786 BW : 133MB/s @Freq : 33MHz USB1 2 ports USB2 2 ports USB3 2 ports USB4 2 ports IDE1 40pin USBLAN 8 ports Up to Ultra ATA/100 Two IDE Channel USBLAN RJ45 ICH7 609pin EBGA B Mic In Line Out Line In CEN/BAS SURRON SID SURRON Audio Codec AC' 97 & Lan I/F LPC bus PCI1 Slot 120pin @ AD17 PCI2 Slot 120pin @ AD18 ALC888 intel FWH SATA1 7Pin SATA2 7pin SATA3 7Pin SATA4 7pin 32pin PLCC TI 1394 TSB43AB22 ITE 8718 Super I/O 128pin PQFP RTL 8100C B BW : 150MB/s USBLAN RJ45 PCB : 244 x 244 mm ; 4 layers A A Elitegroup Computer Systems Title Size Custom Date: 5 4 3 2 Document Number 946-System Block DiagamM Rev A 946GZT-AM Tuesday, May 23, 2006 1 Sheet 2 of 44 5 4 3 2 1 ICT_775_E23 1 ICT_775_E7 1 ICT_775_F23 1 STP2 STP9 STP3 R387 47-04 D Pull Down to Select 50 Ohm System bus Impedance H_VCCPLL D VTT_OUT_L 47-04 R428 COMP8 ER10 R400 24.9-1-04 47-04 47-04 49.9-1-04 H_VCCPLL FORCEPH_N CPUVID0 CPUVID1 CPUVID2 CPUVID3 CPUVID4 CPUVID5 CPUVID6 CPUVID7 R440 0-04 680-04 VTT_OUT_R H_VCCPLL FORCEPH_N CPUVID0 CPUVID1 CPUVID2 CPUVID3 CPUVID4 CPUVID5 CPUVID6 CPUVID7 VR_SEL VTT_OUT_R MC3 10u-10V-08-O C193 .01u-Y-04 MC28 10u-10V-08 10 MCH_GTLREF_CPU 35 35 VSSSEN

File name Mainboard_ESC_Model-A33G.pdf

8 7 6 5 4 3 2 1 ITE8716 GP44 (AR1) H : real S3 L : pseudo S3 System Block Diagram GP42 (AR2) : reserve GP41 (AR3) : reserve GP40 WP_ROM1(ROM1 ) H : ENABLE( ) L : DISABLE( ) D GP53,GP43 00 01 10 11 SSTL-2 4*CPUs D VCC_DIMM Termination 2*SATA NORMAL +0.025 +0.05 +0.075 AMD-K8 M2 DDRII SDRAM IVDD voltage 10*PCI-EXPs 266/333 8*PCIs mPGA - 940

File name Mainboard_ESC_Model-C51-M940.pdf

5 4 3 2 1 D C51-M940 Page Index 01-COVER PAGE 02-BLOCK DIAGRAM D 03-CPU M2-1 HyperTransport REV:1.0 PCB:15-K57-011000 BOM:81-685-K57100 04-CPU M2-1 DDR2 05-CPU M2-3 Miscellany 06-CPU M2-4 Power and Ground 07-First Logic DDR2 DIMM 08-DDR2 Termination 09-C51G HT CPU 10-C51G HT MCP51 11-C51G PCI-E 12-C51G DAC/VGA CONN C 13-C51G P/G C 14-MCP51G HT C51PV 15-MCP51G PCI 16-MCP51G SATA/IDE/CONN 17-MCP51G AUDIO/USB/MISC 18-MCP51G GMII 19-MCP51G P/G 20-PCI-E*16 21-PCI 1&2 22-PCI-E*1&CNR 23-LPC SIO-ITE8716F/FDD B 24-LPT / COM / PS2 B 25-USB 26-PWR CONN. / FNT PNL 27-CPU VCORE 28-DC-DC 29-ALC883/861/660/655 30-ALC883/861/660/655 CONN. 31-RTL8100C & AC131 Signature Date 32-1394 VT6308 Designer Eli Ya

File name Mainboard_ESC_Model-C51PVGM-M.pdf

5 4 3 2 1 D C51PVGM-M Page Index 01-COVER PAGE 02-BLOCK DIAGRAM D 03-CPU M2-1 HyperTransport REV:1.1 PCB:15-K57-011100 BOM:89-386-K57122 04-CPU M2-1 DDR2 05-CPU M2-3 Miscellany 06-CPU M2-4 Power and Ground 07-First Logic DDR2 DIMM 08-DDR2 Termination 09-C51PVG HT CPU 10-C51PVG HT MCP51G 11-C51PVG PCI-E 12-C51PVG DAC/VGA CONN C 13-C51PVG P/G C 14-MCP51G HT C51PVG 15-MCP51G PCI 16-MCP51G SATA/IDE/CONN 17-MCP51G AUDIO/USB/MISC 18-MCP51G GMII 19-MCP51G P/G 20-PCI-E*16 21-PCI 1&2 22-PCI-E*1&CNR 23-LPC SIO-ITE8716F/FDD B 24-LPT / COM / PS2 B 25-USB 26-PWR CONN. / FNT PNL 27-CPU VCORE 28-DC-DC 29-ALC888 30-ALC888 CONN. 31-RTL8100C Signature Date 32-1394 VT6308 Designer Eli Yang Layout A

File name Mainboard_ESC_Model-CRU51-M7.pdf

5 4 3 2 1 TITLE COVER SHEET BLOCK DIAGRAM RESET&CLK MAP D SHEET 1 2 3 4 5,6,7,8,9 10 11 12 13,14,15 16,17,18,19 20 21 22 23 24 25 26 27 28 29 30 31 32 B D SPEC&CHANGE LIST PROCESSOR K8 754 DDR 1 DDR 2 DDR ADD/CTL/VTT TERMINATI NORTH BRIDGE(C51G) SOURTH BRIDGE(MCP51G) PCI 1&2 FRONT PANEL HEADER PCI EXPRESS X16 & X1 CRU51G+MCP51G VER:1.3A C C IDE CONN POWER CONN & FAN CONTROL FLOOPY / KB / MOUSE / CMOS VGA CONN & TV OUT USB DEVICE SERIAL & PARALLEL AUDIO CODEC AUDIO CONN VCORE POWER SUPPLY MEM_VREG/MEM_VTT B LPC SUPER IO(IT8712) FLASH ROM & H/W MON POWER SEQUENCING LAN 10/100/1000 OVER VOLTAGE C51 CORE BOM 33 34 35 36 37 38 39 A A Title COVER SHEET Size Document Number Custom Date: 5 4 3 2 CRU51-M7 Sheet 1 Rev 1.3 1 of 39 Monday, April 10, 2006 5 4 3 2 1 D POWER SUPPLY CONN VREG AMD K8 SOCKET 754 MEMORY DDR DIMM(2) 128-BIT 200/266/333/400 MHZ D HT 16X16 1GHZ PEX X16 (1) PEX X1 (1) NFORCE CRUSH 51G 468BGA ATA 133 HT 4X4 800MHZ PCI 33MHZ VGA CONN TV OUT (C51PV ONLY) PRIMARY IDE C SECONDARY IDE NFORCE MCP 51G 508BGA PCI SLOT (2) AZALILA/AC97 C SATA CONN(X4) INTEGRATED SATA 1/2 LPC BUS 33MHZ AUDIO CODEC USB2.0 (X8) USB2 PORTS 5-4 DOUBLE STACK USB2 PORTS 3-2 LAN RJ45 BACK PANEL CONN FLOPPY CONN PS2/KBRD CONN PARALLEL CONN B SIO IT8712 SERIAL CONN H/W MON RGMII 4MB FLASH USB2 PORTS 1-0 USB2 PORTS 7-6 FRONT PANEL HDR B MII/RGMII A A Title SYSTEM BLOCK Size Document Number Custom Date: 5 4 3 2 CRU51-M7 Sheet 1 Rev 1.3 2 of 39 Monday, April 10, 2006 5 4 3 2 1 K8 754 CPU HT_CPU_TXCLK0 HT_CPU_TXCLK0* HT_CPU_RXCLK0 HT_CPU_RXCLK0* D K8 SKT 754 CHANNEL A1 0-63 MEMORY_A1_CLK[2:0] MEMORY_A1_CLK[2:0]* MEMORY_B1_CLK[2:0] CPU RST* DIMM 0 CPU_RST* CPU_PWRGD RESET MAP CRUSH 51 PE_RESET* CPU PWRGD DIMM 1 HT_CPU_TXCLK1 HT_CPU_TXCLK1* HT_CPU_RXCLK1 HT_CPU_RXCLK1* CPUCLK_IN* CPUCLK_IN MEMORY_B1_CLK[2:0]* CHANNEL B1 64-127 D HT CPU PWRGD HT CPU RST* HT_CPU_PWRGD HT_CPU_RST* HT_MCP_PWRGD HT_MCP_RST* MEMORY_A2_CLK[2:0] MEMORY_A2_CLK[2:0]* MEMORY_B2_CLK[2:0] MEMORY_B2_CLK[2:0]* CHANNEL A2 0-63 PEX X16 DIMM 2 /NI OPTIONAL PEX X1 HT MCP PWRGD HT MCP RST* DIMM 3 /NI CHANNEL B2 64-127 OPTIONAL PEX X1 /NI CRUSH 51 CLKOUT_200MHZ CLKOUT_200MHZ* HT_CPU_RXCLK1* HT_CPU_RXCLK1 HT_CPU_TXCLK1* HT_CPU_TXCLK1 HT_CPU_RXCLK0* PE2_REFCLK HT_CPU_RXCLK0 HT_CPU_TXCLK0* HT_CPU_TXCLK0 HT_MCP_TXCLK0 HT_MCP_TXCLK0* HT_MCP_RXCLK0 HT_MCP_RXCLK0* CLKIN_25MHZ XTAL_OUT CLKIN_200MHZ* CLKIN_200MHZ XTAL_IN PE2_REFCLK* PEX X1 /NI PE1_REFCLK PEX X1 PE1_REFCLK* PS ON PWR GOOD C MCP 51 HT_MCP_RST* HT MCP RST* PWR BUTTON HT MCP PWRGD HT_MCP_PWRGD PCIRST_SLOT1* PCIRST_SLOT2* PCIRST_SLOT3-4* PCIRST_IDE* LPCRST_FLASH* LPCRST_SIO* PRI IDE PCI SLOT 3 /NI PCI SLOT2 PCI SLOT1 C PE0_REFCLK PEX X16 PE0_REFCLK* PWR SWTCH 8712 PWRBT ON* PWR BUTTON* SLP_S3* PS ON PCI RST1* POWER_GOOD PWRGD PCI RST2* PCI RST3* PWRGD_SB PWRGD SB CIRCUIT GPIO_AUX* PWRGD_SB LPC_RST* AC_RESET* PWRBTN* SLP_S3* SLP S3* PCI RST0* PWR CONN CLOCK DISTRIBUTION 27 MHZ

File name Mainboard_ESC_Model-MCP61M-M.pdf

5 4 3 2 1 D MCP61M-M REV:A PCB:15-V02-010010 BOM:81-605-V02000 REV:B PCB:15-V02-010020 BOM:81-605-V02010 v.A --> v.B 01.P31.add R386 02.P31.change dual SW control from GPIO3 to GPIO7 03.P31.add R404 Page Index 01-COVER PAGE 02-BLOCK DIAGRAM 03-BLOCK DISTRIBUTION 04-CPU M2-1 HyperTransport 05-CPU M2-1 DDR2 06-CPU M2-3 Miscellany 07-CPU M2-4 Power and Ground 08-DDR2 DIMM 09-DDR2 Termination 10-MCP61 HT 11-MCP61 PCI-E X16 12-MCP61 PCI-E X1/RGMII/DAC 13-MCP61 PCI 14-MCP61 SATA/IDE 15-MCP61 AUDIO/USB/MISC 16-MCP61 PWR/GND 17-MCP61 DECOUPLING/SPI 18-VGA 19-1394(VT6307/VT6308P) 20-LAN AC131/GIGA RTL8110SC 21-PCI-E X16 CONN 22-PCI1/PCI2 23-PCI-E X1/TPM 24-LPC SIO-ITE8716F/FDD 25-PS2/COM/LPT 26-USB 27-AUDIO ALC861/660 28-AUDIO ALC861/660(PANEL) 29-PWR CON/FNT PNL 30-CPU VCORE 31-DC-DC 32-ATTENTION D C C B B A Designer Layout Check Approval 5 Signature Vincent Date 05/02/2006 A Elitegroup Computer Systems Title COVER PAGE Size B Date: 4 3 2 Document Number MCP61M-M Sheet 1 Rev B 1 Wednesday, July 05, 2006 of 32 5 4 3 2 1 BLOCK DIAGRAM D POWER SUPPLY CONNECTOR VREG D M2 SOCKET 940 THERM MONITOR 128-BIT 400/533/667/800MHZ DDRII SDRAM CONN 0 DDRII SDRAM CONN 1 HT 16X16 1GHZ PEX X16 PCI EXPRESS PEX X1 C PCI EXPRESS PCI 33MHZ C PCI SLOT 1 NFORCE MCP61 692 BGA HDA ATA 133 PRIMARY IDE INTEGRATED SATA CONTROLLERS (X2) X4 - SATA CONN USB2 PORTS 0-1 X2/GBIT LAN B PCI SLOT 2 7.1 AUDIO X10 USB2 BACK PANEL CONN USB2 PORTS / 1394 conn 2-3 B FLOPPY CONN PS2/KBRD CONN SIO PARALLEL CONN ITE8726 BUF SIO CLK 24MHZ LPC HDR SERIAL CONN MII/RGMII A FRONT PANEL HDR USB2 PORTS 4-5 LPC BUS 33MHZ USB2 PORTS 6-7 USB2 PORTS 8-9 MII/RGMII AC131 / RTL8110SC / RTL8211B A 4MB FLASH Elitegroup Computer Systems TPM Title BLOCK DIAGRAM Document Number Rev Size B Date: 5 4 3 2 MCP61M-M Monday, July 03, 2006 Sheet 1 A 2 of 32 5 4 3 2 1 M2 SOCKET 940 D HT_CPU_TXCLK0 HT_CPU_TXCLK0* HT_CPU_RXCLK0 HT_CPU_RXCLK0* HT_CPU_TXCLK1 HT_CPU_TXCLK1* HT_CPU_RXCLK1 HT_CPU_RXCLK1* CPUCLK_IN* CPUCLK_IN MEMORY_A0_CLK[2:0] MEMORY_A0_CLK[2:0]* MEMORY_B0_CLK[2:0] MEMORY_B0_CLK[2:0]* CHANNEL A0 0-63 DIMM 0 D DIMM 1 MEMORY_A1_CLK[2:0] MEMORY_A1_CLK[2:0]* MEMORY_B1_CLK[2:0] MEMORY_B1_CLK[2:0]* CHANNEL B0 64-127 C CLKOUT_200MHZ CLKOUT_200MHZ* HT_CPU_RXCLK1* HT_CPU_RXCLK1 HT_CPU_TXCLK1* HT_CPU_TXCLK1 HT_CPU_RXCLK0* HT_CPU_RXCLK0 HT_CPU_TXCLK0* HT_CPU_TXCLK0 PE0_REFCLK PE0_REFCLK* PE1_REFCLK PE1_REFCLK* PE0 X16 PE1 X1 C MCP61 BUF_SIO 14MHZ OR 24MHZ* SIO LPC_CLK0 PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLKIN LPC_CLK1 TPM PCI SLOT 1 B B PCI SLOT 2 HDA_BITCLK HDA CODEC FLASH LPC HEADER RTC_XTAL 32.0 KHZ XTAL_IN A RGMII_TXCLK RGMII_RXCLK LAN PHY A 25 MHZ XTAL_OUT BUF_25MHZ Title Elitegroup Computer Systems CLOCK DISTRIBUTION Size B Date: 5 4 3 2 Document Number Rev MCP61M-M Monday, July 03, 2006 Sheet 1 A 3 of 32 8 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 51-04 51-04 L0_CTLIN_H1 L0_CTLIN_L1 L0_C

File name Mainboard_ESC_Model-MCP61PM-AM.pdf

5 4 3 2 1 Page Index Pixie 01-COVER PAGE 02-BLOCK DIAGRAM D 03-BLOCK DISTRIBUTION D 04-CPU M2-1 HyperTransport MCP61PM-AM 05-CPU M2-1 DDR2 06-CPU M2-3 Miscellany 07-CPU M2-4 Power and Ground 08-DDR2 DIMM 09-DDR2 DIMM 10-DDR2 Termination ET82 REV:A 11-MCP61 HT PCB:15-V01-010010 12-MCP61 PCI-E X16 BOM:81-685-V01000 13-MCP61 PCI-E X1/RGMII/DAC 14-MCP61 PCI C REV:B 15-MCP61 SATA/IDE C PCB:15-V01-010020 16-MCP61 AUDIO/USB/MISC BOM:81-685-V01010 MCP61-S 17-MCP61 PWR/GND BOM:81-685-V01020 MCP61-P 18-MCP61 DECOUPLING/SPI 19-VGA REV:1.0 20-1394(TI 23A) PCB:15-V01-011000 21-LAN 88E8056 BOM:81-685-V01100 MCP61-S 22-PCI-E X16 CONN BOM:81-685-V01101 MCP61-P 23-PCI1/PCI2 BOM:81-685-V01102 MCP61-S W/O 1394 24-PCI-E X1/TPM B REV:1.0A 25-LPC SIO-ITE8726/FDD B 26-PS2/COM/LPT PCB:15-V01-011010 27-USB 28-AUDIO ALC888/883 29-AUDIO ALC888/883(PANEL) 30-PWR CON/FNT PNL 31-CPU VCORE 32-DC-DC Signature Date 33-ATTENTION Designer Jeff Lee A Layout

File name Mainboard_ESC_Model-P23G.pdf

5 4 3 2 1 P23G 1 Cover Page 2 Block Diagram 3 Clock Generator D 4 Power (CPU Vcore) Rev :3.0 D 5 Power (DC to DC) Schedule L2:PWR 6 CPU P4-775(FSB) PCB Ver. L3:GND Schematics 244*244*1.6 -2116 BOM Schematics Layout Gerber Out M/B return 7 CPU P4-775(PWR, GND) A 15-N56-010010 89-200-N56000 8 NB PM800pro (CPU) B 15-N56-010020 89-200-N56010 June/21/2005 July/8/2005 9 NB PM800pro (MEM) C 15-N56-010030 89-200-N56020 Aug/5/2005 Aug/10/2005 Aug/17/2005 Aug/25/2005 10 NB PM800pro (AGP, V-Link) D 15-N56-010040 89-200-N56030 Sep/27/2005 Sep/28/2005 Sep/30/2005 Oct/11/2005 11 NB PM800pro (VGA) 1.0 15-N56-011000 89-200-N56100 Oct/21/2005 Oct/24/2005 Oct/25/2005 12 AGP SLOT 3.0 13 SB 8237(PCI, USB) C 14 SB 8237(IDE, GPIO, AC-Link) Ver 3.0 Support CONROE, Using VRM11 PWM . C 15 SB 8237(V-Link, MII) 16 Super IO(ITE8705F/FX,F/GX) 17 PCI 1, 2 18 PCI 3, CNR 19 USB, PS2, IDE 20 COM, LPT, VGA 21 AUDIO(ALC655), 6CH mute function 22 Front Panel 23 LAN PHY(VT6103L) B B 24 DDR II SLOT1 25 DDR II SLOT2 26 DDR I 27 DDR Terminator 28 VDIMM & DDR VTT A

File name Mainboard_ESC_Model-P4M800PRO-M.pdf

5 4 3 2 1 P4M800PRO-M 1 CPU P4-775(FSB) 2 CPU P4-775(PWR, GND) 3 Clock Generator Rev : 2.0 D D 4 Power (CPU Vcore) 5 Power (DC to DC) Schedule 6 VDIMM & DDR VTT PCB Ver. Schematics 244*244*1.6 -2116 BOM Schematics Layout Gerber Out M/B return 7 NB P4M800pro (CPU) L2:PWR DDR Area L2:GND A A 89-200-Q22000 8 NB P4M800pro (MEM) L3:GND DDR Area L3:PWR B B 89-200-Q22010 9 NB P4M800pro (AGP, V-Link) 1.0 1.0 89-380-Q22100 10 NB P4M800pro (VGA) 1.0A 1.0A 89-380-Q22110 11 DDR II SLOT1 1.0A. 1.0A. 89-380-Q22110 12 DDR II SLOT2 C 13 DDR I C Rev:A Initial version: 14 DDR Terminator 1. Base on P23G to modify placement and layout 15 AGP SLOT Rev:B 1. Schematic modify for DDR2 clock input to buffer .. etc 16 SB 8237(PCI, USB) 2. Codec change to ALC655 3. Del 1394 function 4. Add RTL8100C PCI LAN optional 17 SB 8237(IDE, GPIO, AC-Link) Rev:1.0 18 SB 8237(V-Link, MII) 1. Modify component lib. 2. Modify LAN crystal placement 19 LAN PHY(VT6103L)

File name Mainboard_ESC_Model-P4M890T-M.pdf

5 4 3 2 1 PCB:244*210mm P4M890T-M Customer:channel L2:PWR 1 Cover Page L3:GND GPIO 2 Block Diagram IC GPIO(PIN) Function Note 3 CPU P4-775(FSB) VT GPI23(P21) -IDE2 cable detect 8237R+ D 4 CPU P4-775(PWR, GND) GPI8(AC9) -IDE1 cable detect D 5 Clock Generator, Clock Buffer Rev : 1.0 GPI18(Y4) -PCIE PME SCI PCB SVID:1019(ECS) 6 Power (CPU Vcore) SSID:2171(Q71) Schedule GPI19(U23) -PCIE Hot Plug SCI Schematics Lead-Free BOM O GPO

File name Mainboard_ESC_Model-P4M890T-M2.pdf

5 4 3 2 1 PCB:244*244mm P4M890T-M2 Customer:China SI L2:PWR 1 Cover Page L3:GND GPIO 2 Block Diagram IC GPIO(PIN) Function Note 3 CPU P4-775(FSB) VT GPI23(P21) -IDE2 cable detect 8237R+ D 4 CPU P4-775(PWR, GND) GPI8(AC9) -IDE1 cable detect D 5 Clock Generator, Clock Buffer Rev : 1.0B GPI18(Y4) -PCIE PME SCI PCB SVID:1019(ECS) 6 Power (CPU Vcore) SSID:2171(Q71) Schedule GPI19(U23) -PCIE Hot Plug SCI Schematics Lead-Free BOM O GPO7(R2) -TBL(Top Block Lock) default=0

File name Mainboard_ESC_Model-P965T-A.pdf

1 2 3 4 5 6 7 8 ( P4 LGA775P Processor with DDR2 SDRAM Mainboard ) A Schematics Version History Table : Circuit Ver. PCB Ver. A 0430 P965T-A Page Modified Page(s) 1.0B Date Page Title of Schematic : Title Cover Sheet System Block Diagram P4 LGA775P Part A P4 LGA775P Part B P4 LGA775P Part C P4 LGA775P Part D P4 LGA775P Part E Clock Generator(CK509) 965(MCH)Part A & F 965(MCH)Part B 965(MCH)Part C & D 965(MCH)Part E & G & H DDIMM 1&2 ( DDR SDRAMs ) DDIMM 3&4 ( DDR SDRAMs ) DDR & V_FSB_VTT Power PCI EXPRESS 16-PORT ICH8 Part A & D (SATA-CONNECTOR) ICH8 Part B & C (RTC) ICH8 Part E & F (POWER & GND) SST W83L772G USB/FWH LPC_FDD/KB/M I/O Ports H/W Monitor Azalia Codec Audio Interface ATX Power & Front Panel RTL 8110S GLAN Vcore RT8802A VRD11 MIS DC-DC(DUAL & VDDQ) PCI Slot 1&2 Back I/O PCI Slot 3 VT6307 (1394) PCIE X1 5 6 Page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Title INTEL GLAN PHY (82566) JMICRON SATA RAID_PATA PCI EXPRESS EX2 INTEL CL SYSTEM POWER Map Page 36 37 38 39 40 A A B B C C D D Elitegroup Computer Systems Title Size Custom Date: Document Number Cover Sheet P965T-A Sheet 1 8 Rev 1.0B of 43 Tuesday, June 20, 2006 7 1 2 3 4 A B C D E DEVICE PCI1 PCI2 PCI3 1394 4 IDSEL 17 18 19 20 21 INT# C/D/E/F D/E/F/G E/F/G/H G F REQ# PREQ-0 PREQ-1 PREQ-2 PREQ-3 PREQ-4 GNT# PGNT-0 PGNT-1 PGNT-2 PGNT-3 PGNT-4 LAN INTEL P4 Processor PSC, Smithfield LGA 775 pin 4 BW : 6.4GB/s @ FSB : 800MHz & Freq : 200MHz BW : 6.4GB/s @ FSB : 1066MHz & Freq : 266MHz BW : 10.7GB/s @ DDR2 :533/667/800 MHz PCIE 16X 3 INTEL BroadWater 1202pin FC-BGA BW : 2GB/s (Support Lsoch) USB V2.0 DDIMM1: DDR2 Socket 240P DDIMM2 : DDR2 Socket 240P DDIMM3: DDR2 Socket 240P DDIMM4 : DDR2 Socket 240P PCIE 4X PCIEx1 PCIEx1 IDE CONNECTOR SATA CONNECTOR SATA CONNECTOR USBLAN RJ45 3 USB1 2 ports USB2 2 ports USB3 2 ports INTEL ICH8 JMIcrom JMB363 Line in 2 Line out Mic in Center/Bass out Surround SPDIFO Audio Codec ALC885 /861 SATA1 7Pin SATA2 7pin SATA3 7Pin SATA4 7pin SATA5 7Pin SATA6 7pin Azalia I/F 652pin EBGA SPI ROM #1 2 SPI ROM #2 LPC bus 82566 Lan PHY Intel 32pin PLCC BW : 150MB/s intel FWH VIA VT6308 RTL8110SC Super I/O 8712F 128pin PQFP PCI1 Slot 120pin @ AD17 PCI2 Slot 120pin @ AD18 PCI3 Slot 120pin @ AD19 USBLAN RJ45 1 1 Elitegroup Computer Systems Title Size B Date: Document Number PINHEADER PINHEADER System Block Diagram P965T-A Sheet E Rev 1.0B 43 Tuesday, June 20, 2006 2 of A B C D 5 4 3 2 1 Intel 775 CPU AC2 G23 D N1 PCI1 SLOT D H_CPUPWRGD PCI2 SLOT PCI3 SLOT Intel 965 CLOCK GEN 11 AM15 AM17 C31 AM18 AA12 H_CPURST_L C Realtek RTL8100C PCI 10/100 LAN POWER GOOD C PWROK VCORE PWM AG24 AE24 Intel ICH8 2 VRM_PWRGD B12 AC16 AF16 DEVSEL_L 5 74LVC14 8 PCIRST_L1 FWH AF22 A1 11 74LVC14 10 PCIRST_L2 PCIEX1 SLOT 16 LANES PWRBT_L ATXPOK SLP3_L PCIEX2 SLOT 1 LANE 13 74LVC14 12 JMIcron JMB361 B B HWRST_L 8 AT

File name Mainboard_ESC_Model-RS485M-M.pdf

5 4 3 2 1 RS485M-M 1 Cover Page BASED ON RES485-M VER:A 2 Block Diagram PCB:244mm*244mm 3 Clock Generator Rev : 1.0 L2:PWR L3:GND D 4 Power (CPU Vcore), Intersil 6566(DCR Sense) D 5 Power A(DC to DC) VER:B ->C 1. FIX V_DIMM & GND SHORT BY THERMAL PAD IN LAYER3. 6 Power B(DC to DC),PWR sequence&good 2. ADD D22...P6 3. ADD C525... ...P24 7 K8 - M2 CPU (HT) D VER:C ->D 1. ADD R609,R610, CHANGE R554/R555 value...P3 8 K8 - M2 CPU (MEM) A 2. DEL U8,R586~R590. ADD R653~R655...P7 3. CHANGE CODEC CIRCUIT TO STANDARD 655/883 CO LAY.. ...P21,P32 4. ADD TPM CIRCUIT...P21,P24,P26 9 K8 - M2 CPU (CTRL) B,C 5. ADD IR1 & R656... ...P24 6. CHANGE CPU & SYS FAN TO 3/4 pin CO LAY...P24,P29 7. ADD Q62 FOR MSG LED...

File name Mainboard_Foxconn_Model-648M06.pdf

5 4 3 2 1 SOCKET-775 Note: D Do not include the schematic when create netlist. D Host Bus AGP SLOT VGA PCI Slot 1 C AGP BUS AGP BUS SiS648FX SIS661 DDR SDRAM DIMM1 DIMM2 C PCI Slot 2 PCI Slot 3 LAN MuTIOL 1G LAN PHY AC'97 Audio Codec SiS964 IDE 1 IDE 2 Back Panel B Front Panel B SATAX2 KEYBOARD /MOUSE PS/2 LPC Bus USB 0 USB 1 USB 4 USB 5 USB 6 USB 7 USB 3 FAN 1 FAN CONTROL USB 2 VOLTAGE MONITOR FAN 2 LPC Super I/O ISA Bus ISA ROM TEMPERATURE MONITOR A A IR PARALLEL COM FLOPPY TECHNOLOGY COPR. Title Topology Document Number Rev 648M06 Date: 5 4 3 2 B Sheet 1 Wednesday, March 16, 2005 1 of 41 5 4 3 2 1 VCCP VCCP NORTHWOOD CPUPWRGD CPURST_ VRD10/VRM9.X D VRMPWRGD D & PWOK CPUPWRGD NBPWRGD CPURST_ ATX Power PSON_ SiS648FX SiS661FX NBRST_ C AGP 8X SLOT C SiS963/SiS963L SBPWRGD PCI Slot 1 PCI Slot 2 NBRST_ PCI Slot 3 PCIRST_ Front Panel PSON_ IDE CONN 1 B RSTSW_ PWRBTN_ SIORST_ B IDE CONN 2 PWRBTN_ SIORST_ SIORST_ Super IO Media Interface A A TECHNOLOGY COPR. Title Reset Map Document Number Rev 648M06 Date: Wednesday, March 16, 2005 Sheet 2 of 41 B 5 4 3 2 1 14.318MHz CPU D CPUCLK0 100/133/200 MHz D CPUCLK1 100/133/200 MHz 66 MHz AGPCLK1 133 MHz ZCLK0 66 MHz AGPCLK0 AGP 8x DDR CLOCK BUFFER DIMM 1-2 SiS648FX FWDSDCLK0 DDRCLK CLOCK GENERATOR C C 33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 133 MHz 33 MHz PCICLK1-3 PCI Slot 1-3 SiS964 B B AUDIO_CLK 32.768KHz AC'97 24.576MHz/NC 48 MHz SIO48M Super I/O A A TECHNOLOGY COPR. Title Clock Distribution Document Number Rev 648M06 Date: 5 4 3 2 B Sheet 1 Wednesday, March 16, 2005 3 of 41 5 4 3 2 1 DDR 2 DIMMS: ATX SPS 5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V ATX 12V P/S + 1 2 V MPGA478 +12V VCC3 SB5V > > 2.5V REGULATOR S3AUXSW- VCC2.5_MEM > 2.5V +/-100mv 6.00A D REGULATOR D VCC2.5_MEM DDR_VTT_STR DDR VTT > MIC5258 VRD 10 CORE_CPU_SYS > VCCVID > > VCCP 1.1V~1.85V 70A VCC_VID 1.2V 30mA > VCC3 1.25V REGULATOR > 1.25V 2A SIS648FX VCC1.8V 1.8V 1389.5mA VDDQ: AGP 1.5V 35.1/21.7mA SB1.8V 1.8V 10mA VCC3_DUAL PWRG_ATX 5V_DUAL VCC3 C SB5V AIC1086 VCC3 SB3V PWRG_ATX VCC3_DUAL > > > > VCC3: 3.3V 108mA VCC3_DUAL 33.4mA VCC2.5_MEM 2.5V 501.3mA VCC1.8V VCCP SB3V 3 VOLTS BATTERY > OR > VCC_RTC VCC_RTC > > > > > SIS963L VCC3: 3.3V VCC3_DUAL VCC1.8V 1.8V RTCVDD VCCP C AIC1084 VCC1.8V CLK_GEN VCC3 > > > > VCC5 VCCP VCC5_DUAL 5V_SYS VCC3 VCC5 +12V -12V VCC3_DUAL B 3.3V 300mA > > > > > PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A VCC3_DUAL SUPER I/O VCC5_DUAL 5V VCC3_DUAL > VCC5_DUAL VCC5_DUAL FWH B VCC5 PWRG_ATX SB5V VCC3_DUAL > LAN PHY +12V AUDIO VREG VCC5A > > USB POWER 5V PS2 KB/MS POWER 5V VCC3 VCC3 +12V A AIC1084 VDDQ 1.5V VCC5 VCC3_DUAL > > > > > AGP VCC3 > > AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA A TECHNOLOGY COPR. Title Power Delivery Map Document Number Rev 648M06 Date: 5 4 3 2 B Sheet 1 Wednesday, March 16, 2005 4

File name Mainboard_Foxconn_Model-661M07.pdf

5 4 3 2 1 SOCKET-478 Note: D Do not include the schematic when create netlist. D Host Bus AGP SLOT VGA PCI Slot 1 C AGP BUS DDR SDRAM AGP BUS SiS648FX SIS661 DIMM1 DIMM2 C PCI Slot 2 PCI Slot 3 1394 MuTIOL 1G LAN PHY AC'97 Audio Codec SiS964 IDE 1 IDE 2 Back Panel B Front Panel B SATAX2 KEYBOARD /MOUSE PS/2 LPC Bus USB 0 USB 1 USB 4 USB 5 USB 6 USB 7 USB 3 FAN 1 FAN CONTROL USB 2 VOLTAGE MONITOR FAN 2 LPC Super I/O ISA Bus ISA ROM TEMPERATURE MONITOR A A IR PARALLEL COM FLOPPY TECHNOLOGY COPR. Title Topology Document Number Rev 661M07 Date: 5 4 3 2 A Sheet 1 Saturday, April 09, 2005 1 of 40 5 4 3 2 1 VCCP VCCP NORTHWOOD CPUPWRGD CPURST_ VRD10/VRM9.X D VRMPWRGD D & PWOK CPUPWRGD NBPWRGD CPURST_ ATX Power PSON_ SiS648FX SiS661FX NBRST_ C AGP 8X SLOT C SiS963/SiS963L SBPWRGD PCI Slot 1 PCI Slot 2 NBRST_ PCI Slot 3 PCIRST_ Front Panel PSON_ IDE CONN 1 B RSTSW_ PWRBTN_ SIORST_ B IDE CONN 2 PWRBTN_ SIORST_ SIORST_ Super IO Media Interface A A TECHNOLOGY COPR. Title Reset Map Document Number Rev 661M07 Date: Saturday, April 09, 2005 Sheet 2 of 40 A 5 4 3 2 1 14.318MHz CPU D CPUCLK0 100/133/200 MHz D CPUCLK1 100/133/200 MHz 66 MHz AGPCLK1 133 MHz ZCLK0 66 MHz AGPCLK0 AGP 8x DDR CLOCK BUFFER DIMM 1-2 SiS648FX FWDSDCLK0 DDRCLK CLOCK GENERATOR C C 33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M TXCLK REFCLK RXCLK 33 MHz PCICLK1-3 133 MHz LAN PHY PCI Slot 1-3 SiS963L B B AUDIO_CLK 32.768KHz AC'97 24.576MHz/NC 48 MHz SIO48M Super I/O A A TECHNOLOGY COPR. Title Clock Distribution Document Number Rev 661M07 Date: 5 4 3 2 A Sheet 1 Saturday, April 09, 2005 3 of 40 5 4 3 2 1 DDR 2 DIMMS: ATX SPS 5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V ATX 12V P/S + 1 2 V MPGA478 +12V VCC3 SB5V > > 2.5V REGULATOR S3AUXSW- VCC2.5_MEM > 2.5V +/-100mv 6.00A D REGULATOR D VCC2.5_MEM DDR_VTT_STR DDR VTT > MIC5258 VRD 10 CORE_CPU_SYS > VCCVID > > VCCP 1.1V~1.85V 70A VCC_VID 1.2V 30mA > VCC3 1.25V REGULATOR > 1.25V 2A SIS648FX VCC1.8V 1.8V 1389.5mA VDDQ: AGP 1.5V 35.1/21.7mA SB1.8V 1.8V 10mA VCC3_DUAL PWRG_ATX 5V_DUAL VCC3 C SB5V AIC1086 VCC3 SB3V PWRG_ATX VCC3_DUAL > > > > VCC3: 3.3V 108mA VCC3_DUAL 33.4mA VCC2.5_MEM 2.5V 501.3mA VCC1.8V VCCP SB3V 3 VOLTS BATTERY > OR > VCC_RTC VCC_RTC > > > > > SIS963L VCC3: 3.3V VCC3_DUAL VCC1.8V 1.8V RTCVDD VCCP C AIC1084 VCC1.8V CLK_GEN VCC3 > > > > VCC5 VCCP VCC5_DUAL 5V_SYS VCC3 VCC5 +12V -12V VCC3_DUAL B 3.3V 300mA > > > > > PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A VCC3_DUAL SUPER I/O VCC5_DUAL 5V VCC3_DUAL > VCC5_DUAL VCC5_DUAL FWH B VCC5 PWRG_ATX SB5V VCC3_DUAL > LAN PHY +12V AUDIO VREG VCC5A > > USB POWER 5V PS2 KB/MS POWER 5V VCC3 VCC3 +12V A AIC1084 VDDQ 1.5V VCC5 VCC3_DUAL > > > > > AGP VCC3 > > AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA A TECHNOLOGY COPR. Title Power Delivery Map Document Number Rev 661M07 Date: 5 4 3 2 A Sheet 1 Saturday,

File name Mainboard_Foxconn_Model-661M08.pdf

5 4 3 2 1 CPU-LGA775 Note: D Do not include the schematic when create netlist. D Host Bus AGP SLOT VGA PCI Slot 1 C AGP BUS AGP BUS SiS661GX /661FX /648FX/ 648C DDR SDRAM DIMM1 DIMM2 C PCI Slot 2 PCI Slot 3 MuTIOL 1G LAN PHY AC'97 Audio Codec IDE 1 IDE 2 SiS964/ 964L Back Panel Front Panel B B SATAX2 KEYBOARD /MOUSE PS/2 LPC Bus USB 0 USB 1 USB 4 USB 5 USB 6 USB 7 USB 3 FAN 1 FAN CONTROL USB 2 VOLTAGE MONITOR SPI Bus LPC Bus FAN 2 SPI ROM LPC ROM LPC Super I/O TEMPERATURE MONITOR A A IR PARALLEL COM FLOPPY TECHNOLOGY COPR. Title Topology Document Number Rev 661M08 Date: 5 4 3 2 A 1 of 44 1 Monday, August 01, 2005 Sheet 5 4 3 2 1 Foxconn Precision Co. Inc. 661M08 Schematic D Fab.A Data: 2005/06/28 Page Index 00. Index Page 01. Topology 02. Rest Map 03. Clock Distribution 04. Power Delivery Map 22. DECOUPLE & EMI 23. Termination 24. PCI 1&2 25. PCI3 26. IDE CONN 27. USB & LAN PORT 28. SI/O_ITE8712F/JX 29. K/B & MS CONN 30. COM/PRT/GAME PORT 31. LPC/SPI BIOS_FLOPPY 32. FAN 33. 653/655 AC97 CODEC 34. AC97 I/O 35. LAN PHY AC131KML 36. Power BTN/RTC Batt 37. DDR 2.5V DDRVTT 38. Power CONN 39. SB3V, SB1.8V, VCC1.8V, VDDQ 40. TI1394(NA) 41. USB 42. Modification 43. Jumper Setting/Option Table D C 05. LGA775-1 06. LGA775-2 07. Voltage regulator Down 10.1 08. Output CAP 09. 661FX-1 HOST & AGP 10. 661FX-2 DDR 11. 661FX Mutiol & VGA 12. 661FX Power 13. 964/L-1 PCI/IDE/Link 14. 964/L-2 PC/MIL/CPU/GPIO 15. 964-3 USB/SATA 16. 964-4 Power 17. 952017/18AF Clock GEN 18. DDR Clock Buffer 19. AGP 20. VGA CON 21. DIMM1 & DIMM2 C B B A A FOXCONN PCEG Title Index Page Size B Date: 5 4 3 2 Document Number 661M08 Sheet 1 Rev A 1 of 44 Monday, August 01, 2005 5 4 3 2 1 VCCP VCCP Prescott CPUPWRGD CPURST_ VRD10.1/VRM9.X D VRMPWRGD D & PWOK CPUPWRGD NBPWRGD CPURST_ ATX Power PSON_ C SiS648FX SiS661FX NBRST_ C AGP 8X SLOT SiS964/SiS964L SBPWRGD PCI Slot 1 PCI Slot 2 NBRST_ PCI Slot 3 PCIRST_ Front Panel PSON_ B RSTSW_ PWRBTN_ SIORST_ IDE CONN 1 IDE CONN 2 B PWRBTN_ SIORST_ SIORST_ Super IO 8712F/JX A Media Interface A TECHNOLOGY COPR. Title Reset Map Document Number Rev 661M08 Date: Monday, August 01, 2005 Sheet 2 of 44 A 5 4 3 2 1 14.318MHz CPU D CPUCLK0 100/133/200 MHz D CPUCLK1 100/133/200 MHz 66 MHz AGPCLK1 133 MHz ZCLK0 66 MHz AGPCLK0 AGP 8x DDR CLOCK BUFFER DIMM 1-2 SiS648FX /661FX FWDSDCLK0 DDRCLK CLOCK GENERATOR C C 33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 133 MHz SiS964/ 964L 33 MHz TXCLK RXCLK LAN PHY PCICLK1-3 PCI Slot 1-3 B B AUDIO_CLK 32.768KHz AC'97 24.576MHz/NC 48 MHz SIO48M Super I/O A A TECHNOLOGY COPR. Title Clock Distribution Document Number Rev 661M08 Date: 5 4 3 2 A Sheet 1 Monday, August 01, 2005 3 of 44 5 4 3 2 1 DDR 2 DIMMS: ATX SPS 5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V ATX 12V P/S + 1 2 V LGA775 +12V CORE_CPU_SYS VCCP 1.1V~1.85V 119A VCC_VID 1.2V 30mA VCC3 SB5V > > 2.5V REGULATOR S3AUXSW- VCC2.5_MEM >

File name Mainboard_Foxconn_Model-661S01.pdf

5 4 3 2 1 Note: Do not include the schematic when create netlist. SOCKET-478 Page5,6 D D VGA Page21 VGA Host Bus AGP SLOT Page20 AGP BUS DDR SDRAM Page22,23 SiS661FX Page10,11,12,13 DIMM1 DIMM2 Page45 PCI Slot 1 Page25 C LAN PHY C PCI Slot 2Page25 MuTIOL 1G Page45 1394 PHY Page34 Page34 oz263 Audio DJ AC'97 Audio Codec SiS963 IDE 1 Page27 IDE 2 Page27 B KEYBOARD /MOUSE Page30 PS/2 Page14,15,16,17 Back Panel Page28 Front Panel B LPC Bus USB 0 USB 1 USB 3 USB 4 USB 5 Media Interface FAN 1 Page33 FAN CONTROL USB 2 VOLTAGE MONITOR FAN 2 LPC Super I/O ISA Bus ISA ROM Page29 Page33 TEMPERATURE MONITOR A A CIR Page29 Title FOXCONN PCEG Topology Size Document Number Custom Date: 661S01 1 of 43 1 Rev B Wednesday, September 22, 2004 Sheet 5 4 3 2 5 4 3 2 1 VCCP VCCP NORTHWOOD CPUPWRGD CPURST_ VRD10 D VRMPWRGD D & PWOK CPUPWRGD NBPWRGD CPURST_ ATX Power PSON_ SiS661FX NBRST_ C AGP 8X SLOT C SiS963 SBPWRGD PCI Slot 1 PCI Slot 2 NBRST_ PCI Slot 3 PCIRST_ Front Panel PSON_ IDE CONN 1 B RSTSW_ PWRBTN_ SIORST_ B IDE CONN 2 PWRBTN_ SIORST_ SIORST_ Super IO Media Interface A A FOXCONN PCEG Title Size C Date: Reset Map Document Number 661S01 2 of 43 Rev B Wednesday, September 22, 2004 Sheet 5 4 3 2 1 14.318MHz CPU D CPUCLK0 100/133 MHz D CPUCLK1 100/133 MHz 66 MHz AGPCLK1 80/133 MHz ZCLK0 66 MHz AGPCLK0 AGP 8x DDR CLOCK BUFFER DIMM 1-2 SiS661FX FWDSDCLK0 DDRCLK CLOCK GENERATOR C C 33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 80/133 MHz 33 MHz PCICLK1-3 PCI Slot 1-2 SiS963 B B AUDIO_CLK 32.768KHz AC'97 24.576MHz/NC 48 MHz SIO48M SIO48M2 Super I/O A A Media Interface Title Size Document Number Custom Date: 5 4 3 2 FOXCONN PCEG Clock Distribution 661S01 Sheet 1 R ev A 3 of 43 Wednesday, September 22, 2004 5 4 3 2 1 19V_IN MAX1999 D +12V VCC5 FAN5232 DDR 2 DIMMS: > > SB5V FDS4410 FDS4410 5 V S B > >5 V S B 3 V > 3 >. 3 V > S3AUXSW- SC2616 VCC2.5_MEM DDR_VTT 2.5V +/-100mv D 12 V > 6.00A > 1.3V 2.00A / 200mil SIS963 VCC3: 140mA SB3V 380mA SB1.8V 70mA VCC1.8V 580mA VCCP 30mA > > MIC5258 19V_VRM MPGA478 19V_VRM VCC3 SB3V SC431L SB1.8 > VRD 10 VCCVID VCCP > > VCCP 1.1V~1.85V 91A VCC_VID 1.2V 30mA / 25mil VCC1.8V VCCP SB3V SIS661 VCC2.5_MEM C VCC3 SB3V VCC3 LM358 LM358 VDDQ VCC2.5_MEM VCC1.8V IVDD AUXIVDD RN&R > > > > > > > VCC3: 227mA SB3V 26mA 3 VOLTS BATTERY > OR > VCC3 RTCVDD > > > > > > RTCVDD 25mil width C VCC1.8V (IVDD) 2708mA SB1.8V (AUXIVDD) 13.4mA VCC2.5_MEM VCCP 390mA > > CLK_GEN 3.3V 300mA CLK_BUF ITE8705F_GX VCC2.5_MEM 587mA VDDQ: (AGP) 273mA SB5V 5V_SYS SB3V +12V VCC5 VCC3 SB3V B VCC3 VDDQ 1.5V +12V VCC5 SB3V > > > > > > > > > PCI PER SLOTЧ2 3.3V 5V 12V -12V SB3V 7.6A 5.0A 0.5A 0.1A 0.375A VCC5 SB5V > > > > > > SB5V 5V SB3V BIOS USB POWER SB5V PS2 KB/MS POWER SB5V Ч6 B AGP +12V VCC3 AUDIO VREG VCC5A > > AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA +12V SB3V VCC_BUS 1394_VC

File name Mainboard_Foxconn_Model-741M01C.pdf

5 4 3 2 1 REVISIONS REV A1 DESCRIPTION FIRST RELEASE DATE 06/07/04 APPROVED D D Topology K7 Page 5,6 Host Bus C AGP SLOT AGP BUS DDR SDRAM DIMM1 DIMM2 Page 18 SiS741 Page 8,9,10,11 Page 20,22 PCI Slot 1 PCI Slot 2 PCI Slot 3 Page 23,24 MuTIOL 1G LAN PHY Page 34,26 IDE 1 B SiS963 Page 25 AC'97 Audio Codec Page 32,33 IDE 2 Keyboard /Mouse PS/2 Page 12,13,14,15 Page 28 Back Panel LPC Bus Front Panel USB 4 USB 5 Page 26 USB 0 USB 1 FAN 1 FAN 2 Page 31 FAN CONTROL VOLTAGE MONITOR USB 2 USB 3 Page 26 Page 1. Page 2. Page 3. Page 4. Page 5. Page 6. Page 7. Page 8. Page 9. Page 10. Page 11. Page 12. Page 13. Page 14. Page 15. Page 16. Page 17. Page 18. Page 19. Page 20. Page 21. Page 22. Page 23. Page 24. Page 25. Page 26. Page 27. Page 28. Page 29. Page 30. Page 31. Page 32. Page 33. Page 34. Page 35. Page 36. Page 37. Page 38. Page 39. Page 40. Topology, Index Reset Map Clock Distribution Power Delivery Map K7 - 1 K7 - 2 Power VCCP 741-1 Host & AGP 741-2 DDR 741-3 MuTIOL Link 741-4 Power 963-1 PCI/IDE/MuTIOL 1G 963-2 LPC/MII/CPU/GPIO 963-3 USB 963-4 Power CLK Generator DDR Clock Buff AGP VGA Connector DIMM1 & DIMM2 Blank DDR Termination PCI 1&2 PCI 3 IDE USB, LAN Port ITE8705 Keyboard Mouse COM/PRT Port BIOS/FLOPPY FAN AC97 CODEC AC97 I/O LAN PHY Power BTN/RTC Batt SB3V/SB1.8V/AUX_IVDD DDR2.5V/DDRVTT ATX Power IVDD & AUX_IVDD Change List C B LPC Super I/O ISA ROM 30 Page ISA Bus Page 27 TEMPERATURE MONITOR IR A Page 27 PARALLEL Page 29 SERIAL Page 29 FLOPPY Page 30 A FOXCONN PCEG Title Size C Date: 5 4 3 2 Topology, Index Document Number 741M01C Sheet 1 Rev A 1 of 40 Monday, June 07, 2004 5 4 3 2 1 VCCP VCCP K7 D VRD10/VRM9.X D VRMPWRGD CPUPWRGD & PWOK NBPWRGD ATX Power PSON_ SiS741 C AGP 8X SLOT C SiS963 SBPWRGD PCI Slot 1 PCI Slot 2 PCI Slot 3 PCIRST_ Front Panel PSON_ SIORST_ PWRBTN_ B RSTSW_ IDE CONN 1 IDE CONN 2 B PWRBTN_ SIORST_ SIORST_ Super IO Media Interface A A FOXCONN PCEG Title Size C Date: Reset Map Document Number 741M01C Sheet 2 of 40 Rev A Monday, June 07, 2004 5 4 3 2 1 14.318MHz CPU CPUCLK0 D 100/133/200 MHz D CPUCLK1 100/133/200 MHz 66 MHz AGPCLK1 133 MHz ZCLK0 AGPCLK0 66 MHz AGP 8x DDR CLOCK BUFFER SiS741 FWDSDCLK0 DIMM 1-2 DDRCLK CLOCK GENERATOR 33 MHz 96XPCLK ZCLK1 48 MHz UCLK48M REFCLK 12 MHz TXCLK RXCLK 33 MHz PCICLK1-3 133 MHz C C LAN PHY PCI Slot 1-3 SiS963 AUDIO_CLK AC'97 24.576MHz/NC 48 MHz SIO48M 32.768KHz B Super I/O B A A FOXCONN PCEG Title Size C Date: 5 4 3 2 Clock Distribution Document Number 741M01C Sheet 1 Rev A 3 of 40 Monday, June 07, 2004 5 4 3 2 1 ATX SPS 5 V S B D 5 V 3 . 3 V + 1 2 V 1 2 V Socket A 462 +5V D > VRD 10 VCC3 VCCP > > > > > > > VCC3 VCC5 +12V -12V SB3V VCCP 1.1V~1.85V 41.4A SB1.8V SIS963L SIS741 VCC3: 3.3V 145mA SB3V 26mA VCC2.5_MEM 2.5V 463mA IVDD 1.9V 2.614A AUX_IVDD 1.9V 501.3mA VCC1.8V 1.8V 290mA VDDQ: AGP 1.5V SB1.8V 1.8V 10mA VCCP 1.5V 101mA 3 VOLTS BATTER

File name Mainboard_Foxconn_Model-748A01.pdf

5 4 3 2 1 Foxconn Precision Co.Inc. 748A01 D Date:2004/03/ 01 D PAGE INDEX 01. 02 . 0 3. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. Index Page Topology Reset Map Clock Dist ribution Power Deli very Map C PU-1 C PU-2 C PU-3 ISL6563 V CCP ISL6563 V CCP 748-1(Host /AGP) 748-2 Mem ory 748-3 MuTI OL/Other 748-4 Pow er 2.5V_DDR & 1.25V_VTT SB1.8V & SB 3V & 5V_DUAL 1D8V_VCC & VDDQ Hardware T rap* Main Clock Generator Clock Buffe r-1(3DDR/MIX) DDR/MIX DI MM1,2 DDR/MIX DI MM3 SSTL-2 Term ination Res AGP.SCH 25. 26. 27. 28. 29. 30. 31 . 32. 33. 3 4. 35. 36. 37. 38. 39 . 40. 41. 42. 43. 44. 45. 46. 47. 48. SIS964-PCI, IDE, MUTIOL SIS964-LPC /MII/GPIO SIS964-USB , SATA SIS964-PO WER PCI 1&2.S CH PCI 3&4.S CH PCI5.SCH VT6307 USB Header & 1394 Port LAN POWER RTL8110S/R TL8100C LAN & USB PORT IDE.SCH AC97 CODEC .SCH AC97 I/O ITE8705 Keyboard M ouse.SCH FAN HW Mon itor BIOS/FLOP PY COM/PRT P ORT Power BTN/R TC Batt.SCH Power Conn ector GPIO Sett ing Change li st C C B B A A TECHNOLOGY COPR. Title Index Document Number Re v 748A01 Date: 5 4 3 2 A Sheet 1 Sunday, September 05, 2004 1 of 48 5 4 3 2 1 AMD K7 D D Host Bus AGP SLOT DDR SDRAM SiS748 CHANNEL A CHANNEL B MuTIOL 1G PCI Slot 1 C Gigabit LAN RJ45 LAN PHY AC'97 Audio Codec Audio I/O SATA1,2 C PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 ATA 66/100/133 SiS964 PS/2 Back Panel LPC Bus USB 0 USB 1 IDE 1 IDE 2 B KEYBOARD /MOUSE Front Panel B USB 4 USB 5 USB 6 USB 7 USB 3 Media Interface FAN 1 FAN CONTROL USB 2 VOLTAGE MONITOR FAN 2 FAN 3 ISA Bus ISA ROM LPC Super I/O TEMPERATURE MONITOR A A IR PARALLEL FLOPPY TECHNOLOGY COPR. Title Topology Document Number Re v 748A01 Date: 5 4 3 2 A Sheet 1 Sunday, September 05, 2004 2 of 48 5 4 3 2 1 D D C C B B A TECHNOLOGY COPR. Title A Reset Map Document Number Re v 748A01 Date: Sunday, September 05, 2004 Sheet 3 of 48 A 5 4 3 2 1 5 4 3 2 1 D D C C B B A A TECHNOLOGY COPR. Title Clock Distribution Document Number Re v 748A01 Date: 5 4 3 2 A Sheet 1 Sunday, September 05, 2004 4 of 48 5 4 3 2 1 D D C C B B A A TECHNOLOGY COPR. Title Power Delivery Map Document Number Re v 748A01 Date: 5 4 3 2 A Sheet 1 Sunday, September 05, 2004 5 of 48 8 11 SDATAINCLKJ[0..3] 11 SDATAOUTCLKJ[0..3] 11 SADDINJ[2..14] 11 SADDOUTJ[2..14] 11 SDATAJ[0..63] 7 SDATAINCLKJ[0..3] SDATAOUTCLKJ[0..3] 6 5 4 3 L1 ADINCLKJ 2 L2 L0603 4.7nH 2 1 L0603 4.7nH 2 SADDINCLKJ SADDINCLKJ 11 1 1 10/10 SADDINJ[2..14] THERMDA SADDOUTJ[2..14] THERMDC SDATAJ[0..63] THERMDA THERMDC 40,42 42 * 4.7nH U1A VCCP ADINCLKJ R1 680 +/-5% SADDINJ0 SADDINJ1 SADDINJ2 SADDINJ3 SADDINJ4 SADDINJ5 SADDINJ6 SADDINJ7 SADDINJ8 SADDINJ9 SADDINJ10 SADDINJ11 SADDINJ12 SADDINJ13 SADDINJ14 SADDOUTCLKJ BC1 2.7pF 50V, NPO, +/-0.25pF C0603 C B RSTCLK CLKIN SDATAIN_VALID# SDATAOUT_VALID# NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52

File name Mainboard_Foxconn_Model-845M02-GV.pdf

1 2 3 4 5 6 7 8 A A Foxconn Precision Co. Inc. 845M02-GV-1.0 Schematics 1. REVISION LIST: REVISION 1.0 TOTAL PAGES 49 MODIFIED PAGES ERRATA NO. DATE June 11, 2003 B 2. PAGE INDEX B Page 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 C INDEX PAGE TOPOLOGY RESET_MAP CLK_DISTRIBUTION POWER_DELIVERY_MAP CPU_SOCKET478_1 CPU_SOCKET478_2 CPU_BYPASS_CAP CPU_SOCKET478_PULL Brookdale-GL_1 Brookdale-GL_2 Brookdale-GL_3 DDR_Series_Termination Brookdale_decoup_strapping DDR_DIMM_1&2 DDR_Parallel_Termination AGP4X CLKGEN POWER_1 POWER_2 POWER_3 FAN RESERVED REALTEK_LAN ICH4_1 Title Page 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 ICH4_2 ICH4_3 HDD_CONN RESERVED FWH_ROM RTC PS2KB&M_CONN USB_PS PRT/COM/IR/GAMEI_PORT VGA_CONNECTOR FLOPPY_PORT ALC201A_AC97_CODEC RESERVED AUDIO_JACK MISC ATX_POWER PCI_SLOT 1&2 PCI_SLOT 3 PCI_Termination SUPER_I/O_W83627HF RESERVED GPIO_IRQ_IDSEL_MAPS JUMPER&HEADER SETTING MODIFY LIST Title C D D FOXCONN PCEG Title INDEX_PAGE Size C Date: 1 2 3 4 5 6 7 Document Number 845M02-GV Sheet 8 Rev c of 49 Monday, June 16, 2003 1 5 4 3 2 1 MIC D D POWER SUPPLY CONN VREG VRM 9.X 2 PHASES Module mPGA478 SOCKET NORTHWOOD / WILLAMETTE/PRESCOTT FSB ICS950218 CLOCK GMCH: GRAPHICS/MEMORY VGA PORT CONTROLLER HUB INTEL 82845-GV/GL C DOUBLE DATA RATE SDRAM (2-DDR SDRAM DIMMS) DIMM 0:1 BROOKDALE-GV /GL CHIPSET HUB INTERFACE ATA 66/100 C IDE CONN 1&2 BACK PANEL USB PORT 0 USB PORT 1 PCI ( 33MHZ ) PCI SLOT 1:3 ICH4: I/O CONTROLLER HUB SM BUS ICH4 AC LINK AC'97 AUDIO CODEC REV 2.2 ALC202A OPTION: AD1981B FRONT PANEL USB PORT 2 USB PORT 3 LPC BUS B IRDA PORT WINBOND 83627HF SIO with HARDWARE MONITOR FWH: FIRMWARE HUB LAN 10/100M RTL8100BL RJ45 FRONT L,R REAR L,R MIC B PS2 MOUSE & KEYBOARD PARALLEL (1) SERIAL (1) FLOPPY DISK DRIVE CONN GAME PORT A A FOXCONN PCEG Title Size C Date: 5 4 3 2 TOPOLOGY Document Number 845M02-GV Sheet 1 Rev c of 49 Monday, June 16, 2003 2 5 4 3 2 1 D D RSTIN# BROOKDALE-GV/GL PWROK CPURST# RESET# DBR# TRSTJ# SLP# CPU_SOCKET478 AND BUFFER PWRG CPU:DBREST (ITP) RST# DBR# PWRGOOD THERMTRIP# HDRSTJ HDD_CONN HDD1 HDD2 FWH_ROM (FIRMWARE HUB) C TRST# C ATX POWER CONN PS_ON RSTJ PW_OK BUFFER SIO (Winbond I/O) LRESET# GP36/KBDRST# PWROK CPUSLP# CPUPWRGD THRMTRIP# PCIRSTJ# TRSTJ FRONT PANEL PBTN# CONN SPLED (MISC) RST# PSONJ INPUT CIRCUIT PWRBTN# GPIO27 SYS_RST# PCI1 PCI2 PCI3 RST# AGP4X SLP_S3# SLP_S5# RTCRST# PCIRST# CLEAR CMOS JUMPER POWER_3 PWRG SLP_S3 SLP_S5 LAN_RTL8001B RSTB VREG B PGOOD ICH4:I/O CONTROLLER HUB GENERATE RESUME RESET RSMRST# VRMPWRGD ALC201A_AC97_CODEC RESET# B AC_RST# RCINJ# CLK_GEN VTT_PWRGD# RESET MAP A A FOXCONN PCEG Title Size C Date: 5 4 3 2 RESET MAP Document Number 845M02-GV Sheet 1 Rev c of 49 Monday, June 16, 2003 3 5 4 3 2 1 D D 14.318MHZ 3.3 VOLT 33MHZ 33MHZ 33MHZ 33MHZ PCI SLOT 3 PCI SLOT 2 PCI SLOT 1 32.768KHZ ICH4 AC_BIT_C

File name mainboard_foxconn_model-845m05c.pdf

1 2 3 4 5 6 7 8 Foxconn LDC MD1 A 845M05C ( 845GV / PE / GE ) Schematics Fab B Date: 2004/6/11 A PAGE INDEX 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 INDEX PAGE TOPOLOGY RESET_MAP CLK_DISTRIBUTION POWER_DELIVERY_MAP POWER LIST GPIO,IRQ,IDSEL MAPS JUMPER&HEADER SETTING CPU_PART_1 CPU_PART_2 CPU_PART_3 845GV/PE HOST BUS 845GV/PE DDR BUS 845GV/PE AGP&VGA 845GV/PE(4) Power & CAP 845GV/PE GROUND DDR SERIES RESISTOR DDR1 DDR2 DDR TEMINATION AGP SLOT ICH4 PART1 ICH4 PART2 ICH4 PART3 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 FWH_ROM & RTC & SMB BUS PCI1&2 SLOT PCI3 SLOT PCI PULL HIGH&DOWN W83627HF RTL8100C AC97 CODEC:ALC655 IDE1,2 PS/2 PARALLEL PORT & COM1 BEAR VGA PORT REAR USB &LAN AUDIO PORT USB4,5 &COM2 FRONT PANEL & RESET FANS & SPK & IR ATX POWER CONNECTOR VCCP VCCP CAP & VCC_VID 1D5V_SYS 2D5V_STR & VTT_DDR 5V_DUAL & 3D3V_DUAL CLOCK GENERATOR MODIFY LIST FOXCONN PCEG Title B B C C D D INDEX Document Number Size 845M05C Date: 1 2 3 4 5 6 Rev B Sheet 1 8 Tuesday, June 15, 2004 7 of 48 5 4 3 2 1 MIC D POWER SUPPLY CONN VREG VRM 10.1 2 PHASES Module mPGA478 SOCKET NORTHWOOD / WILLAMETTE/PRESCOTT FSB ICS950218 CLOCK D VGA PORT GMCH: GRAPHICS/MEMORY CONTROLLER HUB DOUBLE DATA RATE SDRAM (2-DDR SDRAM DIMMS) DIMM 0:1 AGP INTEL 82845-GV/PE BROOKDALE-GV /PE CHIPSET C HUB INTERFACE ATA 66/100 C IDE CONN 1&2 BACK PANEL USB PORT 0 USB PORT 1 USB PORT 2 USB PORT 3 FRONT PANEL USB PORT 4 USB PORT 5 PCI ( 33MHZ ) PCI SLOT 1:3 ICH4: I/O CONTROLLER HUB AC LINK SM BUS ICH4 AC'97 AUDIO CODEC REV 2.2 ALC655 OPTION: AD1981B LPC BUS B B IRDA PORT WINBOND 83627HF SIO with HARDWARE MONITOR FWH: FIRMWARE HUB LAN 10/100M RTL8100C RJ45 FRONT L,R REAR L,R MIC PS2 MOUSE & KEYBOARD A PARALLEL (1) SERIAL (1) FLOPPY DISK DRIVE CONN GAME PORT A FOXCONN PCEG Title TOPOLOGY Document Number Size TFB-S01 Sheet 1 Rev A 2 of 48 Date: 5 4 3 2 Tuesday, June 15, 2004 5 4 3 2 1 RSTIN# D BROOKDALE-GV/PE RESET# PWROK CPURST# DBR# TRSTJ# D CPU_SOCKET478 SLP# AND BUFFER PWRG HDD_CONN HDRSTJ CPU:DBREST (ITP) RST# DBR# TRST# PWRGOOD THERMTRIP# HDD1 HDD2 ATX POWER CONN PS_ON C RSTJ PW_OK BUFFER FWH_ROM (FIRMWARE HUB) SIO (Winbond I/O) GP36/KBDRST# C LRESET# PWROK CPUSLP# CPUPWRGD THRMTRIP# PCIRSTJ# TRSTJ FRONT PANEL CONN (MISC) PBTN# SPLED RST# PSONJ INPUT CIRCUIT PWRBTN# GPIO27 SYS_RST# RST# PCI1 PCI2 PCI3 AGP4X POWER_3 SLP_S3 PWRG SLP_S5 SLP_S3# SLP_S5# PCIRST# B RTCRST# CLEAR CMOS JUMPER LAN_RTL8100C RSTB B VREG PGOOD ICH4:I/O CONTROLLER HUB GENERATE RESUME RESET AC_RST# RSMRST# RCINJ# VRMPWRGD ALC655_AC97_CODEC RESET# CLK_GEN VTT_PWRGD# RESET MAP A A FOXCONN PCEG Title RESET MAP Document Number Size TFB-S01 Sheet 1 Rev A 3 of 48 Date: 5 4 3 2 Tuesday, June 15, 2004 5 4 3 2 1 14.318MHZ D D 3.3 VOLT 33MHZ 33MHZ 33MHZ 33MHZ PCI SLOT 3 PCI SLOT 2 PCI SLOT 1 32.768KHZ ICH4 AC_BIT_CLK SIO 24.576MHZ AUDIO CODEC BIT_CL

File name Mainboard_Foxconn_Model-848M02.pdf

5 4 3 2 1 D Foxconn Precision Co. Inc. 848M02 Schematic PAGE INDEX 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. Index Page Topology Rest Map Clock Distribution Power Delivery Map ClockGen ICS952603 Voltage Regulator Down 10 2.5V Power and 5V_DUAL 1.5V Power VTT_DDR Power LGA775 -1 LGA775 -2 Springdale-GMCH-1 Springdale-GMCH-2 Springdale-GMCH-3 DDR Channel A AGP Connector ICH5-1 ICH5-2 & IDE Connecter 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. ICH5-3 LAN RTL8101L & USB LAN_POWER LAN Connector FWH USB Connectors AC'97 Codec Power/MISC Connectors PCI Slots 1,2 PCI Slot 3 Super IO ITE8712 Keyboard/Mouse/FAN Serial/Print Ports GPIO Summary Jumper Setting Summary Modify list Fab A Date: 2004/6/25 D C C B B A A FOXCONN PCEG Title Index Page Doc ument Number Size C Dat e: 848M02 S heet 1 Rev F 1 of 34 Friday , A ugus t 27, 2004 PDF created with pdfFactory trial version www.pdffactory.com 5 4 3 2 5 4 3 2 1 VRD 9/10 D Intel Prescott processor LGA775 ZIP Socket D 3 Phase PWM 400/533/800 FSB CK-409 Clock AGP 4X / 8X AGP Solt 4x/8x AGP DDR 400/333/266 Channel A DDR DIMM1 GMCH 848P DDR 400/333/266 932 Pin FC-BGA Channel B DDR DIMM1 C C Back Panel USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3 uATX Form Factor USB2.0 Port 4 Front Panel USB2.0 Port 5 USB2.0 Port 6 USB2.0 Port 7 USB2.0 Port 8 460 Pin mBGA PCI Interface ICH5 PCI Slot 1 PCI Slot 2 PCI Slot 3 10/100 BT LAN RTL8100C B B IDE CONN 1 IDE CONN 2 S-ATA0 S-ATA1 Super I/O ITE8712F PS2 Keyboard / Mouse A Parallel Serial Floppy Drive Connector Firmware HUB 2MB AC 97 Code 2.3 ALC 655 A FOXCONN PCEG Title Size Doc ument Number Cus t om Dat e: Topology 848M02 S heet 1 Rev F 2 of 34 Friday , A ugus t 27, 2004 PDF created with pdfFactory trial version www.pdffactory.com 5 4 3 2 5 4 3 2 1 CPU CPU_PWRGD D CPURSTJ D ATX Power PSON PWRGD_ATX PS_On GMCH PWRGD_3V CPURSTJ C PCIRSTJ C ICH5 AGP 4X / 8X ICH_PWRGD PCIRSTJ KBRST PWRGD_3V Buffer uATX Form Factor AGP Solt PCI Slot 1 PCI Slot 2 PCI Slot 3 B Front Panel SLP_S3# B RSMRST# PWRBTN# FR_RST SW_ON System_RST SW_ON# Buffer IDE CONN 1 IDE CONN 2 PANSWH# POWBTN PSIN FWH Super IO KBRST PWR_ON# RSMRST# PSON A A FOXCONN PCEG Title Reset Map Size C Dat e: Doc ument Number 848M02 S heet 1 Rev F 3 of 34 Friday , A ugus t 27, 2004 PDF created with pdfFactory trial version www.pdffactory.com 5 4 3 2 5 4 3 2 1 14.318MHz CPU 100/133/200 MHz Diff Pair D D 100/133/200 MHz Diff Pair 66 MHz AGP 4x/8x Channel A DDR SpringDale DIMM1 48 MHz 48 MHz Channel B DDR DIMM1 66 MHz C C CK409-ICS952603 14.318Mhz 66 MHz 33 MHz 48 MHz 33 MHz FWH ICH5 B 33 MHz PCI LAN RTL8101L B 33 MHz 33 MHz 33 MHz PCI Slot 1 32.768KHz PCI Slot 2 PCI Slot 3 Super I/O AC'97 33 MHz 100 MHz Diff Pair SRC A A FOXCONN PCEG Title Clock Distribution Size C Dat e: Doc ument Number 848M02 S heet 1 Rev F 4 of 34 Friday , A ugus t 27, 2004 P

File name mainboard_foxconn_model-865a01.pdf

5 4 3 2 1 D Foxconn Precision Co. Inc. 865A01 1. REVISION LIST: REVISION A B C D(Ver1.0) E TOTAL PAGES MODIFIED PAGES ERRATA NO. Ver 1.1 Date: 2003/08/21 DATE D C 2. PAGE INDEX 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. C B A 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42. 43. Confidential Document.Do Not Reproduce Index Page Topology Rest Map Clock Distribution Power Delivery Map ClockGen Cypress CY28405 Voltage Regulator Down 10 2.5V Power 1.5V Power 1.25V Power Socket478 -1 Socket478 -2 Springdale-GMCH-1 Springdale-GMCH-2 Springdale-GMCH-3 DDR Channel A DIMM's DDR Channel A Termination DDR Channel B DIMM's DDR Channel B Termination AGP Connector VGA Connector ICH5-1 ICH5-2 ICH5-3 1394_VT6307 LAN RTL8101L CSA LAN CON & USB3,4 ITP FWH USB Connectors AC'97 Codec Power/MISC Connectors PCI Slots 1,2 PCI Slots 3,4 PCI Slot 5 Super IO W83627NHF Keyboard/Mouse/FAN Serial/Print Ports GPIO Summary Jumper Setting Summary For EMI Caps CNR Without Foxconn Authorization. B A FOXCONN PCEG Title Size C Date: Index Page Document Number 865A01 Sheet 1 of 44 Rev E Sunday, August 24, 2003 5 4 3 2 1 VRD 10 D Intel Pentium 4 processor Northwood/Prescott processor uPGA 478 ZIP Socket D 3 Phase PWM 400/533/800 FSB CK-409 Clock AGP 4X / 8X AGP Solt 4x/8x AGP DDR 400/333/266 Channel A DDR DIMM1 Channel A DDR DIMM2 GMCH SpringDale DDR 400/333/266 932 Pin FC-BGA VGA Connector Channel B DDR DIMM1 Channel B DDR DIMM2 C C INTEL CSA 82547EI(Optional) Back Panel USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3 USB2.0 Port 4 Front Panel USB2.0 Port 5 USB2.0 Port 6 USB2.0 Port 7 USB2.0 Port 8 460 Pin mBGA PCI Interface ATX Form Factor ICH5 PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 B 10/100 BT LAN RTL8101L B IDE CONN 1 1394 PORT IDE CONN 2 VT 6307 Super I/O W83627HF/W83637HF INTEL82562EX(Optional) 10/100 BT LAN AC 97 Code 2.2 Smart Card Reader (W83637HF Sku Only) A PS2 Keyboard / Mouse Parallel Serial Floppy Drive Connector ALC 650 A Firmware HUB 4MB Confidential Document.Do Not Reproduce Without Foxconn Authorization. FOXCONN PCEG Title Size C Date: Topology Document Number 865A01 Sheet 2 of 44 Rev E Sunday, August 24, 2003 5 4 3 2 1 CPU CPU_PWRGD D CPURSTJ D ATX Power GMCH PWRGD_ATX PS_On Buffer PWRGD_3V CPURSTJ Arbiter Lan Controller C PCIRSTJ C 1394 Controller ICH5 ICH_PWRGD PCIRSTJ KBRST PWRGD_3V Buffer ATX Form Factor AGP 4X / 8X AGP Solt PCI Slot 1 PCI Slot 2 Buffer Front Panel B SLP_S3# System_RST SW_ON# PCI Slot 3 PCI Slot 4 PCI Slot 5 B SW_ON RSMRST# FR_RST IDE CONN 1 IDE CONN 2 RSMRST# KBRST Super IO FWH A A Confidential Document.Do Not Reproduce Without Foxconn Authorization. FOXCONN PCEG Title Size C Date: Reset Map Document Number 865A01 Sheet 3 of 44 Rev E Sunday, August 24, 2003 5 4 3 2 1 14.318MHz CPU D ITP D 133/166 MHz Diff Pair 133/166 MHz Diff Pair 133/166 MHz Diff Pa

File name mainboard_foxconn_model-865a05.pdf

5 4 3 2 1 D 1. REVISION LIST: REVISION A B C D Foxconn Precision Co. Inc. 865A05 Schematic TOTAL PAGES MODIFIED PAGES ERRATA NO. Fab B Date: 2003/08/025 DATE D 2. PAGE INDEX C B 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. Index Page Topology Rest Map Clock Distribution Power Delivery Map ClockGen ICS952619 Voltage Regulator Down 10 1.5V/2.5V/3.3V_SB POWER GMCHVTT/DDRVTT POWER Socket478 -1 Socket478 -2 Springdale-GMCH-1 Springdale-GMCH-2 Springdale-GMCH-3 DDR Channel A DIMM DDR Channel A Termination DDR Channel B DIMM DDR Channel B Termination AGP Connector 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. VGA Connector ICH5-1 ICH5-2 ICH5-3 FWH USB Connectors AC'97 Codec Power/MISC Connectors PCI Slots 1,2 PCI Slots 3,4 PCI Slot 5 Super IO 83627HF Keyboard/Mouse/FAN Serial/Print Ports GPIO Summary Jumper Setting Summary For EMI Caps LAN_RTL8101L Modify List C B A A FOXCONN PCEG Confidential Document.Do Not Reproduce Without Foxconn Authorization. 5 4 3 2 Title Size C Date: Index Page Document Number 865A05 Sheet 1 of 39 1 Rev B Monday, February 10, 2003 5 4 3 2 1 VRD 10 D Intel Pentium 4 processor Northwood/Prescott processor uPGA 478 ZIP Socket D 2/3 Phase PWM 400/533/800 FSB CK-409 Clock AGP slot (only for 865G/PE) DDR 400/333/266 Channel A DDR DIMM GMCH SpringDale DDR 400/333/266 932 Pin FC-BGA VGA (only for 865G/GV) Channel B DDR DIMM C C 8101 LAN Back Panel USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3 USB2.0 Port 4 PCI Interface ATX Form Factor ICH5 460 Pin mBGA PCI Slot 1 PCI Slot 2 PCI Slot 3 Front Panel USB2.0 Port 5 USB2.0 Port 6 B PCI Slot 4 1394_VT6307 PCI Slot 5 B IDE CONN 1 IDE CONN 2 Super I/O W83627HF AC 97 Codec ALC 655/202A Firmware HUB 4MB PS2 Keyboard / Mouse A Parallel Serial Floppy Drive Connector A Confidential Document.Do Not Reproduce Without Foxconn Authorization. 5 4 3 2 FOXCONN PCEG Title Size C Date: Topology Document Number 865A05 Sheet 2 of 39 1 Rev B Monday, February 10, 2003 5 4 3 2 1 CPU CPU_PWRGD D CPURSTJ D ATX Power GMCH PWRGD_ATX PS_On PWRGD_3V CPURSTJ C PCIRSTJ C ICH5 ICH_PWRGD PCIRSTJ KBRST PWRGD_3V Buffer PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 B Front Panel B Buffer SLP_S3# System_RST SW_ON# SW_ON RSMRST# FR_RST IDE CONN 1 IDE CONN 2 RSMRST# KBRST Super IO FWH A A Confidential Document.Do Not Reproduce Without Foxconn Authorization. 5 4 3 2 FOXCONN PCEG Title Size C Date: Reset Map Document Number 865A05 Sheet 3 of 39 1 Rev B Monday, February 10, 2003 5 4 3 2 1 14.318MHz CPU D 133/166 MHz Diff Pair D 133/166 MHz Diff Pair SpringDale 48 MHz Channel A DDR DIMM1 Channel B DDR 66 MHz C DIMM1 C CK-409 14.318Mhz 66 MHz 33 MHz 48 MHz 33 MHz FWH ICH5 24.576MHz B 33 MHz B 8101 LAN 48 MHz 33 MHz PCI Slot 1-5 32.768KHz 33 MHz 1394 Super I/O AC'97 33 MHz 100 MHz Diff Pair SRC A A FOXCONN PCEG Confidential Document.Do Not Repr

File name Mainboard_Intel_Model-430HX.pdf

Page# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Page Title Index Primary CPU (Socket 7) Clock Generator Triton II controller (TXC) Synchronous Cache, Lower 256K Synchronous Cache, Upper 256K Memory Modules 0 & 1 Memory Modules 2 & 3 System ROM PIIX3 PCI IDE Interface AIP Serial Ports, Floppy, USB Parallel Ports Keyboard/Mouse Ports Battery, RTC Circuit Front Panel PCI Slots 1 and 2 PCI Slots 3 and 4 ISA Slots Pullup/Pulldown Resistors Switching Power Supply Fiducials, Holes, Spare Gates Decoupling Caps Released Rev. B.1 INTEL CORP. THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. Title Index Size Document Number A 82430HX Date: June 19, 1997 Sheet REV B.1 24 1 of 4..6 HD[0..63] CPUVCORE 1111111 111222333333 1890123456 789013000111 8888847890123456789188888888 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HDPA0 HDPA1 HDPA2 HDPA3 HDPA4 HDPA5 HDPA6 HDPA7 3 HCLKCPU 116 102 112 101 97 96 91 90 72 55 54 36 71 35 53 17 34 52 16 69 33 51 15 68 50 48 67 47 66 46 65 45 44 63 43 62 42 61 41 60 59 2 78 20 58 39 77 38 57 76 56 94 75 100 74 99 105 109 110 115 120 119 125 129 73 70 49 64 40 95 93 130 256 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 CLK VVVVVVVVVVVVVVVVVVVVVVVVVVVV CCCCCCCCCCCCCCCCCCCCCCCCCCCC OOOOOOOOOOOOOOOOOOOOOOOOOOOO RRRRRRRRRRRRRRRRRRRRRRRRRRRR EEEEEEEEEEEEEEEEEEEEEEEEEEEE A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADSC# BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# FERR# BREQ HITM# HIT# PCHK# HLDA AP LOCK# APCHK# PRDY PCD PWT CACHE# ADS# D/C# W/R# M/IO SCYC FRCMC# IERR# SMIACT# PM0/BP0 PM1/BP1 BP2 BP3 TCK TDO TDI TMS TRST# PICCLK PICD0 PICD1 PHITM# PHIT# PBGNT# PBREQ# BF0 BF1 283 301 263 319 282 300 262 318 281 280 261 279 260 278 259 277 258 276 216 228 211 222 246 227 221 265 264 302 245 285 270 252 271 253 272 254 273 255 140 229 268 250 215 230 248 225 210 200 220 267 159 231 249 287 155 274 182 135 219 139 145 149 150 126 131 132 136 141 106 111 122 199 189 205 209 181 176 TP084 1 HFRCMC# TP011 1 TP087 TP088 TP090 TP089 TP007 TP091 TP006 TP005 TP004 TP002 TP014 TP021 TP020 TP015 TP017 TP016 HBF0 HBF1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 HBE#0 HBE#1 HBE#2 HBE#3 HBE#4 HBE#5 HBE#6 HBE#7 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA[3..31] 3..6 CPUVCORE C195 1 2 1

File name Mainboard_Intel_Model-430TX.pdf

A B C D E 1 2 3 4 INDEX CPU (SOCKET 7) CLOCK GENERATOR MTXC HOST INTERFACE MTXC SYSTEM INTERFACE CACHE 1 CACHE 2 DIMM 1 DIMM 2 SYSTEM BIOS, TSOP PIIX4 1 PIIX4 2 IDE INTERFACE ULTRA IO CONTROLLER PARALLEL PORT KB, FLOPPY, & COM PORTS USB PORT INTERFACE FAN & FRONT PANEL CONNECTORS POWER SUPPLY PCI SLOTS #1 & #2 PCI SLOTS #3 & #4 ISA SLOT #1 ISA SLOT #2 ISA SLOT #3 PULL-UP RESISTORS DECOUPLING CAPS CPU VOLTAGE REGULATORS APPENDIX: SYSTEM BIOS, DIP APPENDIX: COAST MODULE Intel Corporation Title 1 2 3 4 4 5 6 7 8 9 10 11 12 3 13 14 15 16 17 18 19 20 21 2 22 23 24 25 26 27 28 29 1 TX DESKTOP INDEX Size Date: A B C Document Number Thursday, December 19, 1996 D Rev 2.1 Sheet 1 of E 29 1 2 3 4 5 6 7 8 CPUVCORE 4,6 HD[63..0] AN17 AN15 AN13 AN11 AN9 AN19 AJ11 AG1 AA1 AC1 AE1 A11 A13 A15 A17 E15 B2 W1 G1 Q1 A7 U14 A9 N1 S1 U1 Y1 J1 L1 HA[31:3] 4,6 A B CPUVIO 8 RP20-1 1 4.7K 6 RP32-33 4.7K 8 RP35-11 4.7K 8 RP32-11 4.7K 7 RP32-22 4.7K 5 RP35-44 4.7K R53 330 R55 330 HA20M# HSMI# HIGNNE# HINTR HNMI HSTPCLK# HRESET HINIT HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 K34 G35 J35 G33 F36 F34 E35 E33 D34 C37 C35 B36 D32 B34 C33 A35 B32 C31 A33 D28 B30 C29 A31 D26 C27 C23 D24 C21 D22 C19 D20 C17 C15 D16 C13 D14 C11 D12 C9 D10 D8 A5 E9 B4 D6 C5 E7 C3 D4 E5 D2 F4 E3 G5 E1 G3 H4 J3 J5 K4 L5 L3 M4 N3 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 P54C/P55 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADSC# AL35 AM34 AK32 AN33 AL33 AM32 AK30 AN31 AL31 AL29 AK28 AL27 AK26 AL25 AK24 AL23 AK22 AL21 AF34 AH36 AE33 AG35 AJ35 AH34 AG33 AK36 AK34 AM36 AJ33 AM2 AL9 AK10 AL11 AK12 AL13 AK14 AL15 AK16 Q5 AJ1 AL5 AK6 AF4 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HADSC# 6 VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE 5V_SUPPLY: 3 RP43-36 4.7K 1 RP43-1 8 4.7K 3 RP38-36 4.7K 1 RP38-18 4.7K 4 RP43-4 5 4.7K 2 RP43-27 4.7K 4 RP38-4 5 4.7K 2 RP38-2 7 4.7K VCORE VCORE SOCKET 7 VCORE AN1,AN3 A19,A21,A23,A25,A27,A29,AA37,AC37 AE37,AG37,AJ19,AJ29,AN21,AN23,AN25 AN27,AN29,E21,E27,E37,G37,J37,L33 L37,N37,Q37,S37,T34,U33,U37,W37,Y37 VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE VCORE A BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# FERR# BREQ HITM# HIT# PCHK# HLDA AP LOCK# APCHK# PRDY PCD PWT CACHE# ADS# D/C# W/R# M/IO SCYC FRCMC# IERR# SMIACT# PM0/BP0 PM1/BP1 BP2 BP3 TCK TDO

File name Mainboard_Intel_Model-430VX.pdf

Page# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Page Title Index PRIMARY CPU (Socket 7) Clock Generator 82437VX Chipset TVX 82438VX Chipset TDX Synchronous Cache, 256K Memory Modules 0 & 1 Memory Modules 2 & 3 System ROM PIIX3 PCI IDE Interface I/O Controller Serial Ports, Floppy, USB Parallel Port Keyboard/Mouse Interface PCI SMBA Graphics Accelerator Video Connectors Front Panel PCI Slots 0 and 1 PCI Slot 2 ISA Slots 0 and 1 ISA Slot 2 Pullup/Pulldown Resistors CPUVCC Linear Regulator Fiducials, Holes, Spare Gates Decoupling Caps INTEL CORPORATION Released Rev. B.0 PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title Index Size Document Number A 82430VX Date: June 20, 1997 Sheet THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. 1 of REV B.0 26 5,6 HD[0..63] CPUVCC 1111111 111222333333 1890123456 789013000111 8888847890123456789188888888 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 8 7407S HDPA0 HDPA1 HDPA2 HDPA3 HDPA4 HDPA5 HDPA6 HDPA7 3 HCLKCPU 116 102 112 101 97 96 91 90 72 55 54 36 71 35 53 17 34 52 16 69 33 51 15 68 50 48 67 47 66 46 65 45 44 63 43 62 42 61 41 60 59 2 78 20 58 39 77 38 57 76 56 94 75 100 74 99 105 109 110 115 120 119 125 129 73 70 49 64 40 95 93 130 256 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 CLK VVVVVVVVVVVVVVVVVVVVVVVVVVVV CCCCCCCCCCCCCCCCCCCCCCCCCCCC OOOOOOOOOOOOOOOOOOOOOOOOOOOO RRRRRRRRRRRRRRRRRRRRRRRRRRRR EEEEEEEEEEEEEEEEEEEEEEEEEEEE A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADSC# BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# FERR# BREQ HITM# HIT# PCHK# HLDA AP LOCK# APCHK# PRDY PCD PWT CACHE# ADS# D/C# W/R# M/IO SCYC FRCMC# IERR# SMIACT# PM0/BP0 PM1/BP1 BP2 BP3 TCK TDO TDI TMS TRST# U/O#/NC PICCLK PICD0 PICD1 PHITM# PHIT# PBGNT# PBREQ# BF0 BF1 283 301 263 319 282 300 262 318 281 280 261 279 260 278 259 277 258 276 216 228 211 222 246 227 221 265 264 302 245 285 270 252 271 253 272 254 273 255 140 229 268 250 215 230 248 225 210 200 220 267 159 231 249 287 155 274 182 135 219 139 145 149 150 126 131 132 136 141 212 106 111 122 199 189 205 209 181 176 TP023 1 HFRCMC# TP009 1 TP036 TP035 TP033 TP034 TP027 TP032 TP031 TP026 TP025 TP007 TP024 TP017 TP018 TP016 TP015 TP013 TP014 HBF0 HBF1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 HBE#0 HBE#1 HBE#2 HBE#3 HBE#4 HBE#5 HBE#6 HBE#7 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11

File name Mainboard_Intel_Model-440BX.pdf

A B C D E Intel 100 MHz Pentium(tm) II processor/440BX AGPset Uniprocessor Customer Reference Schematics 4 Revision 1.0 ** Please note that these schematics are subject to change. 4 TITLE COVER SHEET BLOCK DIAGRAM SLOT 1 CONNECTOR CLOCK SYNTHESIZER 82443BX 3 PAGE 1 2 3,4 5 6,7,8 9,10,11 12,13 14 15 16,17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 B C THIS SCHEMATIC IS PROVIDED "AS IS" WITH NO WARRANTIES W H A T S O EVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL, SPECIFICATION OR SAMPLE. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. Intel does not warrant or represent that such use will not infringe such rights. I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. *Third-party brands and names are the property of their respective owners. Copyright * Intel Corporation 1997, 1998 3 DIMM SOCKETS PIIX4E ULTRA I/O AGP CONNECTOR PCI CONNECTORS ISA CONNECTORS IDE CONNECTORS USB CONNECTORS FLASH BIOS 2 PARALLEL SERIAL/FLOPPY KEYBOARD/MOUSE VRM POWER CONNECTOR GTL+ TERMINATION PCI/AGP PULLUPS/PULLDOWNS ISA PULLUPS/PULLDOWNS 82443BX DECOUPLING 2 INTEL CORPORATION PLATFORM COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title Intel 100MHz Pentium(tm) II processor/440BX AGPset Uni-Processor Cover Sheet Size A Date: Document Number Intel(R) 440BX AGPset Thursday, April 09, 1998 D 1 BULK DECOUPLING TERMINATION DECOUPLING LM79 REVISION HISTORY A 1 Rev 1.0 1 E Sheet of 34 1 2 3 4 5 6 7 8 VRM VTT GEN. PG. 25 A P E N T I U M (tm) II PROCESSOR (SLOT 1) PG. 3,4 CK100 & ITP CON. PG. 5 THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER P R O DUCT. iNTEL IS NOT RESPONSIBLE FOR THE MISUSE O F THIS INFORMATION. A SMBus Interface MAX1617 ME PG. 3 DEVICE TABLE SYSTEM BUS ADDR ADDR CNTL CNTL DATA DATA GTL TERM. PG. 27 DEVICE TYPE FUSES REFERENCE DESIGNATOR F1,F2,F3,F4 PAGE # 20,24 ITP Connector DIMM Sockets CNTL J2 J4,J5,J6 J12, J13 J14, J15 J16, J17 J24 J33 A,B J32 J34-37 5 9,10,11 18 19 20 25 3,4 15 16,17 B MEMORY 3 SDRAM DIMM MODULES PG. 9-11 ISA Connectors IDE Connectors USB Connectors VRM8.2 Slot 1 Connector AGP Connector ADDR/DATA AGP C O N N. ADDR CNTL 82443BX 492 BGA CKBF PG. 6 DATA AGP SIDEBAND PG. 15 B PG. 6-8 PCI Connectors BLM31A700S CNTL L1-L6,L7-L13 20,24 ADD/DATA CK100 U1 3VSB U5 A,B,C,D,E,F U6 U7 A,B,C,D,E,F U8 A,B,C,D,E,F U9 U12 A,B,C,D,E,F U13 5 13,26 14 15,26,29 2

File name Mainboard_Intel_Model-440BX_Dual-CPU.pdf

A B C D E 4 Intel 100 MHz Pentium(tm) II processor/440BX AGPset Dual Processor Customer Reference Schematics Revision 1.0 TITLE COVER SHEET BLOCK DIAGRAM SLOT 1 CONNECTOR CLK SYNTHESIZER 82443BX FET SWITCHES DIMM SOCKETS 4 PAGE 1 2 3,4,5,6 7 8,9,10 11,12 13,14,15,16 17.18 19 20 21 22,23 24 25 26 27 28 29 30 31 32 33 34 35 INTEL CORPORATION ** Please note that these schematics are subject to change. THIS SCHEMATIC IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL, SPECIFICATION OR SAMPLE. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. Intel does not warrant or represent that such use will not infringe such rights. I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. *Third-party brands and names are the property of their respective owners. Copyright * Intel Corporation 1997, 1998 3 3 PIIX4E IOAPIC ULTRA I/O AGP CONNECTOR PCI CONNECTORS ISA CONNECTORS IDE CONNECTORS USB CONNECTORS FLASH BIOS 2 PARALLEL SERIAL/FLOPPY KEYBOARD/MOUSE VRM POWER CONNECTOR PROCESSOR BUS/CORE FREQ. PCI/AGP PULL-UPS & PULL-DOWNS ISA PULL-UPS 82443BX/DRAM DECOUPLING 2 36 37 38 Title PLATFORM COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 1 1 BULK DECOUPLING TERMINATION DECOUPLING LM79 REVISION HISTORY 39 40 Intel Pentium(tm) II processor/440BX AGPset Dual Processor Cover Sheet S ize Custom Date: Document Number Intel(R) 440BX AGPset Thursday, April 09, 1998 D Rev 1.0 1 E Sheet of 40 A B C 1 2 3 4 5 6 7 8 APIC BUS VRM VTT GEN. PG. 31 A PENTIUM(tm) II Processor (SLOT 1) PG. 3,4 CK100 ITP CON. PG. 7 PENTIUM(tm) II Processor (SLOT 1) PG. 5,6 VRM VTT GEN. PG. 31 THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. iNTEL ISNOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. & A MAX1617 ME PG. 3 MAX1617 ME PG. 5 DEVICE TABLE DEVICE TYPE FUSES ADDR SMBus Interface S Y S TEM BUS IOAPIC 82093AA PG. 19 AGP CONN. CNTL PG. 21 DATA ADDR ADDR/DATA CNTL AGP SIDEBAND ADDR S Y S T EM BUS CNTL CNTL DATA REFERENCE DESIGNATOR F1,F2,F3,F4 PAGE # 26,30 SMBus Interface Slot 1 Connectors ITP Connector DIMM Sockets J1A,B J2A,B J3 J4,J5,J6,J7 J8 J9,J10,J11,J12 J13, J14 J15, J16 J17,J18 J25,J26 3,4,5,6 82443BX 492 BGA PG. 8-10 CNTL DATA 13,14,15,16 21 22,23 35 25 26 31 B M E M O RY 4 SDRAM DIMM MODULES PG. 13-16 AGP Connector PCI Connector ISA Connector IDE Connect

File name Mainboard_Intel_Model-440LX.pdf

A B C D E 440LX CUSTOMER REFERENCE DESIGN 4 TITLE COVER SHEET BLOCK DIAGRAM SLOT1 CONN. CLK SYNTHESIZER PAC DIMM SOCKETS PIIX4 ULTRA I/O AGP CONN. PCI CONN. ISA CONN. IDE CONN. USB CONN FLASH BIOS PARALLEL SERIAL/FLOPPY KEYBD/MOUSE VRM PWR CONN GTL TERMINATION PCI/AGP PULLUPS ISA PULLUPS PAC DECOUP BULK DECOUP VREF PAGE REVISION HISTORY 1 PAGE 1 2 3,4 5 6,7,8 9,10,11 12,13 14 15 16,17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 THESE SCHEMATICS ARE PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL, SCHEMATIC OR SAMPLE. 4 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. Intel does not warrant or represent that such use will not infringe such rights. I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. *Third-party brands and names are the property of their respective owners. Copyright * Intel Corporation 1996 3 3 2 2 INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title Size A Date: Document Number Intel 440LX PCIset Sheet D 1 Rev 1.4 1 E of 33 A B C 1 2 3 4 5 6 7 8 VRM VTT GEN. PG. 25 A KLAMATH 'SLOT 1' CONNECTOR PG. 3,4 THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PR ODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. CLOCK ITP CON. PG. 5 A ADDR ADDR CNTL CNTL DATA HOST BUS DATA CNTL GTL TERM. PG. 27 MEMORY 3 DIMM MODULES PGS. 9-11 AGP CONN. ADDR/DATA PAC 82443LX 492 BGA ADDR CNTL AGP SIDEBAND PG. 15 B PG. 6-8 DATA B ADD/DATA CNTL PCI BUS ADD/DATA PG. 20 2 USB CONN. CNTL PGS. 16,17 2 PCI IDE CONNECTORS USB USB PCI CONN PCI CONN PCI CONN PCI CONN PG. 19 CNTL SECONDARY IDE PRIMARY IDE PIIX4 82371AB 324 BGA PGS. 12,13 CNTL ADDR/DATA ADDR/DATA C C CONTROL ADDR CNTL DATA ISA BUS PG 18 ADDR CNTL DATA ADDR ADDR FLASH BIOS PG. 21 DATA X-BUS KEYBOARD PG. 24 ISA CONN ISA CONN ULTRA I/O PG.14 CNTL MOUSE PG.24 D DATA D FLOPPY CONN. PG. 23 PARA. CONN. PG. 22 SER. CONN. PG .23 SER. CONN. RESET, POWER CONNECTORS PG. 26 INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title DECOUPLING CAPACITORS PGS. 30-32 Intel 440LX PCIset Block Diagram Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 2 8 ISA, PCI RESISTORS PG. 28,29 Rev 1.4 o f 33 1 2 3 4 5 6 7 A B C D E VCCVID VTT VTT J1A B01 B02 B03

File name Mainboard_Intel_Model-845.pdf

5 4 3 2 1 Intel (R) 845E Interactive Client Reference Design D Revision X2 Last Change : 2002-09-26 D # 1 2 3 4 5 6 7 8 9 10 11 C Schematic Page COVER SHEET BLOCK DIAGRAM BLOCK-POWER MECH-ROUTE NOTES CPU-P4 BUS CPU-P4 POWER CPU-ITP MCH-SYSBUS & CLOCK MCH-AGP & DDR MCH-POWER CLK-ICS950201 DDR-DIMM 0 DDR-DIMM 1 ICH4-SYSBUS & PCI ICH4-LPC & IDE & USB ICH4-POWER GLUE LOGIC SIO0-LPC47M107 SIO1-LPC47N227 CONN-COM1/COM2/LPT CONN-COM3/COM4/KBC AC97-AD1885 LAN-10/100/1000 BUS LAN-10/100/1000 CONN VGA-COUGAR-01 VGA-COUGAR-02 VGA-COUGAR-03 CONN-PCI CONN-01 IDE-FLOPPY USB0-USB1-LAN0 USB2-USB5 SYSTEM CONTROL DDR-POWER POWER Prefix A_ AC_ APIC_ AUD_ CK_ EEn_ EN_ F_ FWH_ G_ GND_ GND H_ I2C_ IDE_ INT_ KB_ L_ LANn_ LP_ M_ MIDI_ MS_ P_ SPn_ USB_ V_ ZV_ Netobject CRITICAL ANALOG TRACES AC97 SIGNAL APIC SIGNAL ANALOG AUDIO SIGNAL CLOCK SIGNAL SERIAL EEPROM LANn ENABLE FOR POWER SOURCES FLOPPY DISK SIGNAL FIRMWARE HUB SIGNAL AGP BUS SIGNAL GND SIGNAL DERIVED GND POWER P4 HOSTBUS SIGNAL I2C BUS SIGNAL IDE SIGNAL INTERRUPT SIGNAL KEYBOARD SIGNAL LPC BUS SIGNAL LAN CONTROLLER n SIGNAL LPT1284 SIGNAL MEMORY BUS SIGNAL MIDI SIGNAL MOUSE SIGNAL PCI BUS SIGNAL SERIAL PORT n SIGNAL USB PORT SIGNAL POWER ZV VIDEO PORT SIGNAL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Changes from X1 to X2 All BAT54A (0-0031-1261) changed to BAT54 (0-0031-1104) due to wrong polarity R712 changed from 10k to 15k to adjust voltage PU R756 and R757 added @ U38.15 (PG_VDDR) and U38.16 (PG_V1V5) Net on pins U3.54 and U3.55 separated (BSEL[0..1]) due to naming error PU R758 added at CN34.7 (SYS_RESET#) PU R759 added at U39.4 (VIDPWRGD) C717 changed from 4u7 to 1u R607 not populated R571 and R572 not populated (FWH Test Pins) R585 and R586 not populated (for LVDS 18 Bit) R760 and C741 added to U7.50 to generate a V_3V3SB input delay for resume reset R501 and R494 not populated due to PCI config of LAN 82540 U36 FWH symbol changed due to wrong pinout (Pin 23, 24 and 25) R496 changed to 4k7 and set to GND (PD M66EN) R525 and R499 is now populated R530 not populated due to wrong V_2V5LAN voltage U20.G4 is now 51R Pulldown to GND U20.H4 is now 33R Pullup to V_3V3LAN AC97 Fixup (AC_SDIN0 -> Changed to AC_SDIN2 on ICH4) Swap ICH4 Pin N20 and P21 (H_HISTB+ / H_HISTB-) due to wrong info in yellow cover LAN 82540 Fixup (R519 populated with 0R, R517 changed to 2K49 and R513 changed to 330R) R615 changed to 4K32 due to Cougar Bug HW Rev changed to 2 at Glue Logic R373 is now populated with 10M CN12.4 must be isolated cause of shortcut of AUD_MIC_BIAS to GND PU R761-R765 added to VID[0:4] PU R766 added to U23.15, PD R767 added to U23.14 (Panellink strapping options) HD-LED-power connected to V_5V0 instead of V_5V0SB PD R768 added to PS_ON PU R769 added to U3.28 (PGOOD408#) PD R770, R771, R772 added to power enables (default off, if CPLD not configured) PD R773-R776 added to serial port shut down pins Splitted SMI# and PME# s

File name mainboard_intel_model-915gav.pdf

Intel® Desktop Boards D915GAV/D915GAG Technical Product Specification December 2004 Order Number: C68600-002 The Intel® Desktop Board D915GAV/D915GAG may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in the Intel Desktop Board D915GAV/D915GAG Specification Update. Revision History Revision -001 -002 Revision History First release of the Product Specification. Intel® Desktop Board D915GAV/D915GAG Technical Date June 2004 December 2004 Second release of the Intel Desktop Board D915GAV/D915GAG Technical Product Specification. This product specification applies to only standard Intel Desktop Boards D915GAV and D915GAV with BIOS identifier EV91510A.86A. Changes to this specification will be published in the Intel Desktop Board D915GAV/D915GAG Specification Update before being incorporated into a revision of this document. INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Intel® desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call in North America 1-800-548-4725, Europe 44-0-1793-431-15

File name microlab-350w.pdf

1 2 C9 105K/250V 3 4 R30 4.7E ST1020 D23 D28 5 104/50V C21 L1 106-26 + 6 +12v.OUT 1UH L5 + 1 BD1-BD4 .47/275VAC C3 TH1 054 F1 5A/250V 222/275VAC CX1 .01 LF1 CX2 RV 1M C4 3 4 2 C5 220UF/200V SW1 5A/250V C6 220UF/200V R1 150K R2 150K D5 FR107 R3 2.7K E13007/F Q1 R5 1E 4.7E D9 4148 D10 4148 R31 FR107 D21 ST/2045D24 R35 C8 10/50V C21 T1 D25 FR104 L1 D20 L1 106-26 C28 FR107 L6 C27 + C24 C29 220/16V 220UF/16V D 1UH +5v.out C24 R33 27E R32 470E L4 FR105 D22 L3 34 34UH + + D + 2200/10V 2000UF/10V D6 FR107 R61E D7 4148 C7 D8 4148 L8 D26 FR104 50UH 106-26 L1 106-26 D27 FR105 -12v.out -5v.out C22 200/16V + E13007/F R7 2.7K Q2 C23 220/16V 10/50V T2 + D28 SBL2040 L2 62UH + L7 1/UH C31 2200/10 3.3v.out R43 R38 R41 10E 10E R39 1.2K 2.65K R42 27E C30 2200/10V + C 3 R51 1K R53 100E D50 4148 R55 47K R? 14 13 R72 1M 12 11 10 B R52 100K 9 8 R71 15K C45 103/50v R70 18K R50 270K C40 1/50v R63 27K 150K R69 D54 4148 D56 4148 ZD4 4.7V PS--ON R66 1.2K ZD3 13V ZD1 3.2V to.+5v 4 D55 4148 339/ST 6 7 R73 R25 3.9K 5.6K R59 10K + D29 4148 R54 47K D51 4148 C41 1/50V R58 1 2 3 D53 4148 4 5 R? RES2 R? RES2 R61 15K R26 27K R27 560K R28 1M 16 15 14 13 12 11 10 9 R15 2.7K R19 2.7K R18 4.7K 1 2 3 4 5 6 7 8 R10 24K R11 5.6K R12 47K R16 2.7k VR1 102/T R62 33K R57 27K C42 4.7UF 5.1K R56 D15 4148 D17 FR05 C44 103/50V D52 4148 1K R9 1.5K D16 4148 D13 4148 Q12 C945 R8 100 D21 4148 Q3 C945 D11 4148 Q4 C945 Q5 C11 1UF/50V + D14 4148 D30 IN4148 A928A R36 100E C C29 C224 R40 2.7K C32 R39 1.2K PG.OUT IC4 KA431 + 0.22UF/50V TO.5VSB-2 B R17 4.7k IC1 KA7500B C13 102/50v R13 33k R14 47K R15 16k 102/50VC12 1UF/50V C46 R21 47K R22 100K R23 R24 27K 1M R20 1K C7 47UF/50V C47 103 A R67 1.8K R68 1.5K D57 4148 to.+12v to.+3.3v to.--12v to.--5v Title Size B Date: File: 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-2.ddb Drawn By: 6 Number Revision A 1 2 3 1 2 3 4 5 6 D D VCC+ 1D4 1R2 270K D101 FR107 T1 C1C1 1R3 220 104/50V 1C2 104/50V IC4 LTV817 1R6 100K D102 IN4148 1R8 47E 4148 1R1 270K D105 FR104 HER204 L10 62UH 5vsB.out 1R12 150E C 1R13 510E 1000UF/160V Te C D1D3 to.5vsb-2 C14 47UF/50V 1R11 15K 1C7 104/50V 1Q2 2SC5027 KA431 1R11 2.7K 1R14 100E 1C3 103/1KV 2SC5344Y 1Q1 1D7 4148/ST B 1R14 1.5K 1R4 1K 1C4 1R13 2.5K B 1UF/50V 1C6 1R7 1.5E VCC- A Title Size B Date: File: 1 2 3 4 5 23-Dec-2003 Sheet of C:\Documents and Settings\WANGZHAO.ERP.001\\5400M-1.DDB Drawn By: 6 Number Revision A

File name microlab-400w.pdf

1 2 C9 205K/250V 3 4 ST1020 D10A 5 L1 106-26 + 6 +12v.OUT + BD1-BD4 .47/275VAC C3 TH1 054 F1 5A/250V 222/275VAC CX1 .01 LF1 CX2 RV 1M 4 2 C7 470UF/200V SW1 C4 3 5A/250V C8 470UF/200V R3B 220K R3A 220K D1 FR107 R9 2.7K 2S2625 Q1 R6 2.2E R5 51E 1UH L5 1 R7A 4.7E D3A 4148 D3 4148 C21 104/50V R30 4.7E FR152 D12 ST/3040D11A L1 106-26 L6 C27 + C24 C29 220/16V 220UF/16V D R6A 2.2E 1UH +5v.out C24 R33 27E R32 470E L4 FR105 D22 34UH + + D + C8 C10 102/1KV 10/50V T1 C22 103 R23 4.7E D10B FR152 2200/10V L1 106-26 2000UF/10V -12v.out -5v.out D2 FR107 2S2625 Q2 R7 2.7K R8A 2.2E R8 2.2E C710/50V + L8 R9A 4.7E D3A 4148 T2 D3 4148 50UH D15A SBL2040 KA7905 IC6 C32 10/50V + C23 220/16V L2 62UH + L7 1/UH C25 2200/10 R43A 10E + 3.3v.out R29 10E 2200/10V C26 C PG.OUT 1UF/50V C42 3 R62 1K R37 22E R37A 22E D16 4148 R8 100 D21 4148 Q8 C945 R9 1.5K D16 4148 D26 4148 D11 4148 Q28 C945 R41 39E Q5 C37 4.7UF/50V + D27 4148 D17 IN4148 A928A IC4 KA431 R32 10E R31 100E C28 4.7UF/50V C R77 330K R68 4.7K 13 R64 15K D30 4148 11 Q11 A733 B D33 4148 10 R69 33K 9 8 R67 4.7K 339/ST 6 7 4 12 2 3 R? 14 1 R76 7.5K D22 IN418 3.3VS + R34 845EK R65 4.7K R38 22E C28A C104 R35 2.4K R74 1M R75 27K R39 4.7 C36 22UF/50V D17 FR05 5 R79 12K TO.5VSB-2 R43 2.7K R42 2.7K R46 2.7K 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 R40 1K R61 150E R47 2.7k C38 102/50v R81 27k R14 47K R45 16k 103/50VC39 R59 1.2K R57 R60 1.2K 1K B R48 51K VR1 101/T D23 IN4148 R72 56K C43 104 C45 103/50v IC1 KA7500B + R63 4.7K Q10 A733 R69 150K PS--ON C46 104 C40 R80 15K R71 220K R50 56K R20 1K C40 4.7UF/50V C7 47UF/50V C41 103 R16 47E A D18 4148 1/50v D32 4148 R70 12K C44 224 R56 5.6K 1 2 3 D56 4148 to.--5v R54 1.5K D18A4148 to.--12v to.+5v 1KR54A D19 4148 to.+12v ZD3 13V 4 5 3.2V ZD1 to.+3.3v Size B Date: File: 13-Aug-2004 Sheet of C:\DOCUME~1\WANGZH~1.000\LOCALS~1\Temp\5400X-2.ddb Drawn By: 6 Number Revision Title A R62 1.2K D23 4148 ZD4 4.7V 1 2 3 4 5 6 D D VCC+ D8 to.5vsb-2 R10A 220K D101 FR107 C C16 102/50V 14C2 104/50V IC4 LTV817 D6 IN4148 C13 103/1KV D4 T1 4148 R10B 220K R11 39K R18 47E R16 56E D9 FR104 SR560 C17 102/1KV C C21 47UF/50V L9 62UH 5vsB.out R17 51E R19 220E R22 3.9K C20 104/50V R20 2.6K R11A 120E R15 220 Q3 2SC5027 1000UF/10V C18 C19 1000UF/10V KA431 R21 2.5K R13 1K B 1Q1 2SC5344Y B 104/100v C15 R12 1.5E VCC- A Title Size B Date: File: 1 2 3 4 5 13-Aug-2004 Sheet of C:\DOCUME~1\WANGZH~1.000\LOCALS~1\Temp\5400X-1.DDB Drawn By: 6 Number Revision A

File name msi-6389e-schematic.pdf

8 7 6 5 4 3 2 1 MS-6398E/VER:100 D 3.3V 5V 5VSB1A 12V BRIIKDALE PLATFORM POWER DELIVERYT MAP PROCESSOR CORE VRM PROCESSOR VTT D INTEL (R) 845E/ICH4 CHIPSET Pentium 4 in 478 pinPackage/Northwood Processor SCHEMATICS Title Cover Sheet Block Diagram Processor Sockets Clock Synthesizer CK408 MCH BROOKDALE DIMM 1 & 2 & 3 ICH4 CPU/AC97/SYS ICH4 LPC/USB/PWR IDE1 & IDE2 FWHUB & MS1 PCI Connectors USB AGP CNR RISER S/W AUDIO ( AL650 ) AUDIO GAME PORT & Front Audio Connector LPC/Flopy Connector & IR FAN & Hardware Monitor Parallel Port TERMINATION Parallel Port/Serial Port KB / MOUSE CONNECTOR & Wake on LAN/Modem PULL UP RESISTOR Front Pannel VRM 9.X ACPI POWER ( MS5 ) D_LED & OVER VOLTAGE DDR DAMPING DDR TERMINATION IDE RAID Intel 82562ET LAN MANUAL PART VERSION HISTORY GPIO SPEC *** File (.dsn) change history 1. 2. 3. 4. 5. 6. 7. L a y o u t g erber-out B O M r e l e ase-1 B O M U p d a te-2 B O M U p d a te-3 BOM Update-4 BOM Update-5 B O M U p d a te-6 -> -> -> -> 6398E-100_03-14-91.dsn 6398E-100_03-15-91.dsn 6398E-100_03-22-91.dsn 6398E-100_03-28-91.dsn - > 6398E-100_03-29-91.dsn => Creat new BOM (6398E-1.0_OPT:B) - > 6398E-100_04-08-91.dsn ( 6398E-01S & 6398E-02S -> MP BOM ) -> 6398E-100_04-09-91.dsn MCH CORE 1.5V 1.5V VREG MCH VTT MCH AGP MCH HUB INTERFACE 1.8V 1.8V VREG MCH SYSTEM MEMORY SDRAM 2.5V Page 1 2 3,4 5 6,7,8 9,10 11 12 13 14 15,16,17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35,36 37 38 39 40 2.5V VREG ICH4 HUB INTERFACE 1.8V ICH4 CORE 1.5V C C ICH4 I/O 3.3V 1.5V VREG ICH4 RESUME 1.5V ICH4 RESUME I/O 3.3V ICH4 RTC 3.3V ICH4 5V 3.3 VREG FWH 3.3V LPC SUPER I/O 3.3V CK-408 3.3V B B BOM Option : M S 6398E_STD : MSI Pure Standard BOM => Note : Q + U + V -> 6398E-B10 -> 6398E-01S -> 6398E-010 ( MP ) MS6398E_OPT-A : MSI Full Function => Note : L + R + T + V -> 6398E-B20 -> 6398E-02S -> 6398E-020 ( MP ) MS6398E_OPT-B : MSI Plus => Note : L + T + V -> 6398E-02S ->6398E-04S A Note : Default : P4+DDR*3+PCI*6+CNR*1+S/W Audio ALC650 L => Support Intel LAN 82562ET P => For Special Customer P Q => Support Only 2-Chanel & No S-Bracket R => Support IDE-Raid PDC20276 ( ATA-133 ) S => Support Sigmatel-9756T/A4 Codec T => Support Blut-Tooth 2*3 Header U => Ultra Light SPEC V => Support Vcore Adjusting Function MICRO-STAR Title A Update1 BOM 6398E-100_04-09-91.dsn changed from BOM 6398E-100_04-08-91.dsn 04/09/2002 5 4 3 COVER Size Custom Date: D o c u m e n t Number MS-6398E T u e s d a y , A p r il 09, 2002 2 Rev 100 Sheet 1 1 of 41 8 7 6 8 7 6 5 4 3 2 1 Power Supply CONN VRM9.X Pentium4 Socket478 ( Support FSB 100 &133 ) Scalable Bus CK_408 Clock ICS950213 DIMM 1:3 ->MAX = 2 GBytes D AGP 4X AGP CONN -> 1.5V D 4X (266MHz) AGP MCH: Memory Controller HUB 845E DOUBLE DATA RATE SDRAM DIMM 2&3 Shared PCI 1 ~ 6 HUB Interface Heceta Hardware Monitor SM Bus ICH4: I/O Controller HUB PCI (33MHz) IDE CONN 1&2 USB Port 1:6 VER:2.0 C LPC Bus AC Link Brookdale Chipset FWH: Firmware HUB Winbond I/O 83627H

File name p4845glm.pdf

CH845G REV:2.0 Title Cover Sheet Block Diagram Socket 478 DECOUPLING Clock Synthesizer GMCH DDR DIMMS & TERMINATION AGP CONNECTOR ICH4 FWH LPC PCI Connectors IDE Connectors USB Connectors Parallel Port Serial Ports KEYBOARD/MOUSE CNR GAME PORT VGA CONNECTOR AC97 CODEC AUDIO CONNECTORS PWM REGULATORS SYSTEM & POWER CONNECTORS DDR POWER REGULATORS Page 1 2 3,4 5 6 7,8,9 10,11,12 13 14 ,15 ,16 17 18 19 ,20 21 22 23 24 25 M62 M63 5 4 3 2 MTHOLE 6 7 8 9 MTHOLE 5 4 3 2 6 7 8 9 MTHOLE M70 5 4 3 2 M1 6 7 8 9 MTHOLE 5 4 3 2 6 7 8 9 MTHOLE M2 5 4 3 2 6 7 8 9 MTHOLE M3 5 4 3 2 FH4 1 FIDUCIAL FH2 1 FIDUCIAL FH5 1 FIDUCIAL FH1 1 FIDUCIAL FH3 1 FIDUCIAL HH1 1 NPTH157 HH2 1 NPTH157 HH3 1 NPTH157 26 27 28 29 30 31 32 33 34 6 7 8 9 Size A3 Date: Document Number COVER SHEET Monday, August 19, 2002 Sheet 1 of 34 Rev 01 Block Diagram Intel Pentium 4 processor / Northwood 478-Pin Socket 400/533MHz System Bus VRM9.0 AGP4X or 2 Muxed DVO Port MCH 1.06GB/S 1.6GB/S \ 2.1GB/S Brookdale G 760 / 788 FC-BGA 266MB/s Hub interface 1.5 2 DIMM Modules DDR200/266 IDE Primary ATA66/100 IDE Secondary PCI CNTRL PCI CONN 1 PCI CONN 2 PCI CONN 3 ICH4 Hi-Speed USB 6 Ports 480Mb/s 421 mBGA PCI ADDR/DATA USB LPC Bus AC97 3 Codec support AC'97 Link LAN SIO LAN interface Flash Bios Keyboard Mouse Floppy Serial 1 Parallel Game Port Size A3 Date: Document Number BLOCK DIAGRAM Monday, August 19, 2002 Sheet 2 of 34 Rev 01 VCORE A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 U10A DEP3 DEP2 DEP1 DEP0 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC L25 K26 K25 J26 H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8 H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63 7 7 7 H_RS0# H_RS1# H_RS2# B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 F1 G5 F4 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36

File name Schematics Gigabyte 6OXT.pdf

A B C D E GIGABYTE GA-6OXT Reference Schematics Revision : 1.0 4 4 TITLE COVER SHEET INTEL PIII SOCKET-370 GMCH (INTEL 82815 EP ) SDRAM SOCKET (DIMM1,DIMM2,DIMM3) AGP SLOT ICH2 (INTEL 82801BA) CLOCK SYNTHESIZER 3 SHEET 1 2,3,4 5,6,7 8,9,10 11 12,13,14 15 16,17,18 18 19 20 21 22 23 24 25 26 27 28 29 30 ** GPI0/REQAGPI1/REQ5GPI2/PIRQEGPI3/PIRQFGPI4/PIRQGGPI5/PIRQH- ICH2 GPIO FUNCTION PRI_DWNREQ5NOT USED PIRQFPIRQGNOT USED PULL UP/DOWN PULL UP 4.7K TO VCC3 PULL UP 2.7K TO VCC PULL UP 8.2K TO VCC3 PULL UP 8.2K TO VCC3 PULL UP 2.7K TO VCC PULL UP 8.2K TO VCC3 ** GPI6 ** GPI7 ** GPI8 ** GPI11 ** GPI12 ** GPI13 GPO16/GNTAGPO17/GNT5GPO18 GPO19 PCI SLOTS ( PCI1,PCI2,PCI3,PCI4,PCI5 ) FWH ( SST 49SL002A ) IDE CONNECTORS (IDE1,IDE2) BUZZER & FRONT PANEL & WOL & STR LED CODEC ( REALREK 201A ) AUDIO PHONE JACK & FRONT AUDIO CNR SOLT LPC ( IT8712/DX ) & SCR COM & LPT PORTS & FLOPPY H/W MONITOR & FAN GREEN BUTTON PULL UP 8.2K TO 3VDUAL AGP/DIMM OVER VOLTAGE PULL UP 8.2K TO VCC3 REV. ID REV. ID LPCPMESMART CARD READER NOT USED GNT5NOT USED NOT USED AGP OVER VOLTAGE 1.6V AGP OVER VOLTAGE 1.7V NOT USED NOT USED REV. ID BIOS WRITE PROTECT DIMM OVER VOLTAGE 3.5V DIMM OVER VOLTAGE 3.4V FUNCTION STR FUNCTION PULL 4.7K TO 3VDUAL PULL 8.2K TO VCC3 PULL UP 4.7K TO 3VDUAL PULL UP 4.7K TO 3VDUAL PULL UP 8.2K TO 3VDUAL PULL UP 4.7K TO 3VDUAL PULL 8.2K TO VCC3(CAN'T PULL DOWN).Because BIOS Address Decode Incorrect : FF PULL 8.2K TO VCC3 3 ** GPO20 ** GPO21 GPO22 GPO23 2 PS2 CONNECT & FRONT SMBUS & IR/CIR & USB ATX POWER & STR LDO & 5VDUAL & VCC18 VCC_CORE DC-DC CONVERTER HISTORY JUMPER SETTING CLR_CMOS 1-2 2-3 1-2 2-3 1-2 2-3 CLEAR CMOS NORMAL WRITE PROTECT NORMAL ENABLE DISABLE 2 ** GPIO24 ** GPIO25 ** GPIO27 ** GPIO28 LPC I/O GPIO BIOS_WP 1 PULL UP/DOWN PULL DOWN 4.7K TO GND 1 ** GP50/CLKRUN- CODEC_EN Title GIGABYTE CORP. COVER GA-6OXT Sheet E Size Document Number Custom Date: A B C D Rev 1.0 1 of 30 Wednesday, October 17, 2001 8 7 6 5 4 3 2 1 VCORE HA[3..31] (4,5) HD[0..63] HD[0..63] B26 C3 AK2 AF2 AB2 T2 P2 K2 F4 E5 AM4 AE5 AA5 W5 S5 N5 J5 F2 AJ5 D6 B6 AM8 AJ9 E9 B10 AM12 AJ13 E13 B14 AM16 AJ17 E17 B18 AM20 AJ21 D20 F22 AM24 AJ25 D24 F26 AM28 AJ29 D28 AK34 F30 B30 AM32 AH32 Z32 V32 R32 HA[3..31] (4,5) U1A HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 VID0 VID1 VID2 VID3 RS#0 RS#1 RS#2 REQ#0 REQ#1 REQ#2 REQ#3 REQ#3 RSRVD1 RSRVD3 RSRVD4 RSRVD5 RSRVD6 RSRVD7 RSRVD8 RSRVD9 RSRVD10 RSRVD11 RSRVD12 RSRVD13 RSRVD14 RSRVD15 RSRVD16 RSRVD17 RSRVD18 AK8 AH12 AH8 AN9 AL15 AH10 AL9 AH6 AK10 AN5 AL7 AK14 AL5 AN7 AE1 Z6 AG3 AC3 AJ1 AE3 AB6 AB4 AF6 Y3 AA1 AK6 Z4 AA3 AD4 AL35 AM36 AL37 AJ37 AH26 AH22 AK28 AK18 AH16 AH18 AL19 AL17 AH20 A29 A31 A33 AA33 AA35 AC1 AC37 AF4 AK16 AK24 AK30 AL11 AL13 AL21 AN11 AN13 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA

File name T23.pdf

A 9 B C D E F G H J K L M DATE N EC NO. P PART NO. Q OCT/02/01 VER 0.86 _______ 9 DEVELOPMENT NO. Q/M TORONTO-4.5 PLANAR 8 (SDR) 1 /70 VER 0.86 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. TITLE PAGE EC HISTORY CPU (1/3) CPU (2/3) CPU (3/3) DECAP FOR VCCCPU1R2B CAPS FOR VCCCPUCORE GMCH3-M(1/3):HOST I/F GMCH3-M(2/3):MEMORY GMCH3-M(3/3):AGP/HUB REF VOL & DECAPS DIMM CARD CONNECTOR CLOCK GEN(C9827) ICH3-M(1/3) ICH3-M(2/3) ICH3-M(3/3) HDD I/F CONNECTOR USB I/F FWH,RTC BAT. H8S/2169A KEYBOARD , PS/2 MISC G/A (PMH-2) POWER ON LOGIC SUPER I/O PC87392 SERIAL I/F (BLANK) EXT CRT I/F CARD BUS PCI1420GHK(1/2) CARD BUS PCI1420GHK(2/2) CARD BUS POWER CTRL CARD BUS SLOT AUDIO CS4299 AUDIO MISC AUDIO INT MIC AUDIO CONNECTOR AUDIO EXT MIC I/F AUDIO SPK CONN AUDIO HDP AMP AN17000A MINI PCI PCI BUS SWITCH OCT/02/2001 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. DOCKING CLEAN SHEET BAY (BLANK) CDC CONNECTOR THERMAL SENSOR I2CBUS/SMBUS IR MODULE TRISTAR T64C(1/4) TRISTAR T64C(2/4) TRIATAR T64C(3/4) TRIATAR T64C(4/4) (BLANK) (BLANK) TV-OUT (BLANK) LCD I/F CONNECTOR FAN CONTROL I/O SUB CONN,RJ11 CONN DCDC DC-IN AND CHARGER DCDC BATTERY,VCCSW DCDC TRICKLE CHARGER DCDC BATTERY MONITOR DCDC VCC3M/VCC5M(MAX1631) DCDC VCCCPUCORE DCDC VCCCPU1R5B DCDC VCC1R8 DCDC KOZAK DCDC VCC3AUX (BLANK) DCDC VID MUX 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 DRAWING: DESIGNER CHECKED APPROVED CLASS THIS DOCUMENT IS THE PROPERTY OF IBM ITS USE IS AUTHORIZED ONLY FOR RESPONDING TO A REQUEST FOR QUOTATION OR FOR THE PERFORMANCE OF WORK FOR IBM. ALL QUESTIONS MUST BE REFERRED TO THE IBM PURCHASING DEPARTMENT. Y.I 10/02/01 PART NO. _______ TITLE TORONTO-4.5 TITLE PAGE 0 0 _______ A B C D E F G H J K L M N P Q A 9 B C D E F G H J K L M DATE N EC NO. P PART NO. Q OCT/02/01 VER 0.86 _______ 9 DEVELOPMENT NO. Q/M EC HISTORY 8 2 /70 VER DATE CONTENTS VER 0.77 0.78 0.79 0.80 0.81 0.82 DATE APR/26/2001 MAY/10/2001 MAY/11/2001 MAY/24/2001 MAY/31/2001 JUN/15/2001 CONTENTS CHANGED CHANGED CHANGED CHANGED CHANGED CHANGED C658/C659 TO 10% BY TR4P049/50. BY TR4P053. BY TR4P056/57/58. BY TR4P060. BY TR4P062. 8 SIT 0.55 7 0.56 0.57 0.58 0.59 0.60 0.61 0.62 0.63 0.64 0.65 0.66 0.67 0.68 0.69 0.70 0.71 0.72 6 5 4 3 FEB/21/2001 CHANGED BY TR4P001/002. CHANGED BY EMI REQUIREMENTS. FEB/22/2001 CHANGED BY TR4P001/003. FEB/23/2001 CHANGED BY TR4P004. FEB/26/2001 CHANGED BY TR4P005/006/007 /008. FEB/27/2001 CHANGED BY TR4P009. FEB/28/2001 CHANGED BY TR4P010. MAR/01/2001 CHANGED BY TR4PXXX. MAR/02/2001 CHANGED BY TR4P015. MAR/06/2001 CHANGED BY TR4P016 AND TR4P017(AUDIO EC). MAR/07/2001 CHANGED BY TR4P019 AND MOVED FL1 AND FL2 TO AGND SIDE. MAR/08/2001 CHANGED BY TR4P021/XXX. MAR/09/2001 CHANGED BY TR4P024/025. MAR/22/2001 CHANGED BY TR4P026/27/28. MAR/23/2001 CHANGED BY