SONY CXA2067AS free download

File name CXA2067AS.pdf

CXA2067AS Preamplifier for High-Resolution Computer Display Description The CXA2067AS is a bipolar IC developed for high-resolution computer displays. Features · Wide-band amplifier: 170 MHz@­3 dB (Typ) · Input dynamic range: 1.0 Vp-p (typ) · High gain preamplifier (17 dB) · R, G and B in a single package (SDIP 30 pins) · I2C bus control Contrast control Sub contrast control Brightness control OSD contrast control Cut-off control: 4 channels of DAC output 2 blanking level modes (0.5 V fixed, pedestal ­0.3 V) · · · · · · Sync separator for sync-on-green Blanking mixing function OSC mixing function Video interval detection function VBLK sync DAC refresh system 12 V power supply interlocked power saving function 30 pin SDIP (Plastic) Absolute Maximum Ratings (Ta=25 °C, GND=0 V) · Supply voltage VCC/R/G/B 14 V VCC 7 V · Operating temperature Topr ­20 to +75 °C · Storage temperature Tstg ­65 to +150 °C · Allowable power dissipation PD 2.05 W Recommended Operating Conditions Supply voltage VCC/R/G/B 12±0.5 VCC 5±0.5 V V Applications High-resolution computer displays Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E99857 CXA2067AS Block Diagram D/A CONVERTOR SDA 1 I 2 C BUS DECORDER CUTOFF (R) CUTOFF (G) CUTOFF (B) CUTOFF (RGB) SCL 2 To each MODE SW CONTRAST SUB CONTRAST (R) SUB CONTRAST (G) SUB CONTRAST (B) OSD GAIN (R) OSD GAIN (G) OSD GAIN (B) BRIGHTNESS (RGB) 30 CSYNC/VDET 29 12V VCC R COF R 3 LPF 28 S/H-R COF G 4 Rch SUB CONTRAST CONTRAST GAIN CONTROL DATA 27 ROUT COF B 5 GAIN CONTROL AMP BLANKING MODE 26 BRIGHTNESS GND-R COF RGB 6 OSD YS GENERATOR BLANKING BUFFER AMP 25 BLANKING PULSE S/H-G RIN 7 5V OSD GAIN (R) OSD SW OSD PULSE (13PIN) YS PULSE (17PIN) 24 GOUT VCC 8 SYNC SEP/VDET 23 GND-G GIN 9 12V SYNC SEPARATOR VDET COMPARATOR SVSW 22 VCC G SYNC IN 10 21 S/H-B BIN 11 Gch 20 BOUT CLP 12 Same as R channel 19 GND-B OSD-R 13 to OSDSW 18 BLKING OSD-G 14 to OSDSW Bch 17 Same as R channel to OSDSW 16 12V YS OSD-B 15 to OSDSW VCC B --2-- CXA2067AS Pin Description Pin No. Symbol Pin voltage Equivalent circuit VCC Description 4k 1 SDA -- 1 I2C bus standard SDA (serial data) input/output. VILMAX=1.5 V VIHMIN=3.5 V VOLMAX=0.4 V VCC 4k 2 SCL -- 2 I2C bus standard SCL (serial clock) input/output. VILMAX=1.5 V VIHMIN=3.5 V 10k 3 4 5 6 COF R COF G -- COF B COF RGB 3 4 5 6 VCC VCC VCC 100 VCC DAC output for cut-off adjustment. Output DC is 1 to 4 V. VCC 14k VCC 8k VCC VCC 7 RIN VCC 1k 9 GIN 1.8 V (Clamp) 7 9 11 300 1k R, G and B signal inputs. Input via a capacitor. 11 B