File information: | |
File name: | System_Bus_Specification_Feb88.pdf [preview System Bus Specification Feb88] |
Size: | 1220 kB |
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Mfg: | arete_arix |
Model: | System Bus Specification Feb88 🔎 |
Original: | System Bus Specification Feb88 🔎 |
Descr: | . Rare and Ancient Equipment arete_arix a3000 System_Bus_Specification_Feb88.pdf |
Group: | Electronics > Other |
Uploaded: | 02-08-2020 |
User: | Anonymous |
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Extracted files: | 1 | |
File name System_Bus_Specification_Feb88.pdf Feb 25 17:55 1988 sbus.spec Page 1 1---------------------------------------1 1 1 ARETE SYSTEMS CORPORATION 1 1 1 1 1 PROPRIETARY AND CONFIDENTIAL 1 1 1 1---------------------------------------1 System Bus Specification General The system bus is an N-port time-division multiplexed transmission switch. A module installed in any of the N ports (backplane positions/slots) can send (receive) transmissions to (from) any of the N ports, including itself. Each transmission consists of a SOURCE port address, a DESTINATION port address, a transmission TYPE and 8 bytes of "DATA". The transmission TYPE determines what the DATA field contains. Error detection is provided for the SOURCE slot address, DESTINATION slot address and transmission TYPE fields and optionally provided for the DATA field. The maximum value of N is 16 (ports). The clock rate is 20 MHz. The instantaneous peak data transfer rate is ( 8 Bytes * 20 MHz = ) 160 MB/sec. Modules installed in bus ports interact with each other by exchanging transmissions over the bus. There are two types of transmissions, COMMANDS and RESPONSES. A module on the bus begins an interaction with another module by sending a COMMAND. The source of the COMMAND is the MASTER for that interaction; the destination of the COMMAND is the SLAVE. The SLAVE sends a RESPONSE back to the MASTER if required to complete the COMMAND. Bus Arbitration and Flow Control The bus arbiter controls access to the bus. To transmit on the bus, a module asserts ARB REQUEST, ARB DEST(3:0] (the DESTINATION port address) and optionally, a request modifTer (ARB RESP and/or ARB MODIFY) to the arbiter. If the request is to send a COMMAND, the arbiter checks that the destination port has a COMMAND input buffer available. A port with a COMMAND input buffer available is said to be READY. If the request is to send a RESPONSE, the module also asserts ARB RESP to the arbiter. In this case the destination port is required to have-to have enough RESPONSE input buffers available for the size of the RESPONSE it requested. Ports wanting to send COMMANDS to destinations that are READY and ports wanting to send RESPONSES arbitrate for time slots on the bus. Arbitration occurs for each available time slot. The arbiter asserts ARB GRANT to each port that wins an arbitration. Arbitration priority is a function of the port number of the requesting port. Ports are numbered (N-1) to O. The ports are divided into 2 groups. Ports (N-l) thru (N-n) form the first group. Ports (N-n-1) thru 0 form the second group. The priority of ports in the first group is the same as their port number. Port (N-1) has the highest priority, and po |
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